A chip packaging structure with electromagnetic shielding

Abstract

This utility model discloses a chip packaging structure with electromagnetic shielding, including a chip body and a DIP socket. The chip body includes a plastic encapsulation shell composed of an upper shell and a lower shell, with a substrate inside and a chip mounted on the substrate. A composite shielding layer is provided on the inner top of the upper shell. The composite shielding layer includes a bottom layer, a conductive polymer layer, a heat dissipation layer, and a surface conductive film layer stacked sequentially. The bottom layer is disposed on the side closest to the chip, and the surface conductive film layer is attached to the inner top of the upper shell. This utility model belongs to the field of chip packaging technology, specifically providing a solution to the problems of insufficient electromagnetic shielding effectiveness, limited heat dissipation performance, and impact on packaging reliability in the prior art.

Description

Technical Field

[0001] This utility model belongs to the field of chip packaging technology, specifically referring to a chip packaging structure with electromagnetic shielding. Background Technology

[0002] DIP (dual in-line-pin package) is a component packaging form that refers to integrated circuit chips packaged in a dual in-line format. The vast majority of small- and medium-scale integrated circuits use this packaging form. The DIP packaging structure is a dual in-line packaging technology with two rows of pins, which need to be inserted into a DIP socket for soldering.

[0003] Traditional chip packaging often uses a single metal shielding layer (such as aluminum or copper) or a conductive coating (such as conductive paint). While these methods provide some electromagnetic shielding, they have the following drawbacks:

[0004] Single materials are prone to reduced shielding effectiveness at high frequencies due to the skin effect, and it is difficult to meet the shielding requirements of different frequency bands. Metal shielding layers have a single heat conduction path, making it difficult to quickly dissipate the heat generated during chip operation, resulting in significant local temperature rise. Moreover, the difference in the coefficient of thermal expansion between the metal layer and the molding material can easily cause interface delamination, thereby reducing the reliability of the package. Utility Model Content

[0005] The technical problem to be solved by this invention is the insufficient electromagnetic shielding effectiveness, limited heat dissipation performance, and the impact on packaging reliability in the prior art.

[0006] To solve the above problems, the technical solution adopted by this utility model is as follows:

[0007] This utility model proposes a chip packaging structure with electromagnetic shielding, comprising:

[0008] The chip body includes a plastic encapsulation shell, which is composed of an upper shell and a lower shell, and has a plurality of pins on both sides. The lower shell has a substrate inside, and a chip electrically connected to the substrate is disposed on the substrate. Bond wires are provided between the pins and the chip. The upper shell has a composite shielding layer at its inner top. The composite shielding layer includes a bottom layer, a conductive polymer layer, a heat dissipation layer and a surface conductive film layer stacked in sequence. The bottom layer is disposed on the side close to the chip, and the surface conductive film layer is attached to the inner top of the upper shell.

[0009] DIP socket, comprising a housing made of an insulating material that matches the plastic encapsulation housing, pins assembled on the housing, the pins having sockets for inserting chip body pins, and a perforated heat dissipation hole at the center of the housing.

[0010] Preferably, the bottom layer is a nanocrystalline soft magnetic material layer made of nanocrystalline ribbon with a thickness of approximately 20 μm; the conductive polymer layer is made of poly(3,4-vinyldioxythiophene)-polystyrene sulfonic acid, i.e., PEDOT:PSS conductive polymer, with a thickness of approximately 15 μm; the heat dissipation layer uses a diamond film as an interface layer, embedded with a paraffin-based composite phase change material, with a thickness of approximately 25 μm; and the surface conductive film layer is composed of graphene and silver nanowires in a mass ratio of 1:4, with a thickness of 5 μm.

[0011] Preferably, the vertical distance between the bottom layer and the chip is between 0.1 mm and 1 mm.

[0012] Preferably, the bottom layer, conductive polymer layer, heat dissipation layer, and surface conductive film layer are all fixed by adhesive.

[0013] Preferably, the space between the bottom layer and the conductive polymer layer is filled with conductive adhesive, such as silver epoxy resin, and the space between the heat dissipation layer and the surface conductive film layer is filled with insulating adhesive, such as silicone.

[0014] Preferably, the encapsulated shell is made of plastic containing conductive filler, such as carbon black, metal fiber, or metal powder. Adding the above-mentioned conductive filler to traditional thermoplastic or thermosetting plastics gives the encapsulated shell a certain degree of conductivity, thereby achieving shielding against electromagnetic interference.

[0015] Preferably, the substrate is a BT resin copper-clad substrate.

[0016] The beneficial effects of this utility model by adopting the above structure are as follows:

[0017] 1. By setting up a composite shielding layer, the nanocrystalline soft magnetic bottom layer absorbs low-frequency magnetic field interference through high magnetic permeability, the conductive polymer layer reflects medium and high frequency electromagnetic waves through conductive network, and the surface conductive film layer shields electric field interference, forming a multi-band shielding effect. In addition, the plastic encapsulation shell containing conductive filler has a certain conductivity, thereby achieving electromagnetic interference shielding. The dual shielding effect enhances the electromagnetic shielding performance of this product.

[0018] 2. The heat dissipation layer is designed with high thermal conductivity materials, which can indirectly conduct the heat generated by the chip to the heat dissipation layer through adjacent layers. The embedded paraffin-based composite phase change material can absorb transient heat loads, and then the surface conductive film layer of the high emissivity material can release the heat to the external environment through thermal radiation or convection. In addition, the heat dissipation holes on the DIP socket shell can also form an additional heat dissipation path.

[0019] 3. The conductive adhesive is filled between the bottom layer and the conductive polymer layer to reduce contact resistance, while the insulating adhesive is filled between the heat dissipation layer and the surface layer to buffer thermal stress and suppress the risk of delamination. Attached Figure Description

[0020] Figure 1 A schematic diagram of the external structure of a chip packaging structure with electromagnetic shielding provided in this application;

[0021] Figure 2 This is a schematic diagram of the internal structure of the chip body in this application;

[0022] Figure 3 for Figure 2 A magnified view of part A in the middle;

[0023] Figure 4 This is a schematic diagram of the combination of the chip body and the DIP socket;

[0024] Figure 5 for Figure 4 A schematic diagram of the bottom structure.

[0025] Among them, 1. chip body, 2. composite shielding layer, 3. DIP socket;

[0026] 11. Plastic encapsulated housing; 12. Upper housing; 13. Lower housing; 14. Pins; 15. Substrate; 16. Chip; 17. Bonding wire;

[0027] 21. Bottom layer; 22. Conductive polymer layer; 23. Heat dissipation layer; 24. Surface conductive film layer.

[0028] 31. Outer casing; 32. Pins; 33. Heat dissipation holes.

[0029] The accompanying drawings are provided to further understand the present invention and form part of the specification. They are used together with the embodiments of the present invention to explain the present invention and do not constitute a limitation thereof. Detailed Implementation

[0030] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present utility model. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present utility model without creative effort are within the protection scope of the present utility model.

[0031] In this application, unless otherwise expressly specified and limited, the terms "set," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0032] In the description of this utility model, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0033] Example 1

[0034] like Figure 1 and Figure 2 As shown, the present invention proposes a chip packaging structure with electromagnetic shielding, including a chip body 1, which includes a plastic encapsulation shell 31. The plastic encapsulation shell 31 is composed of an upper shell 12 and a lower shell 13, and has a plurality of pins 14 on both sides. The lower shell 13 has a substrate 15 inside, and a chip 16 electrically connected to the substrate 15 is disposed on the substrate 15. A bonding wire 17 is provided between the pins 14 and the chip 16.

[0035] The substrate 15 is a BT resin copper-clad substrate 15. The chip 16 is fixed on the substrate 15 by welding or bonding. The chip 16 and the pin 14 are connected by metal wires. The connection method can be ultrasonic welding, thermo-press welding or gold wire bonding to ensure good electrical connection.

[0036] refer to Figure 2 and Figure 3 As shown, in order to improve the electromagnetic shielding performance of the chip body 1, a composite shielding layer 2 is provided on the inner top of the upper housing 12. The composite shielding layer 2 includes a bottom layer 21, a conductive polymer layer 22, a heat dissipation layer 23 and a surface conductive film layer 24 stacked in sequence. The bottom layer 21 is disposed on the side close to the chip 16, and the surface conductive film layer 24 is attached to the inner top of the upper housing 12.

[0037] The vertical distance between the bottom layer 21 and the chip 16 is between 0.1mm and 1mm, and can be adjusted according to requirements. If extremely high electromagnetic shielding performance is required, the distance can be set between 0.1mm and 0.3mm to maximize shielding effectiveness. If heat dissipation performance is to be improved, the distance can be controlled between 0.3mm and 0.5mm to ensure that the heat conduction path is as short as possible while also taking shielding effectiveness into account.

[0038] As one example:

[0039] The bottom layer 21 is a nanocrystalline soft magnetic material layer made of nanocrystalline ribbon with a thickness of approximately 20 μm. It absorbs low-frequency electromagnetic interference through a magnetic loss mechanism and is positioned close to the chip 16 to reduce the attenuation of electromagnetic waves during propagation. It also absorbs low-frequency magnetic field interference (<100MHz) through high permeability (μ_r>104).

[0040] The conductive polymer is poly(3,4-vinyldioxythiophene-polystyrene sulfonic acid), namely PEDOT:PSS conductive polymer, with a thickness of about 15 μm. It uses a conductive network (σ>1000S / m) to reflect mid-to-high frequency electromagnetic waves (100MHz-1GHz).

[0041] The heat dissipation layer 23 uses a diamond film as the interface layer and embeds a paraffin-based composite phase change material with a thickness of about 25 μm to conduct away the heat generated by the chip 16.

[0042] The surface conductive film layer 24 is composed of graphene and silver nanowires in a mass ratio of 1:4 and has a thickness of 5μm. The surface conductive film (sheet resistance <0.1Ω / sq) shields electric field interference above 1GHz, forming full-band shielding.

[0043] In this embodiment, the nanocrystalline soft magnetic bottom layer 21 absorbs low-frequency magnetic field interference through high magnetic permeability, the conductive polymer layer 22 reflects medium- and high-frequency electromagnetic waves using a conductive network, and the surface conductive film layer 24 shields electric field interference, forming a multi-band shielding effect.

[0044] Furthermore, the encapsulated shell 31 is made of plastic containing conductive filler, such as carbon black, metal fibers, or metal powder. Adding this conductive filler to traditional thermoplastic or thermosetting plastics gives the encapsulated shell 31 a certain degree of conductivity, thereby achieving shielding against electromagnetic interference. Combined with the composite shielding layer 2, this forms a double shielding effect, enhancing the electromagnetic shielding performance of this product.

[0045] As one example:

[0046] In the above interlayer combination, the bottom layer 21, the conductive polymer layer 22, the heat dissipation layer 23, and the surface conductive film layer 24 are all fixed by adhesives.

[0047] The bottom layer 21 and the conductive polymer layer 22 are filled with conductive adhesive, such as silver epoxy resin, to reduce contact resistance. The heat dissipation layer 23 and the surface conductive film layer 24 are filled with insulating adhesive, such as silicone, to buffer thermal stress and suppress the risk of delamination.

[0048] Example 2

[0049] refer to Figure 4 and Figure 5 As shown, it also includes a DIP socket 3 that matches the chip body 1, which includes a housing 31. The housing 31 is made of an insulating material that matches the plastic encapsulation housing 31. A pin 32 is assembled on the housing 31. The pin 32 has a socket for the pin 14 of the chip body 1 to be inserted.

[0050] In addition, a perforated heat dissipation hole is provided at the center of the outer shell 31. Combined with the heat dissipation layer 23 and the composite shielding layer 2, this further enhances heat dissipation. The heat dissipation layer 23 contains a highly thermally conductive material, which can indirectly conduct the heat generated by the chip 16 to the heat dissipation layer 23 through adjacent layers. The embedded paraffin-based composite phase change material can absorb transient thermal loads, and then the heat is released to the external environment through thermal radiation or convection using the surface conductive film layer 24 of the high emissivity material. Furthermore, the perforated heat dissipation hole on the outer shell 31 of the DIP socket 3 also forms an additional heat dissipation path.

[0051] The present invention and its embodiments have been described above. This description is not restrictive, and the accompanying drawings are only one embodiment of the present invention; the actual structure is not limited thereto. In conclusion, if those skilled in the art are inspired by this description and design similar structures and embodiments without departing from the inventive spirit of the present invention, such designs should fall within the protection scope of the present invention.

Claims

1. A chip packaging structure with electromagnetic shielding, comprising a chip body (1) and a DIP socket (3), wherein the chip body (1) comprises a plastic encapsulation shell (11), the plastic encapsulation shell (11) is composed of an upper shell (12) and a lower shell (13), and a plurality of pins (14) are provided on both sides; a substrate (15) is provided inside the lower shell (13), and a chip (16) electrically connected to the substrate (15) is disposed on the substrate (15); a bonding wire (17) is provided between the pins (14) and the chip (16); the DIP socket (3) comprises a shell (31), a pin (32) is assembled on the shell (31), the pin (32) is provided with a socket for the pins (14) of the chip body (1) to be inserted, and a hollow heat dissipation hole (33) is opened at the center of the shell (31), characterized in that: The encapsulated shell (11) is made of plastic containing conductive filler, and the shell (31) is made of insulating material that matches the encapsulated shell (11). The inner top of the upper shell (12) is provided with a composite shielding layer (2). The composite shielding layer (2) includes a bottom layer (21), a conductive polymer layer (22), a heat dissipation layer (23), and a surface conductive film layer (24) stacked in sequence. The bottom layer (21) is located on the side close to the chip (16), and the surface conductive film layer (24) is attached to the inner top of the upper shell (12).

2. The chip packaging structure with electromagnetic shielding as described in claim 1, characterized in that: The bottom layer (21) is a nanocrystalline soft magnetic material layer made of nanocrystalline ribbon; the vertical distance between the bottom layer (21) and the chip (16) is between 0.1 mm and 1 mm.

3. A chip packaging structure with electromagnetic shielding as described in claim 2, characterized in that: The conductive polymer layer (22) is made of poly(3,4-vinyldioxythiophene-polystyrene sulfonic acid), i.e., PEDOT:PSS conductive polymer.

4. A chip packaging structure with electromagnetic shielding as described in claim 3, characterized in that: The heat dissipation layer (23) uses a diamond film as the interface layer and embeds a paraffin-based composite phase change material.

5. A chip packaging structure with electromagnetic shielding as described in claim 4, characterized in that: The surface conductive film layer (24) is composed of graphene and silver nanowires.

6. A chip packaging structure with electromagnetic shielding as described in any one of claims 1-5, characterized in that: The bottom layer (21), conductive polymer layer (22), heat dissipation layer (23) and surface conductive film layer (24) are all fixed by adhesive.

7. A chip packaging structure with electromagnetic shielding as described in claim 6, characterized in that: The bottom layer (21) is filled with conductive adhesive between itself and the conductive polymer layer (22), and the heat dissipation layer (23) is filled with insulating adhesive between itself and the surface conductive film layer (24).

8. A chip packaging structure with electromagnetic shielding as described in claim 1, characterized in that: The conductive filler is carbon black, metal fiber, or metal powder.

9. A chip packaging structure with electromagnetic shielding as described in claim 1, characterized in that: The substrate (15) is a BT resin copper-clad substrate.

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