A capacitive grid caliper measurement chip and measurement circuit
Patent Information
- Application Number
- CN202521813967.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-26
- Publication Date
- 2026-09-04
- Estimated Expiration
- 2035-08-26
AI Technical Summary
[0004]鉴于背景技术的不足,本实用新型是提供了一种容栅卡尺测量芯片和测量电路,所要解决的技术问题是现有的容栅卡尺测量芯片由于用于产生激励脉冲的时钟信号频率是固定的,不能改变测量速度,兼容性差,且不能适应宽范围的供电应用场景
本实用新型与现有技术相比所具有的有益效果是:本实用新型通过设置输出频率可调的振荡器,这样可以调整输入到分频单元的时钟信号的频率大小,进而可以调整输入到脉冲调制单元的时钟信号频率大小,最终能调整与脉冲调制单元连接的容栅传感器的测量速度,实现测量速度可调;另外通过设置自适应供电单元来通过外置电池电压来进行供电,增加了供电选择空间,而且自适应供电单元通过设置LDO线性稳压单元来对单节电池、两节电池或者三节电池的电池电压进行稳压输出,使芯片具有宽范围自适应供电能力。
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Figure CN224719371U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of capacitive caliper measurement technology, specifically to a capacitive caliper measuring chip and measuring circuit. Background Technology
[0002] When a capacitive grating sensor is used for distance measurement, under a specific excitation pulse, the phase change of its output signal maintains an equal relationship with the displacement. Based on this characteristic, by processing and sampling the output signal of the capacitive grating sensor through a capacitive grating caliper measuring chip, the capacitive grating sensor can be applied to fields such as micro-displacement measurement.
[0003] Existing capacitive caliper measuring chips use a fixed clock signal frequency to generate excitation pulses, resulting in a fixed measurement speed. This makes them unsuitable for high-speed measurement applications and leads to poor compatibility. Furthermore, existing capacitive caliper measuring chips are powered by a single internal power supply voltage, which has high voltage requirements and cannot adapt to a wide range of power supply applications, such as applications using single, dual, or multiple batteries simultaneously. Utility Model Content
[0004] In view of the shortcomings of the background technology, the present invention provides a capacitive caliper measuring chip and measuring circuit. The technical problem to be solved is that the existing capacitive caliper measuring chips have a fixed clock signal frequency for generating excitation pulses, which cannot change the measurement speed, have poor compatibility, and cannot adapt to a wide range of power supply application scenarios.
[0005] To solve the above technical problems, this utility model provides the following technical solution: a capacitive caliper measuring chip, including an adaptive power supply unit and a data processing module. The adaptive power supply unit provides power supply voltage to the data processing module based on the battery voltage. The data processing module includes an oscillator with selectable output frequency, a frequency division unit, a pulse modulation unit, an amplification and demodulation unit, and a sampling and counting unit. The frequency division unit is used to divide the clock signal output by the oscillator, and inputs a first frequency-divided clock signal to the pulse modulation unit and a second frequency-divided clock signal to the sampling and counting unit. The pulse modulation unit outputs an excitation signal based on the first frequency-divided clock signal. The excitation signal is used to input to the capacitive grating sensor to drive the capacitive grating sensor to work. The amplification and demodulation unit is used to amplify and demodulate the output signal of the capacitive grating sensor. The demodulation is to convert the AC output signal into a DC demodulated signal. The sampling and counting unit is electrically connected to the amplification and demodulation unit, and converts the demodulated signal into a binary digital signal based on the second frequency division clock signal.
[0006] In one embodiment, the oscillator includes a Schmitt trigger SMIT1, an inverter INV1, an inverter INV2, an inverter INV3, and a capacitor C1; The output of Schmitt trigger SMIT1 is electrically connected to the input of inverter INV1. The output of inverter INV1 is electrically connected to one end of capacitor C1 and the input of inverter INV2. The other end of capacitor C1 is electrically connected to the input of Schmitt trigger SMIT1. The output of inverter INV2 is electrically connected to the input of inverter INV3. The output of inverter INV3 is used to output the clock signal. At least two resistor branches are connected in parallel between the other end of capacitor C1 and the output terminal of inverter INV2. Each resistor branch includes a frequency modulation resistor and a frequency modulation switch connected in series.
[0007] In one embodiment, the number of resistor branches is 4, 8, 16, or 32.
[0008] In one embodiment, the adaptive power supply unit includes a switch S1, a switch S2, and an LDO linear regulator unit. The input terminal of the switch S1 is used to connect to the battery voltage, and the output terminal of the switch S1 is electrically connected to the output terminal of the switch S2. The input terminal of the switch S2 is electrically connected to the voltage output terminal of the LDO linear regulator unit, which is used to regulate the battery voltage.
[0009] In one embodiment, the present invention further includes an XALU calculation unit, which is electrically connected to the sampling and counting unit and is used to convert the binary digital signal into a decimal display signal. In practical use, the XALU calculation unit significantly compresses data processing time and reduces power consumption by specifically converting binary data into decimal data for LCD display, allowing the chip to maintain low power consumption even when performing high-speed measurements.
[0010] In one implementation, the digital signal is a binary digital signal.
[0011] In one embodiment, the XALU computing unit includes a decoding unit, an opcode storage unit, a gated data storage unit, a temporary storage unit, and a computing core; The decoding unit is used to perform data read and write operations on the opcode storage unit and the grating data storage unit, respectively. The computing core is electrically connected to the opcode storage unit. Based on the contents of the opcode storage unit, it processes the data in the grating data storage unit and the temporary storage unit to generate a decimal display signal. The processing includes, but is not limited to, addition, subtraction, shifting, inversion, and BCD code conversion.
[0012] In one embodiment, a key detection unit is further included. The key detection unit is electrically connected to the peripheral key and inputs an operation signal to the decoding unit based on the on / off state of the peripheral key. The decoding unit processes the data in the capacitive data storage unit and the temporary storage unit based on the operation signal. The processing includes clearing and resetting.
[0013] Secondly, this utility model also provides a capacitance caliper measuring circuit, including the aforementioned capacitance caliper measuring chip, and further including a button and an LCD display unit. The button is electrically connected to the button detection unit, and the XALU calculation unit is electrically connected to the LCD display unit, used to display the display signal on the LCD display unit. The advantages of this invention compared to existing technologies are as follows: By setting an oscillator with an adjustable output frequency, the frequency of the clock signal input to the frequency divider unit can be adjusted, which in turn can adjust the frequency of the clock signal input to the pulse modulation unit, ultimately adjusting the measurement speed of the capacitive grating sensor connected to the pulse modulation unit, thus achieving adjustable measurement speed. In addition, by setting an adaptive power supply unit to supply power through the external battery voltage, the power supply selection space is increased. Moreover, the adaptive power supply unit uses an LDO linear regulator unit to regulate the battery voltage of a single battery, two batteries, or three batteries, giving the chip a wide-range adaptive power supply capability. Attached Figure Description
[0014] Figure 1 This is a schematic diagram of the connection between the capacitive caliper measuring chip and the capacitive caliper sensor in Example 1; Figure 2 This is a schematic diagram of another structure for connecting the capacitive caliper measuring chip and the capacitive caliper sensor in Embodiment 1; Figure 3 This is a circuit diagram of the oscillator in Example 1; Figure 4 This is a structural diagram of the XALU computing unit in Example 1; Figure 5 This is a circuit diagram of the adaptive power supply unit in Embodiment 2; Figure 6 This is a schematic diagram of the measurement circuit in Example 2. Detailed Implementation
[0015] The present invention will now be described in further detail with reference to the accompanying drawings. These drawings are simplified schematic diagrams, illustrating only the basic structure of the present invention, and therefore only show the components relevant to the present invention.
[0016] Example 1 like Figure 1 As shown, the capacitive caliper measuring chip 1 provided in this embodiment includes an adaptive power supply unit 7 and a data processing module 2. The adaptive power supply unit 7 provides power supply voltage to the data processing module 2 based on the battery voltage VDD. The data processing module 2 includes an oscillator 20 with selectable output frequency, a frequency division unit 21, a pulse modulation unit 22, an amplification and demodulation unit 23, and a sampling and counting unit 24. Frequency division unit 21 is used to divide the clock signal output by oscillator 20, and inputs the first frequency division clock signal to pulse modulation unit and the second frequency division clock signal to sampling and counting unit respectively. Pulse modulation unit 22 outputs excitation signal based on the first frequency division clock signal. The excitation signal is used to input to capacitive grating sensor 5 to drive capacitive grating sensor 5 to work. The amplification and demodulation unit 23 is used to amplify and demodulate the output signal of the capacitive grating sensor 5. The demodulation is to convert the AC output signal into a DC demodulated signal. The sampling and counting unit 24 is electrically connected to the amplification and demodulation unit 23, and converts the demodulated signal into a binary digital signal based on the second frequency division clock signal.
[0017] In practical use, this utility model sets up an oscillator 20 with an adjustable output frequency, which can adjust the frequency of the clock signal input to the frequency divider unit 21, thereby adjusting the frequency of the clock signal input to the pulse modulation unit 23, and finally adjusting the measurement speed of the capacitive grating sensor 5 connected to the pulse modulation unit 22, thus achieving adjustable measurement speed.
[0018] It should be noted that the pulse modulation unit 22 generating the excitation signal based on the first frequency-divided clock signal is existing technology and will not be described in detail here. The pulse modulation unit 22 generates eight excitation signals. The circuits for signal amplification and demodulation in the amplification and demodulation unit 23 can both use existing circuits.
[0019] Specifically, in this embodiment, the circuit of the oscillator 20 is as follows: Figure 3 As shown, in Figure 3 In the oscillator 20, there are Schmitt trigger SMIT1, inverter INV1, inverter INV2, inverter INV3 and capacitor C1; The output of Schmitt trigger SMIT1 is electrically connected to the input of inverter INV1. The output of inverter INV1 is electrically connected to one end of capacitor C1 and the input of inverter INV2. The other end of capacitor C1 is electrically connected to the input of Schmitt trigger SMIT1. The output of inverter INV2 is electrically connected to the input of inverter INV3. The output of inverter INV3 is used to output the clock signal. The other end of capacitor C1 is connected in parallel with the output of inverter INV2 by n resistor branches 200. Each resistor branch includes a frequency modulation resistor and a frequency modulation switch connected in series. To distinguish them, the frequency modulation resistor and frequency modulation switch of different resistor branches 200 are displayed with different labels. In addition, n is a positive integer greater than 1.
[0020] In practical use, by controlling the on / off state of the frequency modulation switch in the resistor branch 200, the resistance between the other end of capacitor C1 and the output terminal of inverter INV2 can be set, thereby adjusting the frequency of the clock signal output by oscillator 20.
[0021] More specifically, in this embodiment, the number of resistor branches is 4, 8, 16, or 32.
[0022] In this embodiment, the circuit of the adaptive power supply unit 70 is as follows: Figure 5 As shown, the system includes switches S1 and S2, and an LDO linear regulator unit 70. The input of switch S1 is connected to the battery voltage VDD. The output of switch S1 is electrically connected to the output of switch S2. The input of switch S2 is electrically connected to the voltage output of the LDO linear regulator unit 70. The LDO linear regulator unit 70 regulates the battery voltage VDD. When the battery voltage VDD meets the requirements, it can be directly powered through switch S1. When the battery voltage VDD does not meet the requirements, the LDO linear regulator unit 70 can adaptively regulate the battery voltage VDD before powering the system.
[0023] In practical use, the LDO linear regulator unit 70 allows the measurement chip to be powered directly by a variety of power sources, such as single or two button batteries, lithium batteries, and dry batteries, without any external voltage regulators. This significantly expands the application scenarios while maintaining the original cost.
[0024] In actual implementation, the on / off states of switches S1 and S2 in the adaptive power supply unit 70 and the enable state of the LDO linear regulator unit 70 can be flexibly configured by means of configuration registers, fuse programming, etc. For example, when switch S1 is on, switch S2 is off and the LDO linear regulator unit 70 is not enabled; when switch S1 is off, switch S2 is on and the LDO linear regulator unit 70 is enabled.
[0025] In this embodiment, as Figure 2 As shown, this utility model also includes an XALU calculation unit 3, which is electrically connected to the sampling and counting unit 24 and is used to convert binary digital signals into decimal display signals.
[0026] In this embodiment, the structure of the XALU computing unit is as follows: Figure 4 As shown, it includes a decoding unit 30, an opcode storage unit op[3:0], a gated data storage unit 31, a temporary storage unit 32, and a computing core 33; Decoding unit 20 is used to perform data read and write operations on opcode storage unit op[3:0] and grating data storage unit 31, respectively; The calculation core 33 is electrically connected to the opcode storage unit op[3:0]. Based on the contents of the opcode storage unit op[3:0], it processes the data in the grating data storage unit 31 and the temporary storage unit 32 to generate a decimal display signal. The processing includes, but is not limited to, addition, subtraction, shifting, inversion and BCD code conversion.
[0027] exist Figure 4 In this text, the structure of the XALU computing unit 3 is the existing structure, and will not be described in detail here. Among them, ab[6:0] is the address bus, db[7:0] is the data bus, the byt signal is used to select whether the gate data storage unit 31 or the temporary storage unit 32 is selected, and the two-bit selection register sel[1:0] is used to select one of the four temporary storage registers in the temporary storage unit 32 for processing.
[0028] In practical use, the XALU computing unit 3 converts binary data into decimal data for LCD display, which greatly reduces data processing time and power consumption, allowing the chip to maintain low power consumption even when performing high-speed measurements.
[0029] In this embodiment, as Figure 2 As shown, the chip in this embodiment also includes a button detection unit 4, which is electrically connected to the peripheral button and inputs an operation signal to the decoding unit 30 based on the on / off state of the peripheral button. The decoding unit 30 processes the data in the capacitive gate data storage unit and the temporary storage unit based on the operation signal, including clearing and resetting.
[0030] Example 2 like Figure 6As shown, this utility model also provides a capacitance caliper measuring circuit, including a capacitance caliper measuring chip as described in Embodiment 1, and also includes a button 5 and an LCD display unit 6. The button 5 is electrically connected to the button detection unit 4, and the XALU calculation unit 3 is electrically connected to the LCD display unit 6, for displaying the display signal on the LCD display unit.
[0031] Based on the above description and inspired by this utility model, those skilled in the art can make various changes and modifications without departing from the technical concept of this utility model. The technical scope of this utility model is not limited to the contents of the specification, but must be determined according to the scope of the claims.
Claims
1. A caliper measuring chip, characterized in that, It includes an adaptive power supply unit and a data processing module. The adaptive power supply unit provides power to the data processing module based on the battery voltage. The data processing module includes an oscillator with selectable output frequency, a frequency division unit, a pulse modulation unit, an amplification and demodulation unit, and a sampling and counting unit. The frequency division unit is used to divide the clock signal output by the oscillator, and inputs a first frequency-divided clock signal to the pulse modulation unit and a second frequency-divided clock signal to the sampling and counting unit. The pulse modulation unit outputs an excitation signal based on the first frequency-divided clock signal. The excitation signal is used to input to the capacitive grating sensor to drive the capacitive grating sensor to work. The amplification and demodulation unit is used to amplify and demodulate the output signal of the capacitive grating sensor. The demodulation is to convert the AC output signal into a DC demodulated signal. The sampling and counting unit is electrically connected to the amplification and demodulation unit, and converts the demodulated signal into a binary digital signal based on the second frequency division clock signal.
2. The capacitive caliper measuring chip according to claim 1, characterized in that, The oscillator includes a Schmitt trigger SMIT1, an inverter INV1, an inverter INV2, an inverter INV3, and a capacitor C1; The output of Schmitt trigger SMIT1 is electrically connected to the input of inverter INV1. The output of inverter INV1 is electrically connected to one end of capacitor C1 and the input of inverter INV2. The other end of capacitor C1 is electrically connected to the input of Schmitt trigger SMIT1. The output of inverter INV2 is electrically connected to the input of inverter INV3. The output of inverter INV3 is used to output the clock signal. At least two resistor branches are connected in parallel between the other end of capacitor C1 and the output terminal of inverter INV2. Each resistor branch includes a frequency modulation resistor and a frequency modulation switch connected in series.
3. The capacitive caliper measuring chip according to claim 2, characterized in that, The number of resistor branches is 4, 8, 16 or 32.
4. A capacitive caliper measuring chip according to claim 1, characterized in that, The adaptive power supply unit includes a switch S1, a switch S2, and an LDO linear regulator unit. The input terminal of the switch S1 is used to connect to the battery voltage. The output terminal of the switch S1 is electrically connected to the output terminal of the switch S2. The input terminal of the switch S2 is electrically connected to the voltage output terminal of the LDO linear regulator unit. The LDO linear regulator unit is used to regulate the battery voltage and output it.
5. A capacitive caliper measuring chip according to any one of claims 1-4, characterized in that, It also includes an XALU calculation unit, which is electrically connected to the sampling and counting unit and is used to convert the binary digital signal into a decimal display signal.
6. A capacitive caliper measuring chip according to claim 5, characterized in that, The XALU computing unit includes a decoding unit, an opcode storage unit, a gated data storage unit, a temporary storage unit, and a computing core; The decoding unit is used to perform data read and write operations on the opcode storage unit and the grating data storage unit, respectively. The computing core is electrically connected to the opcode storage unit. Based on the contents of the opcode storage unit, it processes the data in the grating data storage unit and the temporary storage unit to generate a decimal display signal. The processing includes, but is not limited to, addition, subtraction, shifting, inversion, and BCD code conversion.
7. A capacitive caliper measuring chip according to claim 6, characterized in that, It also includes a button detection unit, which is electrically connected to the peripheral button and inputs an operation signal to the decoding unit based on the on / off state of the peripheral button. The decoding unit processes the data in the capacitive data storage unit and the temporary storage unit based on the operation signal, and the processing includes clearing and resetting.
8. A caliper measuring circuit, characterized in that, The caliper measuring chip according to claim 7 further includes a button and an LCD display unit. The button is electrically connected to the button detection unit, and the XALU calculation unit is electrically connected to the LCD display unit for displaying the display signal on the LCD display unit.