AFCI self-test circuit, AFCI, and photovoltaic system

Abstract

The utility model relates to an AFCI self -checking circuit, AFCI and photovoltaic system, AFCI self -checking circuit includes: control processing unit is used for generating self -checking signal and noise AD frequency modulation signal, and carries out the failure analysis of feedback signal, signal conditioning unit is used for receiving and processing noise AD frequency modulation signal, and the noise AD frequency modulation signal that has passed through processing is fed back to control processing unit, voltage sampling unit, voltage sampling unit is used for receiving the self -checking signal, according to the voltage signal of the collection AFCI in hall coil Rct of the self -checking signal, and the voltage signal is transmitted to control processing unit. The utility model discloses through the cooperation of control processing unit, signal conditioning unit, voltage sampling unit, realizes the self -checking of whole arc signal and the judgement of circuit when hall coil is abnormal through single circuit, satisfies market demand, has higher commercial prospect.

Description

Technical Field

[0001] This utility model relates to the field of photovoltaic system technology, and in particular to an AFCI self-test circuit, AFCI, and photovoltaic system. Background Technology

[0002] According to safety regulations for AFCI (Arc Fault Interrupter), AFCI requires self-testing. Specifically, an AFCI self-test must be performed when the inverter is first powered on, and grid connection is only permitted after a successful self-test. Simultaneously, to ensure the inverter's operational safety, the system must allow users to perform manual self-tests during inverter operation. If hardware failures such as those in the current transformer (CT) or sampling circuit are detected, the AFCI self-test must be able to issue an alarm. A "self-test failure" fault can only be cleared by performing a second, successful self-test, or by powering down and restarting the inverter; therefore, a hardware self-test circuit is required to implement the AFCI system's self-testing.

[0003] However, the current AFCI self-test circuit requires an additional self-test coil to assist in judging circuit abnormalities, which increases the additional cost. Furthermore, it cannot simultaneously detect coil abnormalities and AFCI signal processing circuit abnormalities. Even if it could be achieved, its abnormality judgment circuit would be quite complex.

[0004] Therefore, there is a need for an AFCI self-test circuit, AFCI, and photovoltaic system that does not require an additional self-test coil, has low operating costs, can simultaneously detect coil malfunctions and AFCI signal processing circuit malfunctions, is simple in circuitry, and has high applicability. Utility Model Content

[0005] In order to overcome the shortcomings of the prior art, this utility model provides an AFCI self-test circuit, AFCI and photovoltaic system.

[0006] The technical solution of this utility model is as follows: An AFCI self-test circuit includes: The control processing unit is used to generate self-test signals and noise AD frequency modulation signals, and to perform fault analysis on the feedback signals; The signal conditioning unit is used to receive and process the noise AD frequency modulation signal, and to feed back the processed noise AD frequency modulation signal to the control processing unit. A voltage sampling unit is used to receive the self-test signal, acquire the voltage signal of the Hall coil Rct in AFCI based on the self-test signal, and transmit the voltage signal to the control processing unit.

[0007] As a further improvement of this utility model, the voltage sampling unit includes a first high voltage terminal Vdd1, a first resistor R1, a second resistor R2, a third resistor R3, a first switching transistor Q1, a first ground terminal GND1, and a first comparator U1; The first resistor R1 is connected in parallel with the Hall coil Rct. The first high-voltage terminal Vdd1 is electrically connected to the first terminal of the first resistor R1. The second terminal of the first resistor R1 is electrically connected to the first terminal of the second resistor R2. The second terminal of the second resistor R2 is electrically connected to the first terminal of the third resistor R3 and the non-inverting input terminal of the first comparator U1. The second terminal of the third resistor R3 is electrically connected to the first terminal of the first switching transistor Q1. The second terminal of the first switching transistor Q1 is electrically connected to the first ground terminal GND1. The control terminal of the first switching transistor Q1 is electrically connected to the control processing unit. The output terminal of the first comparator U1 is electrically connected to the inverting input terminal of the first comparator U1 and the control processing unit.

[0008] As a further improvement of this utility model, the Hall coil Rct, the first resistor R1, and the second resistor R2 are provided in multiples and correspond one-to-one with each other. The voltage sampling unit also includes a multi-select analog switch device. The input terminal of each multi-select analog switch device is electrically connected to the second terminal of a second resistor R2. The output terminal of the multi-select analog switch device is electrically connected to the third resistor R3 and the non-inverting input terminal of the first comparator U1. The control processing unit is electrically connected to the control terminal of the multi-select analog switch device.

[0009] As a further improvement of this utility model, a fourth resistor R4 is provided between the control processing unit and the control terminal of the first switching transistor Q1.

[0010] As a further improvement of this utility model, a fifth resistor R5 is provided between the control terminal of the first switch Q1 and the second terminal of the first switch Q1.

[0011] As a further improvement of this utility model, the voltage sampling unit further includes a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, and a second grounding terminal GND2; The first end of the sixth resistor R6 is electrically connected to the non-inverting input of the first comparator U1, and the second end of the sixth resistor R6 is electrically connected to the second end of the second resistor R2 and the first end of the third resistor R3. The first end of the seventh resistor R7 is electrically connected to the inverting input of the first comparator U1, and the second end of the seventh resistor R7 is electrically connected to the second ground terminal GND2. The eighth resistor R8 is disposed between the inverting input terminal of the first comparator U1 and the output terminal of the first comparator U1.

[0012] As a further improvement of this utility model, the output end of the control processing unit is provided with a signal transmission unit; The signal transmission unit includes a second high-voltage terminal Vdd2, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a second switching transistor Q2, and a third ground terminal GND3. The first end of the ninth resistor R9 is electrically connected to the output end of the control processing unit, and the second end of the ninth resistor R9 is electrically connected to the control end of the second switch Q2. The tenth resistor R10 is disposed between the control end of the second switch Q2 and the first end of the second switch Q2. The first end of the second switch Q2 is electrically connected to the third grounding end GND3. The second end of the second switch Q2 is electrically connected to the first end of the eleventh resistor R11 and the input end of the signal conditioning unit. The second end of the eleventh resistor R11 is electrically connected to the second high voltage end Vdd2.

[0013] As a further improvement of this utility model, the signal conditioning unit includes a signal amplification and conditioning circuit and a signal filtering and conditioning circuit. The signal amplification and conditioning circuit amplifies the noise AD frequency modulation signal, and the signal filtering and conditioning circuit filters the noise AD frequency modulation signal.

[0014] An AFCI includes the AFCI self-test circuit as described above, a Hall coil Rct, and a second comparator U2. The Hall coil Rct is electrically connected to the non-inverting input terminal of the second comparator U2, and the output terminal of the second comparator U2 is electrically connected to the inverting input terminal of the second comparator U2 and the input terminal of the signal conditioning unit.

[0015] A photovoltaic system comprising the AFCI as described above.

[0016] According to the above-described solution, the beneficial effects of this utility model are as follows: 1. This utility model, through the coordinated operation of the control processing unit, signal conditioning unit, and voltage sampling unit, can achieve self-testing of the overall arcing signal and judgment of the circuit when the Hall coil is abnormal through a single circuit, meeting market demand and having high commercial prospects.

[0017] 2. The Hall coil fault self-test circuit of this utility model is simple, easy to operate, and highly applicable; 3. The noise AD frequency modulation signal of this utility model is verified by a real arcing signal and stored in the control processing unit, which can ensure the accuracy of the signal after processing by the signal conditioning unit and improve the accuracy and reliability of self-testing. 4. This utility model uses a control processing unit to repeatedly switch multiple analog switching devices, enabling a single circuit to perform self-testing on all Hall coils. This simplifies the self-testing circuit and reduces the cost of use to some extent. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the structure of the first embodiment of the present utility model; Figure 2 This is a schematic diagram of the structure of the second embodiment of the present utility model; Figure 3 This is a structural schematic diagram of the third embodiment of the present utility model; Figure 4 This is a structural schematic diagram of the fourth embodiment of the present invention. Detailed Implementation

[0019] The technical solution of this utility model will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this utility model. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this utility model.

[0020] In the description of this utility model, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the accompanying drawings and are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0021] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances. Furthermore, the technical features involved in the different embodiments of this utility model described below can be combined with each other as long as they do not conflict with each other.

[0022] See Figure 1 This utility model provides an AFCI self-test circuit, comprising: The control processing unit is used to generate self-test signals and noise AD frequency modulation signals, and to perform fault analysis on the feedback signals; The signal conditioning unit is used to receive and process the noise AD frequency modulation signal, and feed the processed noise AD frequency modulation signal back to the control processing unit. The voltage sampling unit is used to receive the self-test signal, acquire the voltage signal of the Hall coil Rct in AFCI based on the self-test signal, and transmit the voltage signal to the control processing unit.

[0023] When AFCI (Arc Fault Interrupter) self-testing is required, the Hall coil Rct self-test and the arcing signal self-test are performed separately in two paths. Specifically, the voltage sampling unit and the control processing unit perform the Hall coil Rct self-test, while the control processing unit and the signal conditioning unit perform the arcing signal self-test. This invention, through the coordinated operation of the control processing unit, the signal conditioning unit, and the voltage sampling unit, can achieve self-testing of the overall arcing signal and judgment of the circuit when the Hall coil Rct is abnormal through a single circuit, meeting market demands and possessing high commercial prospects. Furthermore, the noise AD frequency modulation signal is verified by the actual arcing signal and stored in the control processing unit, ensuring the accuracy of the signal after processing by the signal conditioning unit and improving the accuracy and reliability of the self-test.

[0024] As one embodiment of this utility model, the voltage sampling unit includes a first high-voltage terminal Vdd1, a first resistor R1, a second resistor R2, a third resistor R3, a first switching transistor Q1, a first ground terminal GND1, and a first comparator U1; The first resistor R1 is connected in parallel with the Hall coil Rct. The first high-voltage terminal Vdd1 is electrically connected to the first terminal of the first resistor R1. The second terminal of the first resistor R1 is electrically connected to the first terminal of the second resistor R2. The second terminal of the second resistor R2 is electrically connected to the first terminal of the third resistor R3 and the non-inverting input terminal of the first comparator U1. The second terminal of the third resistor R3 is electrically connected to the first terminal of the first switching transistor Q1. The second terminal of the first switching transistor Q1 is electrically connected to the first ground terminal GND1. The control terminal of the first switching transistor Q1 is electrically connected to the control processing unit. The output terminal of the first comparator U1 is electrically connected to the inverting input terminal of the first comparator U1 and the control processing unit.

[0025] The Hall coil Rct self-test procedure is as follows: The control processing unit sends a self-test signal and a high-level signal to the control terminal of the first switching transistor Q1, causing the first and second terminals of the first switching transistor Q1 to conduct. Under the voltage division effect of the Hall coil Rct, the first resistor R1, the second resistor R2, and the third resistor R3, the first high-voltage terminal Vdd1 inputs an input voltage to the non-inverting input terminal of the first comparator U1. At this time, the output voltage Vo1 of the output terminal of the first comparator U1 is: ; When the Hall coil Rct is faulty, such as in the case of an open circuit, the Hall coil Rct no longer divides the voltage at the first high-voltage terminal Vdd1. At this time, the first high-voltage terminal Vdd1 only provides an input voltage to the non-inverting input of the first comparator U1 under the voltage division effect of the first resistor R1, the second resistor R2, and the third resistor R3. The output voltage Vo2 at the output terminal of the first comparator U1 is then: ; At this time, the output voltage Vo2 of the first comparator U1 is less than the output voltage Vo1 when the Hall coil Rct is normal. The control processing unit determines whether there is an abnormality in the Hall coil Rct by receiving the output voltage Vo. The control processing unit has a first threshold voltage V1. The control processing unit compares the output voltage Vo of the first comparator U1 with the first threshold voltage V1. If the output voltage Vo is greater than the first threshold voltage V1, the Hall coil Rct is normal. If the output voltage Vo is less than or equal to the first threshold voltage V1, the Hall coil Rct is abnormal. Optionally, the first threshold voltage V1 can be adjusted and set according to specific usage requirements. The maximum value of the first threshold voltage V1 is 3V.

[0026] As an embodiment of this utility model, a fourth resistor R4 is provided between the control processing unit and the control terminal of the first switching transistor Q1. The fourth resistor R4 has a current limiting effect. The fourth resistor R4 limits the current of the high level sent by the control processing unit, thereby limiting the current at the control terminal of the first switching transistor Q1 and preventing the first switching transistor Q1 from being damaged due to excessive current.

[0027] As an embodiment of this utility model, a fifth resistor R5 is provided between the control terminal of the first switching transistor Q1 and the second terminal of the first switching transistor Q1. The fifth resistor R5 is used to stabilize the static operating point of the first switching transistor Q1, prevent the first switching transistor Q1 from being mistakenly turned on due to interference or leakage when the control processing unit does not issue a self-test signal, ensure that the first switching transistor Q1 is in a reliable cut-off state, clarify the static operating point, avoid unnecessary impact on the normal operation of AFCI, and improve the overall working stability and reliability.

[0028] See Figure 2 As one embodiment of this utility model, the voltage sampling unit further includes a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, and a second grounding terminal GND2. The first end of the sixth resistor R6 is electrically connected to the non-inverting input of the first comparator U1, and the second end of the sixth resistor R6 is electrically connected to the second end of the second resistor R2 and the first end of the third resistor R3. The first end of the seventh resistor R7 is electrically connected to the inverting input of the first comparator U1, and the second end of the seventh resistor R7 is electrically connected to the second ground terminal GND2. The eighth resistor R8 is placed between the inverting input terminal of the first comparator U1 and the output terminal of the first comparator U1. Under the action of the seventh resistor R7 and the eighth resistor R8, the reference voltage of the non-inverting input terminal of the first comparator U1 is changed through positive feedback, thereby forming two thresholds. The input signal must cross the corresponding threshold for the output to flip, which avoids the first comparator U1 from frequently switching outputs due to small fluctuations in the input signal. This greatly improves the anti-interference capability of the circuit and enhances the overall working stability and reliability. The eighth resistor R8 can be adjusted according to specific usage requirements. The larger the resistance of the eighth resistor R8, the stronger the anti-interference capability. The sixth resistor R6 is a balancing resistor used to balance the offset voltage caused by the input bias current, ensuring the stability of the static operating point. In order to ensure that the external resistances of the non-inverting input and the inverting input of the first comparator U1 are equal, the resistance of the sixth resistor R6 is the parallel value of the seventh resistor R7 and the eighth resistor R8, that is, R6=R7 / / R8. At this time, the voltage drop generated by the bias current at the non-inverting input and the inverting input of the first comparator U1 is equal in magnitude and opposite in direction, and cancels each other out inside the first comparator U1, thereby eliminating the output offset caused by the bias current and improving the overall working stability and reliability.

[0029] When the Hall coil Rct is normal, the output voltage Vo3 at the output terminal of the first comparator U1 is: ; When there is an abnormality in the Hall coil Rct, such as an open circuit, the output voltage Vo4 at the output terminal of the first comparator U1 is: ; The control processing unit determines whether there is an abnormality in the Hall coil Rct based on the output voltage Vo of the first comparator U1.

[0030] As one embodiment of this utility model, the output end of the control processing unit is provided with a signal transmission unit; The signal transmission unit includes a second high-voltage terminal Vdd2, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a second switching transistor Q2, and a third ground terminal GND3. The first end of the ninth resistor R9 is electrically connected to the output end of the control processing unit, and the second end of the ninth resistor R9 is electrically connected to the control end of the second switch Q2. The tenth resistor R10 is placed between the control end of the second switch Q2 and the first end of the second switch Q2. The first end of the second switch Q2 is electrically connected to the third grounding end GND3. The second end of the second switch Q2 is electrically connected to the first end of the eleventh resistor R11 and the input end of the signal conditioning unit. The second end of the eleventh resistor R11 is electrically connected to the second high voltage end Vdd2. The self-test procedure for the arcing signal is as follows: The control processing unit sends its stored noise AD frequency modulation signal to the signal conditioning unit for signal processing via the signal transmission unit. The processed noise AD frequency modulation signal is then fed back to the control processing unit. The control processing unit uses the feedback noise AD frequency modulation signal to determine whether there is an abnormality in the signal conditioning unit, i.e., whether there is an abnormality in the AFCI signal processing circuit. The control processing unit has a second threshold voltage V2. The control processing unit compares the feedback noise AD frequency modulation signal with the second threshold V2. If the feedback noise AD frequency modulation signal is greater than the second threshold V2, the signal conditioning unit is considered to be normal. If the feedback noise AD frequency modulation signal is less than or equal to the second threshold V2, the signal conditioning unit is considered to be abnormal. Optionally, the second threshold V2 can be adjusted and set according to specific usage requirements. The maximum value of the second threshold V2 is 3V. Specifically, the control processing unit sends a high-level signal to the second switch Q2, turning it on and transmitting the noise AD frequency modulation signal stored in the control processing unit to the signal conditioning unit. The ninth resistor R9 limits the current emitted by the control processing unit, thus limiting the control terminal current of the second switch Q2 and preventing damage due to excessive current. The tenth resistor R10 stabilizes the static operating point of the second switch Q2, preventing it from being mistakenly turned on due to interference or leakage when the control processing unit has not issued a self-test signal. This ensures the second switch Q2 is reliably off, clearly defining the static operating point and avoiding unnecessary impact on the normal operation of the AFCI, improving overall stability and reliability. The eleventh resistor R11 also limits the current at the second terminal of the second switch Q2, preventing damage due to excessive current.

[0031] In one embodiment of this utility model, the first grounding terminal GND1, the second grounding terminal GND2, and the third grounding terminal GND3 are all the same.

[0032] As one embodiment of this utility model, the first switching transistor Q1 and the second switching transistor Q2 can adopt various structures, such as transistors, MOSFETs, IGBTs, relays, etc.

[0033] As one embodiment of this utility model, the signal conditioning unit includes a signal amplification and conditioning circuit and a signal filtering and conditioning circuit. The signal amplification and conditioning circuit amplifies the noise AD frequency modulation signal to avoid the noise AD frequency modulation signal being too small, which facilitates data processing and judgment. The signal filtering and conditioning circuit filters the noise AD frequency modulation signal to avoid unnecessary interference and improve the reliability and stability of data processing.

[0034] See Figure 3 and Figure 4 In one embodiment of this utility model, multiple Hall coils Rct, first resistor R1, and second resistor R2 are provided and correspond one-to-one with each other. The voltage sampling unit also includes a multi-select analog switch device. The input terminal of each multi-select analog switch device is electrically connected to the second terminal of a second resistor R2, and the output terminal of the multi-select analog switch device is electrically connected to the third resistor R3 and the non-inverting input terminal of the first comparator U1. The control processing unit is electrically connected to the control terminal of the multi-select analog switch device. That is, multiple Hall coils Rct are electrically connected to the non-inverting input terminal of the first comparator U1 through the multi-select analog switch device. When performing a self-test, the control processing unit first selects the Hall coil Rct that needs to be measured. The channel corresponding to ct is opened and remains on that channel. That is, the control processing unit controls the multi-select analog switch to connect the Hall coil Rct to be measured to the non-inverting input of the first comparator U1, and then sends a self-test signal to determine whether there is an abnormality in the Hall coil Rct. When another Hall coil Rct needs to be tested, the control processing unit again controls the multi-select analog switch to connect the other Hall coil Rct to the non-inverting input of the first comparator U1. By repeatedly switching the multi-select analog switch through the control processing unit, a single circuit can be used to perform self-tests on all Hall coil Rcts, which simplifies the self-test circuit and reduces the cost of use to a certain extent.

[0035] This invention provides an AFCI (Automatic Feedback Interchange) system, including the AFCI self-test circuit described above, a Hall coil Rct, and a second comparator U2. The Hall coil Rct is used to collect the current value in the photovoltaic system. The Hall coil Rct is electrically connected to the non-inverting input terminal of the second comparator U2, and the output terminal of the second comparator U2 is electrically connected to the inverting input terminal of the second comparator U2 and the input terminal of the signal conditioning unit. During normal operation, the current collected by the Hall coil Rct is DC, making the output voltage of the second comparator U2 a DC voltage. The signal amplification and conditioning circuit has a series capacitor, which blocks the DC voltage based on the characteristic of the capacitor to pass AC and block DC, preventing it from being fed back to the control processing unit. When abnormal conditions such as cable arcing occur, the Hall coil Rct collects AC, making the output voltage of the second comparator U2 an AC voltage. This AC voltage can be processed by the signal amplification and conditioning circuit and the signal filtering and conditioning circuit, and then fed back to the control processing unit. The control processing unit then judges the abnormal cable condition based on this signal.

[0036] This invention provides a photovoltaic system, including the AFCI as described above.

[0037] In summary, this utility model provides an AFCI self-test circuit, an AFCI, and a photovoltaic system. Through the coordinated operation of the control processing unit, signal conditioning unit, and voltage sampling unit, a single circuit can achieve self-testing of the overall arcing signal and judgment of abnormalities in the Hall coil Rct, meeting market demands and possessing high commercial prospects. The Hall coil abnormality self-test circuit is simple, easy to operate, and highly applicable. The noise AD frequency modulation signal is verified by the actual arcing signal and stored in the control processing unit, ensuring the accuracy of the signal after processing by the signal conditioning unit and improving the accuracy and reliability of the self-test. By repeatedly switching the multi-select analog switching device through the control processing unit, a single circuit can be used to self-test all Hall coil Rcts, simplifying the self-test circuit and reducing usage costs to a certain extent.

[0038] It should be emphasized that the above are merely preferred embodiments of the present utility model and are not intended to limit the present utility model in any way. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present utility model shall still fall within the scope of the technical solution of the present utility model.

Claims

1. An AFCI self-test circuit, characterized in that, include: The control processing unit is used to generate self-test signals and noise AD frequency modulation signals, and to perform fault analysis on the feedback signals; The signal conditioning unit is used to receive and process the noise AD frequency modulation signal, and to feed back the processed noise AD frequency modulation signal to the control processing unit. A voltage sampling unit is used to receive the self-test signal, acquire the voltage signal of the Hall coil Rct in AFCI based on the self-test signal, and transmit the voltage signal to the control processing unit.

2. The AFCI self-test circuit according to claim 1, characterized in that, The voltage sampling unit includes a first high-voltage terminal Vdd1, a first resistor R1, a second resistor R2, a third resistor R3, a first switching transistor Q1, a first ground terminal GND1, and a first comparator U1; The first resistor R1 is connected in parallel with the Hall coil Rct. The first high-voltage terminal Vdd1 is electrically connected to the first terminal of the first resistor R1. The second terminal of the first resistor R1 is electrically connected to the first terminal of the second resistor R2. The second terminal of the second resistor R2 is electrically connected to the first terminal of the third resistor R3 and the non-inverting input terminal of the first comparator U1. The second terminal of the third resistor R3 is electrically connected to the first terminal of the first switching transistor Q1. The second terminal of the first switching transistor Q1 is electrically connected to the first ground terminal GND1. The control terminal of the first switching transistor Q1 is electrically connected to the control processing unit. The output terminal of the first comparator U1 is electrically connected to the inverting input terminal of the first comparator U1 and the control processing unit.

3. The AFCI self-test circuit according to claim 2, characterized in that, The Hall coil Rct, the first resistor R1, and the second resistor R2 are provided in multiples and correspond one-to-one with each other. The voltage sampling unit also includes a multi-select analog switch device. The input terminal of each multi-select analog switch device is electrically connected to the second terminal of a second resistor R2. The output terminal of the multi-select analog switch device is electrically connected to the third resistor R3 and the non-inverting input terminal of the first comparator U1. The control processing unit is electrically connected to the control terminal of the multi-select analog switch device.

4. The AFCI self-test circuit according to claim 2, characterized in that, A fourth resistor R4 is provided between the control processing unit and the control terminal of the first switching transistor Q1.

5. The AFCI self-test circuit according to claim 2, characterized in that, A fifth resistor R5 is provided between the control terminal of the first switch Q1 and the second terminal of the first switch Q1.

6. The AFCI self-test circuit according to claim 2, characterized in that, The voltage sampling unit also includes a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, and a second ground terminal GND2; The first end of the sixth resistor R6 is electrically connected to the non-inverting input of the first comparator U1, and the second end of the sixth resistor R6 is electrically connected to the second end of the second resistor R2 and the first end of the third resistor R3. The first end of the seventh resistor R7 is electrically connected to the inverting input of the first comparator U1, and the second end of the seventh resistor R7 is electrically connected to the second ground terminal GND2. The eighth resistor R8 is disposed between the inverting input terminal of the first comparator U1 and the output terminal of the first comparator U1.

7. The AFCI self-test circuit according to claim 1, characterized in that, The output end of the control processing unit is equipped with a signal transmission unit; The signal transmission unit includes a second high-voltage terminal Vdd2, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a second switching transistor Q2, and a third ground terminal GND3. The first end of the ninth resistor R9 is electrically connected to the output end of the control processing unit, and the second end of the ninth resistor R9 is electrically connected to the control end of the second switch Q2. The tenth resistor R10 is disposed between the control end of the second switch Q2 and the first end of the second switch Q2. The first end of the second switch Q2 is electrically connected to the third grounding end GND3. The second end of the second switch Q2 is electrically connected to the first end of the eleventh resistor R11 and the input end of the signal conditioning unit. The second end of the eleventh resistor R11 is electrically connected to the second high voltage end Vdd2.

8. The AFCI self-test circuit according to claim 1, characterized in that, The signal conditioning unit includes a signal amplification and conditioning circuit and a signal filtering and conditioning circuit. The signal amplification and conditioning circuit amplifies the noise AD frequency modulation signal, and the signal filtering and conditioning circuit filters the noise AD frequency modulation signal.

9. An AFCI, characterized in that, Includes the AFCI self-test circuit as described in any one of claims 1-8, a Hall coil Rct, and a second comparator U2, wherein the Hall coil Rct is electrically connected to the non-inverting input terminal of the second comparator U2, and the output terminal of the second comparator U2 is electrically connected to the inverting input terminal of the second comparator U2 and the input terminal of the signal conditioning unit.

10. A photovoltaic system, characterized in that, Includes the AFCI as described in claim 9.

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