3.2t silicon light cpo light engine

Abstract

The utility model relates to a kind of 3.2T silicon light CPO light engine, comprising: DFB chip, polarizing piece, Faraday piece, collimating lens, polaroid, half-wave plate, converging lens and silicon light chip are sequentially coupled along light propagation direction, polarizing piece is fixed with Faraday piece, polaroid is fixed with half-wave plate.Affirmative effect is that one complete polarization-independent optical isolator is split into two parts, the first part is polarizing piece and Faraday piece, the second part is polaroid and half-wave plate, the combination of polarizing piece and Faraday piece can play the role of half optical isolator, effectively prevent the reflection of collimating lens from affecting DFB chip, without affecting coupling efficiency, at the same time, polarizing piece and Faraday piece are in divergent light path, so size can be small, which can save cost.

Description

Technical Field

[0001] This utility model relates to the field of optical engine technology, specifically to a 3.2T silicon photonic CPO optical engine. Background Technology

[0002] A traditional 3.2T silicon photonics CPO optical engine comprises: a DFB chip, a collimating lens, a polarization-independent optical isolator, a converging lens, and a silicon photonics chip, sequentially coupled along the light propagation direction. The emitted light from the DFB chip passes sequentially through the collimating lens, polarization-independent optical isolator, and converging lens before being coupled into the silicon photonics chip. The silicon photonics chip then splits the light into 8 or 16 paths. To ensure high performance and high optical power, the DFB (laser chip) chip's optical power is generally ≥200mW, while the DFB chip's optical power in ordinary silicon photonics engines is generally ≤100mW. The polarization-independent optical isolator is a four-piece design: a polarizer, a Faraday plate, an analyzer, and a half-wave plate. The polarizer's thickness is 0.2mm, the Faraday plate's thickness is 0.31mm, the analyzer's thickness is 0.2mm, and the half-wave plate's thickness is 0.078mm, for a total thickness of 0.788mm. Figure 1 As shown, this scheme uses a conventional optical path, where the collimating lens is positioned between the DFB chip and the polarization-independent optical isolator. The reflected light from the collimating lens causes noise and performance degradation in the DFB chip because the polarization-independent optical isolator, located after the collimating lens, cannot handle the reflected light from the collimating lens surface. Moving the polarization-independent optical isolator between the DFB chip and the collimating lens (the maximum distance between the DFB chip and the collimating lens can be found in patent application number 2023104345880) would decrease coupling efficiency because the polarization-independent optical isolator is too thick, and a patch gap needs to be maintained between the polarization-independent optical isolator, the DFB chip, and the collimating lens. Therefore, this method is also unsuitable. Figure 2 As shown. Utility Model Content

[0003] The technical problem to be solved by this utility model is to provide a 3.2T silicon photonics CPO optical engine to overcome the shortcomings of the prior art.

[0004] The technical solution of this utility model to solve the above-mentioned technical problems is as follows: A 3.2T silicon photonics CPO optical engine includes: a DFB chip, a polarizer, a Faraday plate, a collimating lens, an analyzer, a half-wave plate, a converging lens, and a silicon photonics chip, which are sequentially coupled along the light propagation direction. The polarizer and the Faraday plate are fixed together, and the analyzer and the half-wave plate are fixed together.

[0005] Based on the above technical solution, the present invention can be further improved as follows.

[0006] Furthermore, the gap between the polarizer and the DFB chip is 0.05 mm, and the gap between the Faraday plate and the collimating lens is 0.1 mm.

[0007] Furthermore, the refractive index of the polarizer is 1.48, and the thickness of the polarizer is 0.2 mm; the refractive index of the Faraday film is 2.3, and the thickness of the Faraday film is 0.31 mm.

[0008] Furthermore, the thickness of the analyzer is 0.2 mm, and the thickness of the half-wave plate is 0.078 mm.

[0009] Furthermore, the optical power of the DFB chip is ≥200mW.

[0010] Furthermore, the silicon photonics chip has one input waveguide and eight output waveguides, with the input waveguide coupled to the eight output waveguides. The single-wavelength output of each output waveguide of the silicon photonics chip is 400G.

[0011] Furthermore, the silicon photonics chip has one input waveguide and sixteen output waveguides. The input waveguide is coupled to the sixteen output waveguides, and the single output wave of each output waveguide of the silicon photonics chip is 200G.

[0012] The beneficial effects of this invention are: it splits a complete polarization-independent optical isolator into two parts. The first part consists of a polarizer and a Faraday plate, and the second part consists of an analyzer and a half-wave plate. The combination of the polarizer and the Faraday plate can function as half an optical isolator, effectively preventing the reflected light from the collimating lens from affecting the DFB chip and having no impact on the coupling efficiency. At the same time, the polarizer and the Faraday plate are located in the diverging optical path, so their size can be made smaller, which can save costs. Attached Figure Description

[0013] Figure 1 This is the first layout diagram of a 3.2T silicon photonics CPO optical engine in the prior art; Figure 2 This is a second layout diagram of a 3.2T silicon photonics CPO optical engine in the prior art; Figure 3 This is a structural diagram of the 3.2T silicon photonics CPO optical engine in this utility model.

[0014] The attached diagram lists the components represented by each number as follows: 1. DFB chip, 2. Polarizer, 3. Faraday film, 4. Collimating lens, 5. Analyzer, 6. Half-wave plate, 7. Converging lens, 8. Silicon photonics chip. Detailed Implementation

[0015] The principles and features of this utility model are described below with reference to the accompanying drawings. The examples given are only for explaining this utility model and are not intended to limit the scope of this utility model.

[0016] Example 1 like Figure 3 As shown, a 3.2T silicon photonics CPO optical engine includes: a DFB chip 1, a polarizer 2, a Faraday plate 3, a collimating lens 4, an analyzer 5, a half-wave plate 6, a converging lens 7, and a silicon photonics chip 8. The DFB chip 1, polarizer 2, Faraday plate 3, collimating lens 4, analyzer 5, half-wave plate 6, converging lens 7, and silicon photonics chip 8 are coupled sequentially along the light propagation direction. The polarizer 2 is fixed to the Faraday plate 3, and the analyzer 5 is fixed to the half-wave plate 6. The emitted light from the DFB chip 1 is coupled into the silicon photonics chip 8 after passing sequentially through the polarizer 2, Faraday plate 3, collimating lens 4, analyzer 5, half-wave plate 6, and converging lens 7.

[0017] A complete polarization-independent optical isolator is divided into two parts: the first part is polarizer 2 and Faraday plate 3, and the second part is analyzer 5 and half-wave plate 6. The combination of polarizer 2 and Faraday plate 3 can serve as half an optical isolator, effectively preventing the reflected light from collimating lens 4 from affecting DFB chip 1, without affecting coupling efficiency. At the same time, polarizer 2 and Faraday plate 3 are located in the diverging optical path, so their size can be made smaller, which can save costs.

[0018] Example 2 like Figure 3 As shown, this embodiment is a further improvement on embodiment 1, as detailed below: The gap between the polarizer 2 and the DFB chip 1 is 0.05 mm, and the gap between the Faraday plate 3 and the collimating lens 4 is 0.1 mm.

[0019] Furthermore, the refractive index of polarizer 2 is 1.48, and its thickness is 0.2mm, consistent with existing technology. Therefore, its equivalent air thickness is 0.2mm ÷ 1.48 = 0.135mm. The refractive index of Faraday film 3 is 2.3, and its thickness is 0.31mm, also consistent with existing technology. Therefore, its equivalent air thickness is 0.31mm ÷ 2.3 = 0.1348mm. The total equivalent air thickness is 0.135mm + 0.1348mm ≈ 0.27mm. Since the gap between polarizer 2 and DFB chip 1 is 0.05mm, and the gap between Faraday film 3 and collimating lens 4 is 0.1mm, the total thickness is 0.05mm + 0.27mm + 0.1mm = 0.42mm < 0.5mm, which has no impact on coupling efficiency.

[0020] The thickness of the polarizer 5 is 0.2mm, which is consistent with the existing technology. The thickness of the half-wave plate 6 is 0.078mm, which is also consistent with the existing technology. Therefore, the total thickness of the polarization-independent optical isolator is 0.2mm + 0.31mm + 0.2mm + 0.078mm = 0.788mm, which is also consistent with the existing technology.

[0021] Example 3 like Figure 3 As shown, this embodiment is a further improvement on embodiment 1 or 2, as detailed below: The optical power of DFB chip 1 is ≥200mW, which is consistent with the existing technology.

[0022] Example 4 like Figure 3 As shown, this embodiment is a further improvement on embodiment 1, 2, or 3, as detailed below: The silicon photonics chip 8 has one input waveguide and eight output waveguides. The input waveguide is coupled to the eight output waveguides. The output single wave of each output waveguide of the silicon photonics chip 8 is 400G, and 400G×8=3.2T.

[0023] Example 5 like Figure 3 As shown, this embodiment is a further improvement on embodiment 1, 2, or 3, as detailed below: The silicon photonics chip 8 has one input waveguide and sixteen output waveguides. The input waveguide is coupled to the sixteen output waveguides. The output single wave of each output waveguide of the silicon photonics chip 8 is 200G, and 200G×16=3.2T.

[0024] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A 3.2T silicon photonics CPO optical engine, characterized in that, include: The following components are coupled sequentially along the light propagation direction: DFB chip (1), polarizer (2), Faraday plate (3), collimating lens (4), analyzer (5), half-wave plate (6), converging lens (7), and silicon photonic chip (8). The polarizer (2) is fixed to the Faraday plate (3), and the analyzer (5) is fixed to the half-wave plate (6).

2. A 3.2T silicon photonics CPO optical engine according to claim 1, characterized in that, The gap between the polarizer (2) and the DFB chip (1) is 0.05 mm, and the gap between the Faraday plate (3) and the collimating lens (4) is 0.1 mm.

3. A 3.2T silicon photonics CPO optical engine according to claim 2, characterized in that, The polarizer (2) has a refractive index of 1.48 and a thickness of 0.2 mm; the Faraday plate (3) has a refractive index of 2.3 and a thickness of 0.31 mm.

4. A 3.2T silicon photonics CPO optical engine according to claim 1, characterized in that, The thickness of the polarizer (5) is 0.2 mm, and the thickness of the half-wave plate (6) is 0.078 mm.

5. A 3.2T silicon photonics CPO optical engine according to claim 1, characterized in that, The optical power of the DFB chip (1) is ≥200mW.

6. A 3.2T silicon photonics CPO optical engine according to any one of claims 1 to 5, characterized in that, The silicon photonic chip (8) has one input waveguide and eight output waveguides. The input waveguide is coupled to the eight output waveguides. The output single wave of each output waveguide of the silicon photonic chip (8) is 400G.

7. A 3.2T silicon photonics CPO optical engine according to any one of claims 1 to 5, characterized in that, The silicon photonic chip (8) has one input waveguide and sixteen output waveguides. The input waveguide is coupled to the sixteen output waveguides. The output single wave of each output waveguide of the silicon photonic chip (8) is 200G.

Images