Power conversion device and power factor correction circuit thereof

CN224721791UActive Publication Date: 2026-09-04LITE ON SINGAPORE PTE LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202521845624.3
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Priority Date
2025-07-22
Filing Date
2025-08-28
Publication Date
2026-09-04
Estimated Expiration
2035-08-28

AI Technical Summary

Technical Problem

PFC电路在低输入电压的应用情境中面临高传导损耗(conduction losses)等挑战,这些挑战可能导致结温过高(excessivejunction temperatures),并且可能损坏PFC电路的金氧半场效晶体管(Metal-Oxide-Semiconductor Field-Effect Transistor,MOSFET)

Benefits of technology

[0024] Based on the above, the embodiments of this invention configure multiple power switches (e.g., power transistors) between the inductor and the reference voltage to share the high current stress in high-power applications. Therefore, the power factor correction circuit can adapt to applications with low input voltage and high power.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN224721791U_ABST
    Figure CN224721791U_ABST
Patent Text Reader

Abstract

The utility model provides a kind of electric power conversion device and its power factor correction circuit.Power factor correction circuit includes inductance, first diode, control circuit, first power switch circuit and second power switch circuit.The first end of inductance is as the input end of power factor correction circuit.The first end of first diode is coupled to the second end of inductance.The second end of first diode is as the output end of the power factor correction circuit.The first end of first power switch circuit and the first end of second power switch circuit are coupled to the second end of inductance.The second end of first power switch circuit and the second end of second power switch circuit are coupled to first reference voltage.The control end of first power switch circuit and the control end of second power switch circuit are coupled to the first output end of control circuit.Therefore, electric power conversion device and its power factor correction circuit can adapt to low input voltage and high power application situation.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This utility model relates to a power supply device, and more particularly to a power conversion device and its power factor correction circuit. Background Technology

[0002] Power factor correction (PFC) circuits are crucial for improving efficiency and reducing harmonic distortion in power conversion systems. However, PFC circuits face challenges such as high conduction losses in low input voltage applications, which can lead to excessive junction temperatures and potentially damage the metal-oxide-semiconductor field-effect transistors (MOSFETs) in the PFC circuit. How to implement PFC circuits that adapt to low input voltage and high power applications is one of the many technical challenges in this field. Utility Model Content

[0003] This invention provides a power conversion device and its power factor correction (PFC) circuit to adapt to application scenarios with low input voltage and high power.

[0004] In an embodiment of the present invention, the power factor correction circuit includes an inductor, a first diode, a control circuit, a first power switch circuit, and a second power switch circuit. The first terminal of the inductor serves as the input terminal of the power factor correction circuit. The first terminal of the first diode is coupled to the second terminal of the inductor. The second terminal of the first diode serves as the output terminal of the power factor correction circuit. The first terminals of the first and second power switch circuits are coupled to the second terminal of the inductor. The second terminals of the first and second power switch circuits are coupled to a first reference voltage. The control terminals of the first and second power switch circuits are coupled to the first output terminal of the control circuit.

[0005] According to one embodiment of the present invention, the power factor correction circuit further includes an output capacitor, wherein a first terminal of the output capacitor is coupled to a second terminal of the first diode, and a second terminal of the output capacitor is coupled to the first reference voltage.

[0006] According to one embodiment of the present invention, the first power switching circuit includes: a first transistor, wherein a first terminal of the first transistor is coupled to a second terminal of the inductor, and a second terminal of the first transistor is coupled to a first reference voltage; a first ferrite bead; and a first resistor circuit, wherein the first ferrite bead and the first resistor circuit are connected in series between the control terminal of the first transistor and the first output terminal of the control circuit.

[0007] According to one embodiment of the present invention, the second power switching circuit includes: a second transistor, wherein a first terminal of the second transistor is coupled to a second terminal of the inductor, and a second terminal of the second transistor is coupled to a first reference voltage; a second ferrite bead; and a second resistor circuit, wherein the second ferrite bead and the second resistor circuit are connected in series between the control terminal of the second transistor and the first output terminal of the control circuit.

[0008] According to one embodiment of the present invention, the first resistor circuit includes: a first resistor, wherein a first end of the first resistor is coupled to the first output terminal of the control circuit; a second resistor, wherein a first end of the second resistor is coupled to a second end of the first resistor, and a second end of the second resistor is coupled to a first end of the first ferrite bead; and a second diode, wherein a first end of the second diode is coupled to the second end of the first resistor, and a second end of the second diode is coupled to the first end of the first ferrite bead.

[0009] According to one embodiment of the present invention, the second resistor circuit includes: a third resistor, wherein a first end of the third resistor is coupled to the first output terminal of the control circuit; a fourth resistor, wherein a first end of the fourth resistor is coupled to a second end of the third resistor, and the second end of the fourth resistor is coupled to a first end of the second ferrite bead; and a third diode, wherein a first end of the third diode is coupled to the second end of the third resistor, and the second end of the third diode is coupled to the first end of the second ferrite bead.

[0010] According to one embodiment of the present invention, the first power switch circuit further includes: a fifth resistor, wherein a first end of the fifth resistor is coupled to the control terminal of the first transistor, and a second end of the fifth resistor is coupled to the second terminal of the first transistor.

[0011] According to one embodiment of the present invention, the second power switch circuit further includes: a sixth resistor, wherein a first end of the sixth resistor is coupled to the control terminal of the second transistor, and a second end of the sixth resistor is coupled to the second terminal of the second transistor.

[0012] According to one embodiment of the present invention, the first power switch circuit further includes: a seventh resistor; and a first capacitor, wherein the seventh resistor and the first capacitor are connected in series between the first terminal of the first transistor and the second terminal of the first transistor.

[0013] According to one embodiment of the present invention, the second power switch circuit further includes: an eighth resistor; and a second capacitor, wherein the eighth resistor and the second capacitor are connected in series between the first terminal of the second transistor and the second terminal of the second transistor.

[0014] In an embodiment of the present invention, the power conversion device includes a power factor correction circuit, a switching circuit, a resonant tank, a transformer, a secondary-side rectifier circuit, and a control circuit. The input terminal of the power factor correction circuit receives a DC voltage. The input terminal of the switching circuit is coupled to the output terminal of the power factor correction circuit. The input terminal of the resonant tank is coupled to the output terminal of the switching circuit. The primary winding of the transformer is coupled to the output terminal of the resonant tank. The input terminal of the secondary-side rectifier circuit is coupled to the secondary winding of the transformer. The output terminal of the secondary-side rectifier circuit serves as the output terminal of the power conversion device. The power factor correction circuit includes an inductor, a first diode, a first power switching circuit, and a second power switching circuit. The first terminal of the inductor serves as the input terminal of the power factor correction circuit. The first terminal of the first diode is coupled to the second terminal of the inductor. The second terminal of the first diode serves as the output terminal of the power factor correction circuit. The first terminals of the first power switching circuit and the second terminals of the second power switching circuit are coupled to the second terminals of the inductor. The second terminals of the first power switching circuit and the second terminals of the second power switching circuit are coupled to a first reference voltage. The control terminals of the first power switch circuit and the second power switch circuit are coupled to the first output terminal of the control circuit.

[0015] According to one embodiment of the present invention, the first power switching circuit includes: a first transistor, wherein a first terminal of the first transistor is coupled to a second terminal of the inductor, and a second terminal of the first transistor is coupled to a first reference voltage; a first ferrite bead; and a first resistor circuit, wherein the first ferrite bead and the first resistor circuit are connected in series between the control terminal of the first transistor and the first output terminal of the control circuit.

[0016] According to one embodiment of the present invention, the second power switching circuit includes: a second transistor, wherein a first terminal of the second transistor is coupled to a second terminal of the inductor, and a second terminal of the second transistor is coupled to a first reference voltage; a second ferrite bead; and a second resistor circuit, wherein the second ferrite bead and the second resistor circuit are connected in series between the control terminal of the second transistor and the first output terminal of the control circuit.

[0017] According to one embodiment of the present invention, the first resistor circuit includes: a first resistor, wherein a first end of the first resistor is coupled to the first output terminal of the control circuit; a second resistor, wherein a first end of the second resistor is coupled to a second end of the first resistor, and a second end of the second resistor is coupled to a first end of the first ferrite bead; and a second diode, wherein a first end of the second diode is coupled to the second end of the first resistor, and a second end of the second diode is coupled to the first end of the first ferrite bead.

[0018] According to one embodiment of the present invention, the second resistor circuit includes: a third resistor, wherein a first end of the third resistor is coupled to the first output terminal of the control circuit; a fourth resistor, wherein a first end of the fourth resistor is coupled to a second end of the third resistor, and the second end of the fourth resistor is coupled to a first end of the second ferrite bead; and a third diode, wherein a first end of the third diode is coupled to the second end of the third resistor, and the second end of the third diode is coupled to the first end of the second ferrite bead.

[0019] According to one embodiment of the present invention, the control circuit further includes a second output terminal and a third output terminal, and the switching circuit includes: an upper transistor, wherein the control terminal of the upper transistor is coupled to the second output terminal of the control circuit, the first terminal of the upper transistor is coupled to the output terminal of the power factor correction circuit, and the second terminal of the upper transistor is coupled to the output terminal of the switching circuit; and a lower transistor, wherein the control terminal of the lower transistor is coupled to the third output terminal of the control circuit, the first terminal of the lower transistor is coupled to the second terminal of the upper transistor, and the second terminal of the lower transistor is coupled to the first reference voltage.

[0020] According to one embodiment of the present invention, the resonant slot includes: a resonant inductor, wherein a first end of the resonant inductor is coupled to the input terminal of the resonant slot, and a second end of the resonant inductor is coupled to a first end of the primary winding of the transformer; a magnetizing inductor, wherein a first end of the magnetizing inductor is coupled to the first end of the primary winding of the transformer, and a second end of the magnetizing inductor is coupled to a second end of the primary winding of the transformer; and a resonant capacitor, wherein a first end of the resonant capacitor is coupled to the second end of the primary winding of the transformer, and a second end of the resonant capacitor is coupled to the first reference voltage.

[0021] According to one embodiment of the present invention, the secondary-side rectifier circuit includes: a plurality of first switches, wherein the first ends of the plurality of first switches are commonly coupled to a first tap of the secondary winding of the transformer; and a plurality of second switches, wherein the first ends of the plurality of second switches are commonly coupled to a second tap of the secondary winding of the transformer, the second ends of the plurality of first switches and the second ends of the plurality of second switches are commonly coupled to the output terminal of the secondary-side rectifier circuit, and the third tap of the secondary winding of the transformer is coupled to a second reference voltage.

[0022] According to one embodiment of the present invention, the control circuit further includes a fourth output terminal and a fifth output terminal, and the secondary-side rectifier circuit further includes: a ninth resistor, wherein a first end of the ninth resistor is coupled to the fourth output terminal of the control circuit, and a second end of the ninth resistor is coupled to the control terminal of the plurality of first switches; a tenth resistor, wherein a first end of the tenth resistor is coupled to the second end of the ninth resistor, and a second end of the tenth resistor is coupled to the second reference voltage; an eleventh resistor, wherein a first end of the eleventh resistor is coupled to the fifth output terminal of the control circuit, and a second end of the eleventh resistor is coupled to the control terminal of the plurality of second switches; and a twelfth resistor, wherein a first end of the twelfth resistor is coupled to the second end of the eleventh resistor, and a second end of the twelfth resistor is coupled to the second reference voltage.

[0023] According to one embodiment of the present invention, the secondary-side rectifier circuit further includes: a thirteenth resistor, wherein a first end of the thirteenth resistor is coupled to a first tap terminal of the secondary winding of the transformer; a third capacitor, wherein a first end of the third capacitor is coupled to a second end of the thirteenth resistor, and a second end of the third capacitor is coupled to an output terminal of the secondary-side rectifier circuit; a fourteenth resistor, wherein a first end of the fourteenth resistor is coupled to a second tap terminal of the secondary winding of the transformer; and a fourth capacitor, wherein a first end of the fourth capacitor is coupled to a second end of the fourteenth resistor, and a second end of the fourth capacitor is coupled to an output terminal of the secondary-side rectifier circuit.

[0024] Based on the above, the embodiments of this invention configure multiple power switches (e.g., power transistors) between the inductor and the reference voltage to share the high current stress in high-power applications. Therefore, the power factor correction circuit can adapt to applications with low input voltage and high power.

[0025] To make the above-mentioned features and advantages of this utility model more apparent and understandable, specific embodiments are described below, and detailed descriptions are provided in conjunction with the accompanying drawings. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of a circuit block of a power conversion device according to an embodiment of the present invention.

[0027] Figure 2 This is a circuit block diagram of a power factor correction (PFC) circuit according to an embodiment of the present invention.

[0028] Figure 3 This is a circuit diagram of a power switch circuit according to an embodiment of the present invention.

[0029] Figure 4 This is a circuit diagram of a switching circuit, a resonant tank, a transformer, and a secondary-side rectifier circuit, according to an embodiment of the present invention.

[0030] Explanation of reference numerals in the attached figures

[0031] 11: Alternating current power

[0032] 12: Load

[0033] 100: Power conversion device

[0034] 110: Rectifier

[0035] 120: Power Factor Correction (PFC) Circuit

[0036] 121: First power switching circuit

[0037] 122: Second power switching circuit

[0038] 123: First Resistor Circuit

[0039] 124: Second Resistor Circuit

[0040] 130: Switching circuit

[0041] 140: Resonant groove

[0042] 150: Transformer

[0043] 160: Secondary rectifier circuit

[0044] 170: Control Circuit

[0045] Cout: Output capacitor

[0046] C1: First capacitor

[0047] C2: Second capacitor

[0048] C3: Third capacitor

[0049] C4: Fourth capacitor

[0050] Cr: Resonant capacitor

[0051] D1: First diode

[0052] D2: Second diode

[0053] D3: Third diode

[0054] FB1: First magnetic bead

[0055] FB2: Second magnetic bead

[0056] GND1: First reference voltage

[0057] GND2: Second reference voltage

[0058] L1: Inductor

[0059] Lm: Magnetizing inductance

[0060] Lr: Resonant inductance

[0061] Q11: The first transistor

[0062] Q12: Second transistor

[0063] Q21, Q22, Q23: First switch

[0064] Q31, Q32, Q33: Second switch

[0065] Q41: Upper transistor

[0066] Q42: Lower transistor

[0067] R1: First resistor

[0068] R2: Second resistor

[0069] R3: Third resistor

[0070] R4: Fourth resistor

[0071] R5: Fifth resistor

[0072] R6: Sixth resistor

[0073] R7: Seventh resistor

[0074] R8: Eighth resistor

[0075] R9: Ninth resistor

[0076] R10: Tenth resistor

[0077] R11: Eleventh resistor

[0078] R12: Twelfth resistor

[0079] R13: Thirteenth resistor

[0080] R14: The fourteenth resistor

[0081] S1, S2, S3, S4, S5: Control signals

[0082] T1: First output terminal of the control circuit

[0083] T2: The second output terminal of the control circuit

[0084] T3: The third output terminal of the control circuit

[0085] T4: The fourth output terminal of the control circuit

[0086] T5: The fifth output terminal of the control circuit Detailed Implementation

[0087] Reference will now be made in detail to exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same component reference numerals are used in the drawings and description to denote the same or similar parts.

[0088] The term "coupled (or connected)" as used throughout this specification (including the claims) may refer to any direct or indirect means of connection. For example, if the text describes a first device coupled (or connected) to a second device, it should be interpreted as the first device being directly connected to the second device, or the first device being indirectly connected to the second device through other devices or some means of connection. The terms "first," "second," etc., used throughout this specification (including the claims) are used to name components or distinguish different embodiments or scopes, and are not intended to limit the upper or lower limit of the number of components, nor to limit the order of components. Furthermore, wherever possible, components / components / steps using the same reference numerals in the drawings and embodiments represent the same or similar parts. Components / components / steps using the same reference numerals or the same terms in different embodiments may be referred to mutually in the relevant descriptions. It should be understood that the features of the following embodiments can be combined with each other. For example, the features of the second embodiment can be combined with the features of the first embodiment. Those skilled in the art can select appropriate combinations of features according to actual design requirements.

[0089] Power factor correction (PFC) circuits are crucial for improving efficiency and reducing harmonic distortion in power conversion systems. However, PFC circuits face several challenges in low input voltage applications, such as high conduction losses, excessive junction temperatures, and damage to metal-oxide-semiconductor (MOSFET) field-effect transistors (FETs). The following embodiments overcome these challenges by optimizing gate signal timing and layout design and incorporating noise reduction techniques.

[0090] Figure 1 This is a schematic diagram of a circuit block of a power conversion device 100 according to an embodiment of the present invention. Figure 1 The power conversion device 100 shown is used to convert AC power 11 into DC power to supply the load 12. Figure 1In the illustrated embodiment, the power conversion device 100 includes a rectifier 110, a power factor correction (PFC) circuit 120, a switching circuit 130, a resonant tank 140, a transformer 150, a secondary-side rectifier circuit 160, and a control circuit 170. Depending on the design, in some embodiments, the control circuit 170 may be implemented as a hardware circuit. In other embodiments, the control circuit 170 may be implemented as a combination of hardware, firmware, and software (i.e., a program).

[0091] In hardware terms, the control circuit 170 described above can be implemented as logic circuitry on an integrated circuit. For example, the functions of the control circuit 170 can be implemented in various logic blocks, modules, and circuits within one or more hardware controllers, microcontrollers, hardware processors, microprocessors, application-specific integrated circuits (ASICs), digital signal processors (DSPs), field-programmable gate arrays (FPGAs), central processing units (CPUs), and / or other processing units. The functions of the control circuit 170 can be implemented as hardware circuitry, such as various logic blocks, modules, and circuits within an integrated circuit, using hardware description languages ​​(such as Verilog HDL or VHDL) or other suitable programming languages.

[0092] In software and / or firmware form, the functions of the control circuit 170 described above can be implemented as programming codes. For example, the control circuit 170 can be implemented using general programming languages ​​(such as C, C++, or assembly language) or other suitable programming languages. The programming code can be recorded / stored in a non-transitory machine-readable storage medium. In some embodiments, the non-transitory machine-readable storage medium includes, for example, semiconductor memory and / or a storage device. An electronic device (e.g., a computer, CPU, hardware controller, microcontroller, hardware processor, or microprocessor) can read and execute the programming code from the non-transitory machine-readable storage medium to implement the functions of the control circuit 170.

[0093] Rectifier 110 converts AC power 11 into DC voltage for PFC circuit 120. Depending on the design and application, rectifier 110 may include a full-bridge rectifier, a half-bridge rectifier, or other rectifier circuits. The input of PFC circuit 120 is coupled to the output of rectifier 110 to receive the DC voltage. Control circuit 170 outputs control signal S1 to control the power switching circuit of PFC circuit 120. The input of switching circuit 130 is coupled to the output of PFC circuit 120. Control circuit 170 outputs control signals S2 and S3 to control the switching operation of switching circuit 130. The input of resonant slot 140 is coupled to the output of switching circuit 130. Based on the switching operation of switching circuit 130, resonant slot 140 generates an input voltage for the primary winding of transformer 150.

[0094] The primary winding of transformer 150 is coupled to the output terminal of resonant slot 140. The secondary winding of transformer 150 is coupled to the input terminal of secondary rectifier circuit 160. The output terminal of secondary rectifier circuit 160 serves as the output terminal of power conversion device 100. Control circuit 170 outputs control signals S4 and S5 to control the rectification operation of secondary rectifier circuit 160. The secondary side of transformer 150 generates a secondary voltage and provides it to secondary rectifier circuit 160. Secondary rectifier circuit 160 provides an output voltage to load 12.

[0095] Figure 2 This is a circuit block diagram of a power factor correction (PFC) circuit 120 according to an embodiment of the present invention. Figure 2 The PFC circuit 120 shown can be used as Figure 1This is one of many implementation examples of the PFC circuit 120 shown. Figure 2 The AC power supply 11, rectifier 110, PFC circuit 120 and switching circuit 130 shown can be referenced. Figure 1 The relevant explanations are omitted here. Figure 2 In the illustrated embodiment, the PFC circuit 120 includes an inductor L1, a first diode D1, a control circuit 170, a first power switch circuit 121, a second power switch circuit 122, and an output capacitor Cout. A first terminal of the inductor L1 is coupled to the output of the rectifier 110 to receive a DC voltage. The rectifier 110 also provides a first reference voltage GND1. The first reference voltage GND1 represents the reference voltage on the primary side of the transformer 150.

[0096] The first terminal (e.g., anode) of the first diode D1 is coupled to the second terminal of the inductor. The second terminal (e.g., cathode) of the first diode D1 serves as the output terminal of the PFC circuit 120, providing an output voltage to the switching circuit 130. The first terminal of the output capacitor Cout is coupled to the second terminal of the first diode D1. The second terminal of the output capacitor Cout is coupled to the first reference voltage GND1. The first terminals of the first power switch circuit 121 and the second power switch circuit 122 are both coupled to the second terminal of the inductor L1. The second terminals of the first power switch circuit 121 and the second power switch circuit 122 are both coupled to the first reference voltage GND1. The control circuit 170 may have a first output terminal T1. The control terminals of the first power switch circuit 121 and the second power switch circuit 122 are both coupled to the first output terminal T1 of the control circuit 170. Therefore, the control terminals of the first power switch circuit 121 and the second power switch circuit 122 are both controlled by the control signal S1 from the control circuit 170. For example, in response to the control signal S1 being at a first logic level, the first power switch circuit 121 and the second power switch circuit 122 are turned on (i.e., the voltage at the second terminal of the inductor is pulled down to the first reference voltage GND1). In response to the control signal S1 being at a second logic level, the first power switch circuit 121 and the second power switch circuit 122 are turned off.

[0097] In summary, Figure 2 The illustrated embodiment configures multiple power switching circuits between inductor L1 and the first reference voltage GND1, for example... Figure 2 The first power switch circuit 121 and the second power switch circuit 122 are shown. Although Figure 2The diagram shows two power switch circuits connected in parallel. However, in other embodiments, the specific number of power switch circuits connected in parallel within the PFC circuit 120 can be arranged to three or more, depending on the actual design and application. Multiple first power switch circuits 121 and second power switch circuits 122 can share the high current stress in high-power applications, thereby preventing current stress from damaging the first power switch circuits 121 and second power switch circuits 122. Therefore, the PFC circuit 120 can adapt to applications with low input voltage and high power.

[0098] Figure 3 The diagram shows a circuit diagram of the first power switch circuit 121 and the second power switch circuit 122 according to an embodiment of the present invention. Figure 3 The first power switch circuit 121 and the second power switch circuit 122 shown can be used as Figure 2 This is one of many implementation examples of the first power switch circuit 121 and the second power switch circuit 122 shown. Figure 3 The inductor L1, first diode D1, first power switch circuit 121, second power switch circuit 122, and output capacitor Cout shown can be referenced. Figure 2 The relevant explanations are omitted here. Figure 3 In the illustrated embodiment, the first power switching circuit 121 includes a first transistor Q11, a first ferrite bead FB1, and a first resistor circuit 123. The first terminal (e.g., drain) of the first transistor Q11 is coupled to the second terminal of the inductor L1 and the anode of the first diode D1. The second terminal (e.g., source) of the first transistor Q11 is coupled to a first reference voltage GND1. Depending on the actual design and application, the first transistor Q11 can be a MOSFET or other transistor.

[0099] The first ferrite bead FB1 and the first resistor circuit 123 are connected in series between the control terminal (e.g., gate) of the first transistor Q11 and the first output terminal T1 of the control circuit 170. For example (but not limited to this), the first terminal of the first resistor circuit 123 receives the control signal S1 from the control circuit 170, the second terminal of the first resistor circuit 123 is coupled to the first terminal of the first ferrite bead FB1, and the second terminal of the first ferrite bead FB1 is coupled to the control terminal of the first transistor Q11. The control signal S1 output by the control circuit 170 controls the control terminal of the first transistor Q11 through the first ferrite bead FB1 and the first resistor circuit 123.

[0100] exist Figure 3In the illustrated embodiment, the first resistor circuit 123 includes a first resistor R1, a second resistor R2, and a second diode D2. The first terminal of the first resistor R1 receives a control signal S1 from the control circuit 170. The first terminal of the second resistor R2 is coupled to the second terminal of the first resistor R1. The second terminal of the second resistor R2 is coupled to the first terminal of the first ferrite bead FB1. The first terminal (e.g., cathode) of the second diode D2 is coupled to the second terminal of the first resistor R1. The second terminal (e.g., anode) of the second diode D2 is coupled to the first terminal of the first ferrite bead FB1. When the first transistor Q11 is turned on and off, the first resistor R1 and the second resistor R2 limit the current flowing to the gate of the first transistor Q11. When the control signal S1 switches from a high level to a low level, the second diode D2 turns on to accelerate the turn-off of the first transistor Q11.

[0101] Similarly, the second power switching circuit 122 includes a second transistor Q12, a second ferrite bead FB2, and a second resistor circuit 124. The second resistor circuit 124 includes a third resistor R3, a fourth resistor R4, and a third diode D3. The descriptions of the second power switching circuit 122, the second transistor Q12, the second ferrite bead FB2, the second resistor circuit 124, the third resistor R3, the fourth resistor R4, and the third diode D3 can be found in the descriptions of the first power switching circuit 121, the first transistor Q11, the first ferrite bead FB1, the first resistor circuit 123, the first resistor R1, the second resistor R2, and the second diode D2, and will not be repeated here. The first transistor Q11 and the second transistor Q12 are very close to each other, their gate traces are very close to each other, and their drain traces are very close to each other, maintaining the same trace length. While maintaining peak drive strength, the first ferrite bead FB1 and the second ferrite bead FB2 minimize noise, thereby keeping the switching characteristics of the first transistor Q11 and the second transistor Q12 relatively unaffected.

[0102] exist Figure 3In the illustrated embodiment, the first power switch circuit 121 further includes a fifth resistor R5. The first end of the fifth resistor R5 is coupled to the control terminal of the first transistor Q11. The second end of the fifth resistor R5 is coupled to the second terminal of the first transistor Q11. Similarly, the second power switch circuit 122 further includes a sixth resistor R6. The first end of the sixth resistor R6 is coupled to the control terminal of the second transistor Q12. The second end of the sixth resistor R6 is coupled to the second terminal of the second transistor Q12. When the control signal S1 turns off the first transistor Q11 and the second transistor Q12, the fifth resistor R5 couples the gate of the first transistor Q11 to the first reference voltage GND1 (maintaining the gate voltage at a low value) to ensure that the first transistor Q11 is off, and the sixth resistor R6 couples the gate of the second transistor Q12 to the first reference voltage GND1 (maintaining the gate voltage at a low value) to ensure that the second transistor Q12 is off.

[0103] exist Figure 3 In the illustrated embodiment, the first power switch circuit 121 further includes a seventh resistor R7 and a first capacitor C1. The second power switch circuit 122 further includes an eighth resistor R8 and a second capacitor C2. The seventh resistor R7 and the first capacitor C1 are connected in series between the first terminal and the second terminal of the first transistor Q11. For example (but not limited to), the first terminal of the seventh resistor R7 is coupled to the first terminal of the first transistor Q11, the second terminal of the seventh resistor R7 is coupled to the first terminal of the first capacitor C1, and the second terminal of the first capacitor C1 is coupled to the second terminal of the first transistor Q11. The seventh resistor R7 and the first capacitor C1 can reduce high-frequency voltage and current fluctuations that occur during the turn-on and turn-off processes of the first transistor Q11. For the connection of the sixth resistor R6, the eighth resistor R8, the second capacitor C2, and the second transistor Q12 to the first reference voltage GND1, please refer to the relevant descriptions of the fifth resistor R5, the seventh resistor R7, and the first capacitor C1.

[0104] In summary, the PFC circuit 120 includes a first transistor Q11 and a second transistor Q12, an inductor L1, a first diode D1, and other components to ensure efficient operation and minimize noise. The layout design maintains close proximity and identical trace lengths for the gate and drain traces of the first transistor Q11 and the second transistor Q12. This design ensures that the gate signals of each first transistor Q11 and second transistor Q12 have the same timing and noise levels, thus preventing excessive current stress during transients. The use of first ferrite beads FB1 and second ferrite beads FB2 minimizes noise while maintaining peak drive strength. Based on the same control signal S1, first ferrite beads FB1 and second ferrite beads FB2 ensure that the gate signals (control signal S1) from the control circuit 170 to the gates of each transistor Q11 and Q12 have the same timing and noise levels. This prevents one power transistor from turning on slower than the other, thus preventing one power transistor from experiencing excessive current stress during transients.

[0105] Figure 4 The circuit diagram of the switching circuit 130, the resonant tank 140, the transformer 150 and the secondary rectifier circuit 160 is shown according to an embodiment of the present invention. Figure 4 The first reference voltage GND1 shown represents the reference voltage on the primary side of transformer 150, while Figure 4 The second reference voltage GND2 shown represents the reference voltage on the secondary side of transformer 150. Figure 4 The switch circuit 130, resonant tank 140, transformer 150, and secondary rectifier circuit 160 shown can be used as... Figure 1 This is one of many implementation examples of the switch circuit 130, resonant tank 140, transformer 150, and secondary-side rectifier circuit 160 shown. Figure 4 The switch circuit 130, resonant tank 140, transformer 150, and secondary rectifier circuit 160 shown can be referenced. Figure 1 The relevant explanation, and Figure 4 The PFC circuit 120 shown can be referenced. Figure 2 or Figure 3 Related explanations.

[0106] exist Figure 4In the illustrated embodiment, the switching circuit 130 includes an upper transistor Q41 and a lower transistor Q42. The control terminal (e.g., gate) of the upper transistor Q41 is coupled to the second output terminal T2 of the control circuit 170 and is controlled by the control signal S2 output by the control circuit 170. The first terminal (e.g., drain) of the upper transistor Q41 is coupled to the output terminal of the PFC circuit 120. The second terminal (e.g., source) of the upper transistor Q41 is coupled to the output terminal of the switching circuit 130 to provide a periodic voltage to the resonant tank 140. The control terminal (e.g., gate) of the lower transistor Q42 is coupled to the third output terminal T3 of the control circuit 170 and is controlled by the control signal S3 output by the control circuit 170. The first terminal (e.g., drain) of the lower transistor Q42 is coupled to the second terminal of the upper transistor Q41. The second terminal (e.g., source) of the lower transistor Q42 receives a first reference voltage GND1.

[0107] exist Figure 4 In the illustrated embodiment, transformer 150 includes a primary winding and a secondary winding, while resonant slot 140 includes a resonant inductor Lr, a magnetizing inductor Lm, and a resonant capacitor Cr. A first end of the resonant inductor Lr is coupled to the input terminal of resonant slot 140, i.e., coupled to the output terminal of switching circuit 130. A second end of the resonant inductor Lr is coupled to a first end of the primary winding of transformer 150 and a first end of magnetizing inductor Lm. A second end of magnetizing inductor Lm is coupled to a second end of the primary winding of transformer 150. A first end of resonant capacitor Cr is coupled to a second end of magnetizing inductor Lm. A second end of resonant capacitor Cr is coupled to a first reference voltage GND1.

[0108] exist Figure 4 In the illustrated embodiment, the secondary-side rectifier circuit 160 includes a plurality of first switches (e.g., Figure 4 The switches shown are Q21, Q22, and Q23) and multiple second switches (e.g. Figure 4 The switches Q31, Q32, and Q33 are shown. The first terminals (e.g., drains) of the first switches Q21, Q22, and Q23 are coupled to the first tap of the secondary winding of transformer 150. The first terminals (e.g., drains) of the second switches Q31, Q32, and Q33 are coupled to the second tap of the secondary winding of transformer 150. The second terminals (e.g., sources) of the first switches Q21, Q22, and Q23 and the second switches Q31, Q32, and Q33 are coupled to the output of the secondary rectifier circuit 160, i.e., coupled to the power supply terminal of the load 12. The third tap of the secondary winding of transformer 150 is coupled to the second reference voltage GND2. The reference terminal of the load 12 is coupled to the third tap of the secondary winding of transformer 150 to be coupled to the second reference voltage GND2.

[0109] exist Figure 4In the illustrated embodiment, the secondary-side rectifier circuit 160 further includes a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, and a twelfth resistor R12. The first terminal of the ninth resistor R9 is coupled to the fourth output terminal T4 of the control circuit 170 to receive the control signal S4. The second terminal of the ninth resistor R9 is coupled to the control terminal (e.g., the gate) of the first switches Q21, Q22, and Q23. The ninth resistor R9 limits the current flowing to the gates of the first switches Q21, Q22, and Q23 when they are turned on and off. The first terminal of the tenth resistor R10 is coupled to the second terminal of the ninth resistor R9. The second terminal of the tenth resistor R10 is coupled to the second reference voltage GND2. When the first switches Q21, Q22 and Q23 are turned off, the tenth resistor R10 couples the gates of the first switches Q21, Q22 and Q23 to the second reference voltage GND2, so as to maintain the gate voltages of the first switches Q21, Q22 and Q23 at a low value.

[0110] The first terminal of the eleventh resistor R11 is coupled to the fifth output terminal T5 of the control circuit 170 to receive the control signal S5. The second terminal of the eleventh resistor R11 is coupled to the control terminal (e.g., the gate) of the second switches Q31, Q32, and Q33. The eleventh resistor R11 limits the current flowing to the gates of the second switches Q31, Q32, and Q33 when the second switches Q31, Q32, and Q33 are turned on and off. The first terminal of the twelfth resistor R12 is coupled to the second terminal of the eleventh resistor R11. The second terminal of the twelfth resistor R12 is coupled to the second reference voltage GND2. When the second switches Q31, Q32, and Q33 are turned off, the twelfth resistor R12 couples the gates of the second switches Q31, Q32, and Q33 to the second reference voltage GND2 to maintain the gate voltages of the second switches Q31, Q32, and Q33 at a low value.

[0111] exist Figure 4In the illustrated embodiment, the secondary-side rectifier circuit 160 further includes a thirteenth resistor R13, a third capacitor C3, a fourteenth resistor R14, and a fourth capacitor C4. The first terminal of the thirteenth resistor R13 is coupled to the first tap of the secondary winding of the transformer 150. The first terminal of the third capacitor C3 is coupled to the second terminal of the thirteenth resistor R13. The second terminal of the third capacitor C3 is coupled to the output terminal of the secondary-side rectifier circuit 160. The thirteenth resistor R13 and the third capacitor C3 can reduce high-frequency voltage and current fluctuations during the turn-on and turn-off processes of the first switches Q21, Q22, and Q23. The first terminal of the fourteenth resistor R14 is coupled to the second tap of the secondary winding of the transformer 150. The first terminal of the fourth capacitor C4 is coupled to the second terminal of the fourteenth resistor R14. The second terminal of the fourth capacitor C4 is coupled to the output terminal of the secondary-side rectifier circuit 160. The fourteenth resistor R14 and the fourth capacitor C4 can reduce high-frequency voltage and current fluctuations during the conduction and turn-off processes of the second switches Q31, Q32 and Q33.

[0112] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this utility model, and are not intended to limit it. Although the utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this utility model.

Claims

1. A power factor correction circuit, characterized in that, The power factor correction circuit includes: An inductor having a first terminal as the input terminal of the power factor correction circuit; A first diode, wherein a first terminal of the first diode is coupled to a second terminal of the inductor, and the second terminal of the first diode serves as the output terminal of the power factor correction circuit; The control circuit has a first output terminal; A first power switching circuit, wherein a first terminal of the first power switching circuit is coupled to a second terminal of the inductor, a second terminal of the first power switching circuit is coupled to a first reference voltage, and a control terminal of the first power switching circuit is coupled to a first output terminal of the control circuit; and A second power switch circuit, wherein a first terminal of the second power switch circuit is coupled to a second terminal of the inductor, a second terminal of the second power switch circuit is coupled to a first reference voltage, and a control terminal of the second power switch circuit is coupled to a first output terminal of the control circuit.

2. The power factor correction circuit according to claim 1, characterized in that, The power factor correction circuit further includes: An output capacitor, wherein a first terminal of the output capacitor is coupled to a second terminal of the first diode, and a second terminal of the output capacitor is coupled to the first reference voltage.

3. The power factor correction circuit according to claim 1, characterized in that, The first power switching circuit includes: A first transistor, wherein a first terminal of the first transistor is coupled to a second terminal of the inductor, and a second terminal of the first transistor is coupled to the first reference voltage; The first magnetic bead; and A first resistor circuit, wherein the first ferrite bead and the first resistor circuit are connected in series between the control terminal of the first transistor and the first output terminal of the control circuit.

4. The power factor correction circuit according to claim 3, characterized in that, The second power switching circuit includes: The second transistor, wherein a first terminal of the second transistor is coupled to a second terminal of the inductor, and a second terminal of the second transistor is coupled to the first reference voltage; The second magnetic bead; and The second resistor circuit, wherein the second ferrite bead and the second resistor circuit are connected in series between the control terminal of the second transistor and the first output terminal of the control circuit.

5. The power factor correction circuit according to claim 4, characterized in that, The first resistor circuit includes: A first resistor, wherein a first end of the first resistor is coupled to the first output terminal of the control circuit; A second resistor, wherein a first end of the second resistor is coupled to a second end of the first resistor, and a second end of the second resistor is coupled to a first end of the first ferrite bead; and The second diode, wherein a first end of the second diode is coupled to a second end of the first resistor, and a second end of the second diode is coupled to a first end of the first ferrite bead.

6. The power factor correction circuit according to claim 5, characterized in that, The second resistor circuit includes: A third resistor, wherein the first end of the third resistor is coupled to the first output terminal of the control circuit; A fourth resistor, wherein a first end of the fourth resistor is coupled to a second end of the third resistor, and a second end of the fourth resistor is coupled to a first end of the second ferrite bead; and A third diode, wherein a first end of the third diode is coupled to a second end of the third resistor, and a second end of the third diode is coupled to a first end of the second ferrite bead.

7. The power factor correction circuit according to claim 6, characterized in that, The first power switching circuit further includes: A fifth resistor, wherein a first end of the fifth resistor is coupled to the control terminal of the first transistor, and a second end of the fifth resistor is coupled to the second terminal of the first transistor.

8. The power factor correction circuit according to claim 7, characterized in that, The second power switching circuit also includes: A sixth resistor, wherein a first end of the sixth resistor is coupled to the control terminal of the second transistor, and a second end of the sixth resistor is coupled to the second terminal of the second transistor.

9. The power factor correction circuit according to claim 8, characterized in that, The first power switching circuit further includes: The seventh resistor; and The first capacitor, wherein the seventh resistor is connected in series with the first capacitor between the first terminal of the first transistor and the second terminal of the first transistor.

10. The power factor correction circuit according to claim 9, characterized in that, The second power switching circuit also includes: The eighth resistor; and The second capacitor, wherein the eighth resistor is connected in series with the second capacitor between the first terminal of the second transistor and the second terminal of the second transistor.

11. A power conversion device, characterized in that, The power conversion device includes: A power factor correction circuit has an input terminal for receiving DC voltage; A switching circuit, wherein the input terminal of the switching circuit is coupled to the output terminal of the power factor correction circuit; A resonant slot, wherein the input terminal of the resonant slot is coupled to the output terminal of the switching circuit; A transformer, wherein the primary winding of the transformer is coupled to the output of the resonant slot; Secondary rectifier circuit, wherein the input terminal of the secondary rectifier circuit is coupled to the secondary winding of the transformer, and the output terminal of the secondary rectifier circuit serves as the output terminal of the power conversion device; and The control circuit has a first output terminal. The power factor correction circuit includes: An inductor having a first terminal as the input terminal of the power factor correction circuit; A first diode, wherein a first terminal of the first diode is coupled to a second terminal of the inductor, and the second terminal of the first diode serves as the output terminal of the power factor correction circuit; A first power switching circuit, wherein a first terminal of the first power switching circuit is coupled to a second terminal of the inductor, a second terminal of the first power switching circuit is coupled to a first reference voltage, and a control terminal of the first power switching circuit is coupled to a first output terminal of the control circuit; and A second power switch circuit, wherein a first terminal of the second power switch circuit is coupled to a second terminal of the inductor, a second terminal of the second power switch circuit is coupled to a first reference voltage, and a control terminal of the second power switch circuit is coupled to a first output terminal of the control circuit.

12. The power conversion device according to claim 11, characterized in that, The first power switching circuit includes: A first transistor, wherein a first terminal of the first transistor is coupled to a second terminal of the inductor, and a second terminal of the first transistor is coupled to the first reference voltage; The first magnetic bead; and A first resistor circuit, wherein the first ferrite bead and the first resistor circuit are connected in series between the control terminal of the first transistor and the first output terminal of the control circuit.

13. The power conversion device according to claim 12, characterized in that, The second power switching circuit includes: The second transistor, wherein a first terminal of the second transistor is coupled to a second terminal of the inductor, and a second terminal of the second transistor is coupled to the first reference voltage; The second magnetic bead; and The second resistor circuit, wherein the second ferrite bead and the second resistor circuit are connected in series between the control terminal of the second transistor and the first output terminal of the control circuit.

14. The power conversion device according to claim 13, characterized in that, The first resistor circuit includes: A first resistor, wherein a first end of the first resistor is coupled to the first output terminal of the control circuit; A second resistor, wherein a first end of the second resistor is coupled to a second end of the first resistor, and a second end of the second resistor is coupled to a first end of the first ferrite bead; and The second diode, wherein a first end of the second diode is coupled to a second end of the first resistor, and a second end of the second diode is coupled to a first end of the first ferrite bead.

15. The power conversion device according to claim 14, characterized in that, The second resistor circuit includes: A third resistor, wherein the first end of the third resistor is coupled to the first output terminal of the control circuit; A fourth resistor, wherein a first end of the fourth resistor is coupled to a second end of the third resistor, and a second end of the fourth resistor is coupled to a first end of the second ferrite bead; and A third diode, wherein a first end of the third diode is coupled to a second end of the third resistor, and a second end of the third diode is coupled to a first end of the second ferrite bead.

16. The power conversion device according to claim 11, characterized in that, The control circuit further includes a second output terminal and a third output terminal, and the switching circuit includes: An upper transistor, wherein the control terminal of the upper transistor is coupled to the second output terminal of the control circuit, the first terminal of the upper transistor is coupled to the output terminal of the power factor correction circuit, and the second terminal of the upper transistor is coupled to the output terminal of the switching circuit; and The lower transistor has a control terminal coupled to the third output terminal of the control circuit, a first terminal coupled to the second terminal of the upper transistor, and a second terminal coupled to the first reference voltage.

17. The power conversion device according to claim 11, characterized in that, The resonant groove includes: A resonant inductor, wherein a first end of the resonant inductor is coupled to the input terminal of the resonant slot, and a second end of the resonant inductor is coupled to the first end of the primary winding of the transformer; A magnetizing inductor, wherein a first end of the magnetizing inductor is coupled to a first end of the primary winding of the transformer, and a second end of the magnetizing inductor is coupled to a second end of the primary winding of the transformer; and A resonant capacitor, wherein a first end of the resonant capacitor is coupled to a second end of the primary winding of the transformer, and a second end of the resonant capacitor is coupled to the first reference voltage.

18. The power conversion device according to claim 11, characterized in that, The secondary-side rectifier circuit includes: A plurality of first switches, wherein the first ends of the plurality of first switches are commonly coupled to a first tap of the secondary winding of the transformer; and A plurality of second switches, wherein the first ends of the plurality of second switches are commonly coupled to the second tap of the secondary winding of the transformer, the second ends of the plurality of first switches and the second ends of the plurality of second switches are commonly coupled to the output terminal of the secondary rectifier circuit, and the third tap of the secondary winding of the transformer is coupled to a second reference voltage.

19. The power conversion device according to claim 18, characterized in that, The control circuit further includes a fourth output terminal and a fifth output terminal, and the secondary-side rectifier circuit further includes: A ninth resistor, wherein a first end of the ninth resistor is coupled to the fourth output terminal of the control circuit, and a second end of the ninth resistor is coupled to the control terminal of the plurality of first switches; A tenth resistor, wherein a first terminal of the tenth resistor is coupled to a second terminal of the ninth resistor, and a second terminal of the tenth resistor is coupled to a second reference voltage; An eleventh resistor, wherein a first end of the eleventh resistor is coupled to the fifth output terminal of the control circuit, and a second end of the eleventh resistor is coupled to the control terminal of the plurality of second switches; and The twelfth resistor, wherein a first end of the twelfth resistor is coupled to a second end of the eleventh resistor, and a second end of the twelfth resistor is coupled to a second reference voltage.

20. The power conversion device according to claim 18, characterized in that, The secondary-side rectifier circuit also includes: The thirteenth resistor, wherein the first end of the thirteenth resistor is coupled to the first tap end of the secondary winding of the transformer; A third capacitor, wherein a first terminal of the third capacitor is coupled to a second terminal of the thirteenth resistor, and a second terminal of the third capacitor is coupled to the output terminal of the secondary rectifier circuit; The fourteenth resistor, wherein a first end of the fourteenth resistor is coupled to the second tap of the secondary winding of the transformer; and A fourth capacitor, wherein a first terminal of the fourth capacitor is coupled to a second terminal of the fourteenth resistor, and a second terminal of the fourth capacitor is coupled to the output terminal of the secondary-side rectifier circuit.