A photovoltaic optimizer circuit and photovoltaic optimizer

Abstract

The utility model relates to photovoltaic power transmission technical field discloses a kind of photovoltaic optimizer circuit and photovoltaic optimizer, the circuit includes first switch tube, second switch tube, first capacitor, first inductor and control circuit, utilize second switch tube to replace diode in BUCK topological structure, control circuit gathers the loop current signal of first inductor, output first control signal to the controlled end of first switch tube, output second control signal to the controlled end of second switch tube, when the loop current signal is greater than set threshold signal, the control circuit controls the conduction state of second switch tube and the conduction state of first switch tube opposite, when the loop current signal is less than set threshold signal, the control circuit controls second switch tube is in off state, the utility model can increase conversion efficiency, can avoid the loss of inductance increase, and avoid producing some unnecessary radiation interference.

Description

Technical Field

[0001] This utility model relates to the field of photovoltaic power transmission technology, specifically to a photovoltaic optimizer circuit and a photovoltaic optimizer. Background Technology

[0002] A photovoltaic (PV) optimizer is essentially a DC-DC converter that can boost or buck the DC voltage output from PV modules. Currently, PV optimizers have various topologies, such as the three basic topologies: BUCK, BOOST, and BUCK-BOOST.

[0003] A photovoltaic optimizer circuit based on the BUCK topology is essentially a single-transistor non-isolated DC-DC converter with an output voltage lower than its input voltage. For example... Figure 1 As shown, the photovoltaic optimizer circuit based on the BUCK topology includes transistor Q1, diode D1, inductor L1, and capacitor C1. Transistor Q1 acts as a switch, turning the current on and off. Transistor Q1 is controlled by a pulse width modulation (PWM) signal. Capacitor C1 serves as a filter capacitor, reducing the ripple of the output voltage Uo.

[0004] In the aforementioned photovoltaic optimizer circuit, when the switching transistor is off, diode D1 conducts, resulting in a voltage of approximately 0.5V across it. This voltage causes some energy loss and reduces the conversion efficiency of the photovoltaic optimizer. Related technologies propose using a controlled switching transistor instead of diode D1, and controlling the controlled switching transistor with a PWM signal opposite to that of transistor Q1. However, when the current is low, the inductor current IL drops below zero when inductor L1 releases its current, leading to significant inductor current ripple, increased inductor losses, and unwanted radiated interference. Utility Model Content

[0005] In view of this, the present invention provides a photovoltaic optimizer circuit and a photovoltaic optimizer to solve the technical problem of low conversion efficiency of photovoltaic optimizer circuit.

[0006] In a first aspect, this utility model provides a photovoltaic optimizer circuit, comprising: a first switching transistor, a second switching transistor, a first capacitor, a first inductor, and a control circuit; The first terminal of the first switching transistor is connected to the positive terminal of the input voltage source. The second terminal of the first switching transistor is connected to the first terminal of the first inductor and the first terminal of the second switching transistor. The second terminal of the first inductor is connected to the first terminal of the first capacitor. The second terminal of the first capacitor is connected to the second terminal of the second switching transistor and the negative terminal of the input voltage source. The first and second terminals of the first capacitor serve as the positive and negative terminals of the output, respectively. The control circuit is used to acquire the loop current signal of the first inductor, output a first control signal to the controlled terminal of the first switch, and output a second control signal to the controlled terminal of the second switch. When the loop current signal is greater than the set threshold signal, the control circuit controls the conduction state of the second switch to be opposite to that of the first switch. When the loop current signal is less than the set threshold signal, the control circuit controls the second switch to be in the off state.

[0007] In some alternative implementations, the control circuitry includes a control unit and a signal conditioning circuitry; The control unit is used to output a PWM signal as the first control signal; A signal conditioning circuit is used to output a second control signal based on a first control signal and a current signal from a first inductor.

[0008] In some alternative implementations, the signal conditioning circuit includes a comparator circuit and a logic circuit; The comparator circuit is used to compare the loop current signal and the set threshold signal, and outputs a comparison signal based on the comparison result. When the loop current signal is greater than the set threshold signal, the comparison signal is high; when the loop current signal is less than the set threshold signal, the comparison signal is low. The logic circuit is used to perform logical operations on the comparison signal and the first control signal to obtain the second control signal; wherein, when the comparison signal is high, the second control signal is a PWM signal that is opposite to the first control signal; when the comparison signal is low, the second control signal is low.

[0009] In some alternative implementations, the comparison circuit includes a comparator, a current sampling sensor, and a preset reference power supply. The current sampling sensor is located on the negative bus of the photovoltaic optimizer circuit to collect the loop current signal. The current sampling sensor is connected to the positive input terminal of the comparator, and the preset reference power supply is connected to the negative input terminal of the comparator. The preset reference power supply is used to output a set threshold signal.

[0010] In some alternative implementations, the logic circuit includes a NOT gate and an AND gate. The input of the NOT gate is connected to the control unit to receive a first control signal. The output of the NOT gate is connected to the first input of the AND gate. The second input of the AND gate is connected to the output of the comparator. The output of the AND gate is connected to the controlled terminal of the second switch.

[0011] In some alternative implementations, the second switch is a MOSFET, the first connection terminal of the second switch is the drain of the MOSFET, the second connection terminal of the second switch is the source of the MOSFET, and the controlled terminal of the second switch is the gate of the MOSFET.

[0012] In some alternative implementations, the control unit is a microcontroller or a signal generator.

[0013] Secondly, this utility model provides a photovoltaic optimizer, including the photovoltaic optimizer circuit as described in any of the first aspects of this utility model.

[0014] This utility model has at least the following beneficial effects: This utility model discloses a photovoltaic optimizer circuit that replaces the diode in the BUCK topology with a second switching transistor and adds a control circuit. The control circuit collects the loop current signal of the first inductor, outputs a first control signal to the controlled terminal of the first switching transistor, and outputs a second control signal to the controlled terminal of the second switching transistor. When the loop current signal is greater than a set threshold signal, the control circuit controls the conduction state of the second switching transistor to be opposite to that of the first switching transistor. When the loop current signal is less than the set threshold signal, the control circuit controls the second switching transistor to be in the off state. This increases the conversion efficiency of the photovoltaic optimizer while avoiding increased inductor losses and unnecessary radiation interference. Attached Figure Description

[0015] To more clearly illustrate the specific embodiments of this utility model or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this utility model. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0016] Figure 1 This is a circuit diagram of a photovoltaic optimizer circuit in related technologies; Figure 2 This is a schematic diagram of the topology of a photovoltaic optimizer circuit in energy storage in related technologies; Figure 3 This is a topology diagram of a photovoltaic optimizer circuit during energy release in related technologies; Figure 4 This is a circuit diagram of the photovoltaic optimizer circuit according to an embodiment of the present invention; Figure 5 This is a waveform diagram of the photovoltaic optimizer circuit according to an embodiment of the present invention.

[0017] Explanation of reference numerals in the attached figures: Q41, first switching transistor; Q42, second switching transistor; C41, first capacitor; L41, first inductor; U1, comparator; U2, NOT gate; U3, AND gate; preset reference power supply, VDC3; first diode; Vpwm1, first control signal; Vpwm2, second control signal; Vc, comparison signal; IL loop current signal. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.

[0019] In the description of this utility model, it should be noted that the terms "first", "second" and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0020] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances. Furthermore, the technical features involved in the different embodiments of this utility model described below can be combined with each other as long as they do not conflict with each other.

[0021] Currently, photovoltaic optimizer circuits based on the BUCK topology, such as Figure 1 As shown, the circuit includes transistor Q1, diode D1, inductor L1, and capacitor C1. Transistor Q1 acts as a switch, turning current on and off. Transistor Q1 is controlled by a pulse width modulation (PWM) signal. Capacitor C1 serves as a filter capacitor, reducing the ripple of the output voltage Uo.

[0022] like Figure 2 As shown, when transistor Q1 is turned on, diode D1 is turned off. At this time, the current flows through inductor L1 and then to load R1. As the current in inductor L1 increases linearly, self-inductance occurs, which in turn hinders the rise of the current. Inductor L1 converts electrical energy into magnetic energy for storage. At this time, the direction of the self-induced electromotive force of inductor L1 is positive on the left and negative on the right.

[0023] like Figure 3As shown, when transistor Q1 is off, no current flows to inductor L1; however, the inductor current does not abruptly drop to 0, but rather gradually decreases. Since the inductor impedes the change in current, a self-induced electromotive force (EMF) is generated with the left side negative and the right side positive, causing diode D1 to conduct. As the current decreases, the magnetic energy previously stored in L1 is converted into electrical energy, releasing current to the load R1.

[0024] When the switching transistor is off, diode D1 conducts in the photovoltaic optimizer circuit described above. Diode D1 has a voltage of about 0.5V, which will cause some energy loss and reduce the conversion efficiency of the photovoltaic optimizer.

[0025] Related technologies propose using a controlled switch to replace diode D1 and using a PWM signal opposite to that of transistor Q1 to control the controlled switch. When the current is small, when inductor L1 releases current, the inductor current IL will drop below 0, the ripple of the inductor current will be large, increasing the inductor loss and generating some unnecessary radiation interference and other problems.

[0026] In view of this, the present invention proposes a photovoltaic optimizer circuit, such as... Figure 4 As shown, the photovoltaic optimizer circuit includes: The system consists of a first switching transistor Q41, a second switching transistor Q42, a first capacitor C41, a first inductor L41, and a control circuit. The first terminal of the first switch Q41 is connected to the positive terminal of the input voltage source. The second terminal of the first switch Q41 is connected to the first terminal of the first inductor L41 and the first terminal of the second switch Q42. The second terminal of the first inductor L41 is connected to the first terminal of the first capacitor C41. The second terminal of the first capacitor C41 is connected to the second terminal of the second switch Q42 and the negative terminal of the input voltage source. The first and second terminals of the first capacitor C41 serve as the positive and negative terminals of the output, respectively. The control circuit is used to acquire the loop current signal IL of the first inductor L41, output the first control signal Vpwm1 to the controlled terminal of the first switch Q41, and output the second control signal Vpwm2 to the controlled terminal of the second switch Q42. When the loop current signal IL is greater than the set threshold signal, the control circuit controls the conduction state of the second switch Q42 to be opposite to the conduction state of the first switch Q41. When the loop current signal IL is less than the set threshold signal, the control circuit controls the second switch Q42 to be in the off state.

[0027] Specifically, the first switch Q41 and the second switch Q42 can be transistors, MOSFETs, etc. Both the first switch Q41 and the second switch Q42 are controlled by a PWM signal. In one example, the first switch Q41 is a transistor, and the second switch Q42 is a MOSFET. The first connection terminal of the first switch Q41 is the collector of the transistor, the second connection terminal of the first switch Q41 is the emitter of the transistor, and the controlled terminal of the first switch Q41 is the base of the transistor. The first connection terminal of the second switch Q42 is the drain of the MOSFET, the second connection terminal of the second switch Q42 is the source of the MOSFET, and the controlled terminal of the second switch Q42 is the gate of the MOSFET.

[0028] The first capacitor, C41, acts as a filter capacitor, which can reduce the pulsation of the output voltage Vo.

[0029] The first inductor L41 is used to store or release input electrical energy according to the conduction state of the first switch Q41 and the second switch Q42.

[0030] The control circuit is mainly used to output a first control signal Vpwm1 and a second control signal Vpwm2 to control the on and off states of the first switch Q41 and the second switch Q42. Both the first control signal Vpwm1 and the second control signal Vpwm2 are PWM signals, wherein the first control signal Vpwm1 is a PWM signal in which high and low levels alternate sequentially according to a set period.

[0031] The current value corresponding to the threshold signal can be set according to the actual working conditions, such as 3mA, 5mA or 10mA. In this implementation, 10mA is used as an example for explanation.

[0032] like Figure 5 As shown, when the loop current signal IL is greater than the set threshold signal, that is, when the loop current flowing through the first inductor L41 is greater than 10mA, the control circuit controls the conduction state of the second switch Q42 to be opposite to the conduction state of the first switch Q41 through the first control signal Vpwm1 and the second control signal Vpwm2. There are two working conditions that alternate: the first working condition is that the first switch Q41 is on and the second switch Q42 is off, and the second working condition is that the first switch Q41 is off and the second switch Q42 is on.

[0033] When the first switch Q41 is turned on and the second switch Q42 is turned off, current flows through the first inductor L41 and then to the load. As the current in the first inductor L41 increases linearly, self-inductance occurs, which impedes the current increase. Thus, the first inductor L1 converts electrical energy into magnetic energy for storage. When the first switch Q41 is turned off and the second switch Q42 is turned on, no current flows to the first inductor L41, and the current in the first inductor L41 decreases. The magnetic energy previously stored in the first inductor L41 is then converted into electrical energy, releasing current to the load R1. At this time, the resistance of the second switch Q2 is only about 3 milliohms, which significantly reduces energy loss compared to a diode, improving the overall conversion efficiency of the photovoltaic optimizer.

[0034] When the loop current signal IL is less than the set threshold signal, that is, when the loop current of the first inductor L41 is less than 10mA, the control circuit controls the second switch Q42 to be in the off state, and the first control signal Vpwm1 remains unchanged. At this time, when the first switch Q41 is off, the second switch Q42 is also in the off state, and the first inductor L41 cannot release current. Therefore, the current will not continue to decrease, ensuring that the current is not too low. This avoids increasing the ripple of the current flowing through the first inductor L41, increasing the loss of the first inductor L41, and generating some unnecessary radiation interference and other problems.

[0035] This utility model discloses a photovoltaic optimizer circuit that replaces the diode in the BUCK topology with a second switch Q42 and adds a control circuit. The control circuit collects the loop current signal IL of the first inductor L41, outputs a first control signal Vpwm1 to the controlled terminal of the first switch Q41, and outputs a second control signal Vpwm2 to the controlled terminal of the second switch Q42. When the loop current signal IL is greater than a set threshold signal, the control circuit controls the conduction state of the second switch Q42 to be opposite to that of the first switch Q41. When the loop current signal IL is less than the set threshold signal, the control circuit controls the second switch Q42 to be in the off state. This increases the conversion efficiency of the photovoltaic optimizer while avoiding increased inductor losses and unnecessary radiation interference.

[0036] In some embodiments, the control circuit includes a control unit and a signal conditioning circuit; the control unit is used to output a PWM signal as a first control signal Vpwm1; the signal conditioning circuit is used to output a second control signal Vpwm2 based on the first control signal Vpwm1 and the current signal of the first inductor L41.

[0037] Specifically, the control unit is a microcontroller or a signal generator, which outputs a PWM signal that alternates between high and low levels as the first control signal Vpwm1.

[0038] Furthermore, the signal conditioning circuit includes a comparator circuit and a logic circuit.

[0039] The comparator circuit is used to compare the loop current signal IL with the set threshold signal, and outputs a comparison signal Vc based on the comparison result. When the loop current signal IL is greater than the set threshold signal, the comparison signal Vc is high; when the loop current signal IL is less than the set threshold signal, the comparison signal Vc is low.

[0040] Specifically, the comparison circuit includes a comparator U1, a current sampling sensor, and a preset reference power supply. The current sampling sensor is set on the negative bus of the photovoltaic optimizer circuit to collect the loop current signal IL. The current sampling sensor is connected to the positive input terminal of the comparator U1, and the preset reference power supply is connected to the negative input terminal of the comparator U1. The preset reference power supply is used to output a set threshold signal.

[0041] The working principle of the comparator circuit is as follows: a voltage signal is output by the preset reference power supply as a set threshold signal, and the current sampling sensor samples the loop current signal IL on the first inductor L41. When the loop current signal IL is greater than the set threshold signal, the comparator U1 outputs a high-level comparison signal Vc. When the loop current signal IL is less than the set threshold signal, the comparator U1 outputs a low-level comparison signal Vc.

[0042] The logic circuit is used to perform a logic operation between the comparison signal Vc and the first control signal Vpwm1 to obtain the second control signal Vpwm2; wherein, when the comparison signal Vc is high, the second control signal Vpwm2 is a PWM signal that is opposite to the first control signal Vpwm1; when the comparison signal Vc is low, the second control signal Vpwm2 is low.

[0043] Specifically, the logic circuit includes a NOT gate U2 and an AND gate U3. The input terminal of the NOT gate U2 is connected to the control unit to receive the first control signal Vpwm1. The output terminal of the NOT gate U2 is connected to the first input terminal of the AND gate U3. The second input terminal of the AND gate U3 is connected to the output terminal of the comparator U1. The output terminal of the AND gate U3 is connected to the controlled terminal of the second switch Q42.

[0044] It should be understood that the NOT gate circuit U2 and the AND gate circuit U3 can be made using corresponding NOT gate logic chips and AND gate logic chips, or NOT gate logic circuits and AND gate logic circuits designed with sampling MOS circuits.

[0045] By using NOT gate U2 and AND gate U3, when the comparison signal Vc is high, the second control signal Vpwm2 is a PWM signal opposite to the first control signal Vpwm1; when the comparison signal Vc is low, the second control signal Vpwm2 is low. This ensures that when the loop current signal IL is greater than the set threshold signal, the control circuit controls the second switch Q2 to be in the opposite state to the first switch Q41. When the loop current signal IL is less than the set threshold signal, the control circuit controls the second switch Q42 to be in the off state. Consequently, when the loop current of the first inductor L41 is less than the set threshold, the first inductor L41 cannot release current, and the current will not continue to decrease. This ensures that the current is not too low, avoids increasing the ripple of the current flowing through the first inductor L41, increasing the loss of the first inductor L41, and generating some unnecessary radiation interference.

[0046] The circuit structure of this utility model embodiment can quickly and accurately generate a second control signal Vpwm2 based on the comparison signal Vc and the first control signal Vpwm1, thereby achieving effective control over the conduction state of the second switch Q2 and helping to improve the control efficiency and stability of the entire photovoltaic optimizer circuit.

[0047] This utility model embodiment also provides a photovoltaic optimizer, including the photovoltaic optimizer circuit as described in any of the above embodiments of this utility model.

[0048] Although embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the present invention, and all such modifications and variations fall within the scope of protection.

Claims

1. A photovoltaic optimizer circuit, characterized in that, include: First switching transistor, second switching transistor, first capacitor, first inductor, and control circuit; The first terminal of the first switch is connected to the positive terminal of the input voltage source. The second terminal of the first switch is connected to the first terminal of the first inductor and the first terminal of the second switch, respectively. The second terminal of the first inductor is connected to the first terminal of the first capacitor. The second terminal of the first capacitor is connected to the second terminal of the second switch and the negative terminal of the input voltage source, respectively. The first and second terminals of the first capacitor serve as the positive and negative terminals of the output, respectively. The control circuit is used to acquire the loop current signal of the first inductor, output a first control signal to the controlled terminal of the first switch, and output a second control signal to the controlled terminal of the second switch; when the loop current signal is greater than a set threshold signal, the control circuit controls the conduction state of the second switch to be opposite to the conduction state of the first switch; when the loop current signal is less than the set threshold signal, the control circuit controls the second switch to be in the off state.

2. The photovoltaic optimizer circuit according to claim 1, characterized in that, The control circuit includes a control unit and a signal conditioning circuit; The control unit is used to output a PWM signal as the first control signal; The signal conditioning circuit is used to output the second control signal based on the first control signal and the current signal of the first inductor.

3. The photovoltaic optimizer circuit according to claim 2, characterized in that, The signal conditioning circuit includes a comparator circuit and a logic circuit. The comparison circuit is used to compare the loop current signal and the set threshold signal, and outputs a comparison signal based on the comparison result; wherein, when the loop current signal is greater than the set threshold signal, the comparison signal is high level; when the loop current signal is less than the set threshold signal, the comparison signal is low level. The logic circuit is used to perform a logical operation between the comparison signal and the first control signal to obtain the second control signal; wherein, when the comparison signal is high, the second control signal is a PWM signal opposite to the first control signal; when the comparison signal is low, the second control signal is low.

4. The photovoltaic optimizer circuit according to claim 3, characterized in that, The comparison circuit includes a comparator, a current sampling sensor, and a preset reference power supply. The current sampling sensor is installed on the negative bus of the photovoltaic optimizer circuit to collect the loop current signal. The current sampling sensor is connected to the positive input terminal of the comparator, and the preset reference power supply is connected to the negative input terminal of the comparator. The preset reference power supply is used to output the set threshold signal.

5. The photovoltaic optimizer circuit according to claim 4, characterized in that, The logic circuit includes a NOT gate and an AND gate. The input terminal of the NOT gate is connected to the control unit to receive the first control signal. The output terminal of the NOT gate is connected to the first input terminal of the AND gate. The second input terminal of the AND gate is connected to the output terminal of the comparator. The output terminal of the AND gate is connected to the controlled terminal of the second switch.

6. The photovoltaic optimizer circuit according to claim 1, characterized in that, The second switch is a MOSFET, the first connection terminal of the second switch is the drain of the MOSFET, the second connection terminal of the second switch is the source of the MOSFET, and the controlled terminal of the second switch is the gate of the MOSFET.

7. The photovoltaic optimizer circuit according to claim 2, characterized in that, The control unit is a microcontroller or a signal generator.

8. A photovoltaic optimizer, characterized in that, Including the photovoltaic optimizer circuit as claimed in any one of claims 1 to 7.

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