A bus switch circuit with power-down protection

Abstract

The utility model relates to the field of bus switch circuit, concretely relates to a bus switch circuit with power -down protection, including bus switch module, enable module and power -down protection module, power -down protection module includes protection MOS pipe P1, protection MOS pipe P2 and protection diode D4, protection diode D5, protection diode D14, protection diode D17, the source of protection MOS pipe P1 and the source of protection MOS pipe P2 are connected on the input port and the output port of bus switch module respectively, the drain of protection MOS pipe P1 and the drain of protection MOS pipe P2 are electrically connected with the anode of protection diode D4 and the anode of protection diode D5 respectively, the cathode of protection diode D4 and the cathode of protection diode D5 are connected, when the input voltage of input port is greater than VCC, protection diode D5 avoids the current to flow out the output port, realizes the electric leakage protection to the condition that the input voltage is greater than VCC.

Description

Technical Field

[0001] This utility model relates to the field of bus switch circuits, specifically to a bus switch circuit with power-down protection. Background Technology

[0002] A bus switch circuit is an integrated circuit used to control the transmission path of signals in an electronic system. Its core function is to achieve flexible connection or isolation between multiple buses through an internal switch matrix, playing a crucial role in high-speed digital signal transmission, system resource management, and signal integrity assurance. Its technical implementation is based on a MOSFET transistor array, using CMOS logic to control the switch state. When the enable signal is activated, the gate voltage drives the power supply voltage, causing the transistor to conduct under low resistance conditions, enabling bidirectional signal transmission; when disabled, the gate remains at zero volts, forming open-circuit isolation. This design gives the bus switch sub-nanosecond propagation delay, low on-resistance, and low input / output capacitance, meeting the requirements of high-frequency signal switching while minimizing signal distortion and power consumption.

[0003] The power-down protection mechanism of the bus switching circuit is implemented through a multi-level collaborative design. Its core objective is to quickly isolate the input / output ports when the power supply voltage drops abnormally or is completely lost, preventing reverse current, data corruption, or device damage, while ensuring a safe restart after power is restored. This process relies on the dynamic response of the internal circuitry and the cooperation of external components, specifically encompassing key aspects such as voltage monitoring, switch state locking, energy storage maintenance, and isolation enhancement. Traditional bus switching circuits with power-down protection can only guarantee no leakage current when the power supply voltage VCC equals 0, but cannot guarantee no leakage current when the I / O input / output port voltage is greater than the power supply voltage. Utility Model Content

[0004] The purpose of this invention is to provide a bus switch circuit with power-down protection, which aims to improve the problem that traditional bus switch circuits with power-down protection can only ensure that the circuit does not leak current when the power supply voltage VCC is equal to 0, but cannot ensure that the circuit does not leak current when the I / O input / output port voltage is greater than the power supply voltage.

[0005] To achieve the above objectives, the present invention adopts the following technical solution: A bus switch circuit with power-down protection includes a bus switch module, an enable module, and a power-down protection module. The enabling module includes a first control branch and a second control branch, which are respectively connected to the first control terminal and the second control terminal of the bus switch module. The power-down protection module includes protection MOSFETs P1 and P2, and protection diodes D4, D5, D14, and D17. The sources of protection MOSFETs P1 and P2 are connected to the input and output ports of the bus switch module, respectively. The drains of protection MOSFETs P1 and P2 are electrically connected to the anodes of protection diodes D4 and D5, respectively. The cathodes of protection diodes D4 and D5 are connected and electrically connected to the output terminal of the second control branch. An external power supply outputs VCC to the gate of protection MOSFET P1, the gate of protection MOSFET P2, the power input terminal of the first control branch, and the positive terminals of protection diodes D14 and D17; the negative terminal of protection diode D14 is electrically connected to the power input terminal of the second control branch, and the negative terminal of protection diode D17 is electrically connected to the power input terminal of the bus switch module.

[0006] Furthermore, the bus switch module includes an ESD protection branch and a transmission gate branch; The first control branch and the second control branch are respectively connected to the first control terminal and the second control terminal of the transmission gate branch; the ESD protection branch is connected between the input port, the output port, the first control terminal and the second control terminal of the transmission gate branch.

[0007] Furthermore, the ESD protection branch includes diodes D6, D7, D8, D9, D10, D11, D12, and D13; The transmission gate branch includes MOS transistors P0 and N0, and resistors R3 and R4; The source of MOSFET P0 and the source of MOSFET N0 are connected together and are connected to the outside as an input port. The drain of MOSFET P0 and the drain of MOSFET N0 are connected together and are connected to the outside as an output port. The negative terminal of the protection diode D17 is electrically connected to the substrate of MOSFET P0, and the substrate of MOSFET N0 is grounded. The gate of MOSFET N0 is electrically connected to one end of resistor R3, the anode of diode D6, and the anode of diode D8. The other end of resistor R3 is electrically connected to the output terminal of the first control branch as the first control terminal. The cathode of diode D6 is electrically connected to the cathode of diode D7, and the anode of diode D7 is electrically connected to the source of MOSFET P0 and the source of MOSFET N0. The cathode of diode D8 is electrically connected to the cathode of diode D9, and the anode of diode D9 is electrically connected to the source of MOSFET P0 and the drain of MOSFET N0. The gate of the MOSFET P0 is electrically connected to one end of the resistor R4, the anode of diode D11, and the anode of diode D13. The other end of the resistor R4 is electrically connected to the output terminal of the second control branch as the second control terminal. The cathode of diode D11 is electrically connected to the cathode of diode D10, and the anode of diode D10 is electrically connected to the source of MOSFET P0 and the source of MOSFET N0. The cathode of diode D13 is electrically connected to the cathode of diode D12, and the anode of diode D12 is electrically connected to the source of MOSFET P0 and the drain of MOSFET N0.

[0008] Furthermore, the following condition is satisfied: EA D6 =EA D7 =EA D8 =EA D9 =EA D10 =EA D11 =EA D12 =EA D13 ; Among them, EA DX Let EA be the emitter area of ​​diode DX. D6 EA is the emitter area of ​​diode D6. D7 EA is the emitter area of ​​diode D7. D8 EA is the emitter area of ​​diode D8. D9 EA is the emitter area of ​​diode D9. D10 EA is the emitter area of ​​diode D10; D11 EA is the emitter area of ​​diode D11; D12 EA is the emitter area of ​​diode D12; D13 Let be the emitter area of ​​diode D13.

[0009] Furthermore, the power-down protection module also includes MOSFET P3, diodes D0, D1, D2, D3, D15, D16, and resistors R0, R1, and R2. An external power supply outputs VCC to the positive terminal of diode D15 and the gate of MOSFET P3; the negative terminal of diode D15 is electrically connected to the source of MOSFET P3, one end of resistor R0, one end of resistor R1, and one end of resistor R2; the other end of resistor R0 is electrically connected to the negative terminal of diode D16. The other end of the resistor R1 is electrically connected to the gate of the protection MOSFET P1 and the positive terminal of the diode D1. The negative terminal of the diode D1 is electrically connected to the negative terminal of the diode D0. The positive terminal of the diode D0 is electrically connected to the input port of the bus switch module. The other end of the resistor R2 is electrically connected to the gate of the protection MOSFET P2 and the positive terminal of the diode D3. The negative terminal of the diode D3 is electrically connected to the negative terminal of the diode D2. The positive terminal of the diode D2 is electrically connected to the output port of the bus switch module. The positive terminal of diode D16 and the drain of MOSFET P3 are both grounded.

[0010] Furthermore, the following condition is satisfied: EA D0 =EA D1 =EA D2 =EA D3 ; EA D4 =EA D5 ; R1=R2; Among them, EA DX Let EA be the emitter area of ​​diode DX. D0 EA is the emitter area of ​​diode D0; D1 EA is the emitter area of ​​diode D1; D2 EA is the emitter area of ​​diode D2. D3 EA is the emitter area of ​​diode D3; D4 EA is the emitter area of ​​diode D4. D5 R1 is the emitter area of ​​diode D5; R2 is the resistance of resistor R1.

[0011] Furthermore, the following condition is satisfied: (W / L) P1 (W / L) P2 =1:1; Among them, (W / L) PY This represents the width-to-length ratio (W / L) of the MOSFET PY. P1 To protect the width-to-length ratio (W / L) of MOSFET P1. P2 To protect the width-to-length ratio of MOSFET P2.

[0012] Furthermore, the first control branch includes MOSFET P5, MOSFET P6, MOSFET N2 and MOSFET N3; The second control branch includes MOSFET P7 and MOSFET N4; The enabling module also includes MOSFET P4 and MOSFET N1; An external power supply outputs VCC to the source of MOSFET P4, the source of MOSFET P5, and the source of MOSFET P6. The negative terminal of the protection diode D14 is electrically connected to the source of MOSFET P7. An external enable signal OE is input to the gate of MOSFET P4 and the gate of MOSFET N1. The drain of MOS transistor P4 and the drain of MOS transistor N1 are both electrically connected to the gate of MOS transistor P5, the gate of MOS transistor N2, the gate of MOS transistor P7 and the gate of MOS transistor N4; the drain of said MOS transistor P5 and the drain of MOS transistor N2 are both electrically connected to the gate of MOS transistor P6 and the gate of MOS transistor N3, the drain of said MOS transistor P6 and the drain of MOS transistor N3 are both electrically connected to the first control terminal of the bus switch module; the drain of said MOS transistor P7 and the drain of MOS transistor N4 are both electrically connected to the second control terminal of the bus switch module; The source of said MOS transistor N1, the source of MOS transistor N2, the source of MOS transistor N3 and the source of MOS transistor N4 are all grounded.

[0013] After adopting the above technical solution, compared with the background art, the present utility model has the following advantages: When VCC is equal to 0, the bus switch module enters a high-impedance state and the channel is closed. At this time, the protection MOS transistor P1 is turned on, and by utilizing the unidirectional conduction characteristic of the diode, current is prevented from entering the power supply through the second control branch and the parasitic diode channel of the bus switch module, so as to prevent damage to the power supply; when the external power supply is in a normal power supply state, the external enable signal OE controls the bus switch module to enter the high-impedance state through the enable module, and the channel is closed. When the input voltage at the input port is greater than VCC and the difference between the two is less than the threshold voltage of the protection MOS transistor P1, the protection MOS transistor P1 is turned on at this time, but the protection diode D5 is provided at the output port, which prevents current from flowing out of the output port through the protection MOS transistor P2, ensures no leakage in the channel, and realizes leakage protection for the situation where the input voltage is greater than VCC. Description of Drawings

[0014] Figure 1 is a circuit diagram of the bus switch circuit with power-down protection according to the present utility model; Figure 2 is a test simulation diagram of the enable signal OE of the bus switch circuit with power-down protection according to the present utility model; Figure 3 is a power-down protection simulation diagram of the bus switch circuit with power-down protection according to the present utility model when VCC=0; Figure 4 is a power-down protection simulation diagram of the bus switch circuit with power-down protection according to the present utility model when 0 < VCC ≤ VCCmax. Detailed Description

[0015] To make the objectives, technical solutions, and advantages of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this utility model and are not intended to limit this utility model.

[0016] Additionally, it should be noted that the terms "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer" are all based on the orientation or positional relationship shown in the accompanying drawings. They are merely for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element of this utility model must have a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0017] When an element is referred to as being "fixed to," "set on," or "contained on" another element, it can be directly on or indirectly on that other element. When an element is referred to as being "connected to," it can be directly connected to or indirectly connected to that other element.

[0018] Unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances. Example

[0019] Please refer to Figure 1-4 As shown, this embodiment provides a bus switch circuit with power-down protection, including a bus switch module, an enable module, and a power-down protection module. The enable module includes a first control branch and a second control branch, which are respectively connected to the first control terminal and the second control terminal of the bus switch module.

[0020] The power-down protection module includes protection MOSFETs P1 and P2, and protection diodes D4, D5, D14, and D17. The sources of protection MOSFETs P1 and P2 are connected to the input and output ports of the bus switch module, respectively. The drains of protection MOSFETs P1 and P2 are electrically connected to the anodes of protection diodes D4 and D5, respectively. The cathodes of protection diodes D4 and D5 are connected and electrically connected to the output terminal of the second control branch.

[0021] An external power supply output VCC is connected to the gates of protection MOSFET P1 and P2, the power input terminal of the first control branch, and the anodes of protection diodes D14 and D17. The cathode of protection diode D14 is electrically connected to the power input terminal of the second control branch, and the cathode of protection diode D17 is electrically connected to the power input terminal of the bus switch module.

[0022] When VCC equals 0, the bus switch module enters a high-impedance state, and the channel is closed. At this time, the protection MOSFET P1 is turned on. Utilizing the unidirectional conduction characteristic of the diode, current is prevented from entering the power supply through the second control branch and the parasitic diode channel of the bus switch module, thus preventing damage to the power supply. When the external power supply is in normal operating condition, the external enable signal OE controls the bus switch module to enter a high-impedance state through the enable module, and the channel is closed. When the input voltage at the input port is greater than VCC, and the difference between the two is less than the threshold voltage of the protection MOSFET P1, i.e., VA-VCC... <V thp , where V thp To protect the threshold voltage of MOSFET P1, VA is the input voltage of the input port. At this time, the protection MOSFET P1 is turned on, but a protection diode D5 is set at the output port to prevent current from flowing out of the output port through the protection MOSFET P2, ensuring that there is no leakage current in the channel, and realizing leakage protection when the input voltage is greater than VCC.

[0023] Please refer to Figure 1 As shown, the bus switch module includes an ESD protection branch and a transmission gate branch. The first control branch and the second control branch are respectively connected to the first control terminal and the second control terminal of the transmission gate branch; the ESD protection branch is connected between the input port, the output port, the first control terminal, and the second control terminal of the transmission gate branch.

[0024] Specifically, the ESD protection branch includes diodes D6, D7, D8, D9, D10, D11, D12, and D13; the transmission gate branch includes MOSFETs P0 and N0, and resistors R3 and R4.

[0025] The sources of MOSFET P0 and MOSFET N0 are connected together and serve as the input port connected to the external environment. The drains of MOSFET P0 and MOSFET N0 are connected together and serve as the output port connected to the external environment. That is, in this embodiment, the attached... Figure 1Terminal A is the input port, and terminal B is the output port. Similarly, terminal B can also be an input port, and terminal A can also be an output port. The cathode of the protection diode D17 is electrically connected to the substrate of MOSFET P0, meaning the body potential of MOSFET P0 is reverse-biased and connected to VCC via the protection diode D17; the substrate of MOSFET N0 is grounded. The protection diode D17 ensures that current entering through the input port cannot enter the power supply through the parasitic diode channel between the source and body potential of MOSFET P0, thus protecting the external power supply.

[0026] The gate of MOSFET N0 is electrically connected to one end of resistor R3, the anode of diode D6, and the anode of diode D8. The other end of resistor R3 is electrically connected to the output terminal of the first control branch as the first control terminal. The cathode of diode D6 is electrically connected to the cathode of diode D7, and the anode of diode D7 is electrically connected to the source of MOSFET P0 and the source of MOSFET N0. The cathode of diode D8 is electrically connected to the cathode of diode D9, and the anode of diode D9 is electrically connected to the source of MOSFET P0 and the drain of MOSFET N0.

[0027] The gate of MOSFET P0 is electrically connected to one end of resistor R4, the anode of diode D11, and the anode of diode D13. The other end of resistor R4 serves as the second control terminal and is electrically connected to the output terminal of the second control branch. The cathode of diode D11 is electrically connected to the cathode of diode D10, and the anode of diode D10 is electrically connected to the source of MOSFET P0 and the source of MOSFET N0. The cathode of diode D13 is electrically connected to the cathode of diode D12, and the anode of diode D12 is electrically connected to the source of MOSFET P0 and the drain of MOSFET N0. The ESD protection branch absorbs instantaneous high-voltage signals between the input and output ports. MOSFETs P0 and N0 form a transmission gate as a bus switch; when both MOSFETs P0 and N0 are turned on simultaneously, the bus channel is opened.

[0028] Furthermore, the following condition is satisfied: EA D6 =EA D7 =EA D8 =EA D9 =EA D10 =EA D11 =EA D12 =EA D13 ; Among them, EA DX Let EA be the emitter area of ​​diode DX. D6 EA is the emitter area of ​​diode D6. D7 EA is the emitter area of ​​diode D7. D8 EA is the emitter area of ​​diode D8. D9EA is the emitter area of ​​diode D9. D10 EA is the emitter area of ​​diode D10; D11 EA is the emitter area of ​​diode D11; D12 EA is the emitter area of ​​diode D12. D13 Let be the emitter area of ​​diode D13.

[0029] Please refer to Figure 1 As shown, the power-down protection module also includes MOSFET P3, diodes D0, D1, D2, D3, D15, D16, and resistors R0, R1, and R2.

[0030] The external power supply outputs VCC to the positive terminal of diode D15 and the gate of MOSFET P3; the negative terminal of diode D15 is electrically connected to the source of MOSFET P3, one end of resistor R0, one end of resistor R1, and one end of resistor R2; the other end of resistor R0 is electrically connected to the negative terminal of diode D16.

[0031] The other end of resistor R1 is electrically connected to the gate of the protection MOSFET P1 and the positive terminal of diode D1. The negative terminal of diode D1 is electrically connected to the negative terminal of diode D0, and the positive terminal of diode D0 is electrically connected to the input port of the bus switch module; that is, the positive terminal of diode D0 is electrically connected to the source of MOSFET P0 and the source of MOSFET N0.

[0032] The other end of resistor R2 is electrically connected to the gate of the protection MOSFET P2 and the positive terminal of diode D3. The negative terminal of diode D3 is electrically connected to the negative terminal of diode D2, and the positive terminal of diode D2 is electrically connected to the output port of the bus switch module; that is, the positive terminal of diode D2 is electrically connected to the drain of MOSFET P0 and the drain of MOSFET N0.

[0033] The positive terminal of diode D16 and the drain of MOSFET P3 are both grounded.

[0034] Furthermore, the following condition is satisfied: EA D0 =EA D1 =EA D2 =EA D3 ; Furthermore, in this embodiment, EA D0 =EA D1 =EA D2 =EA D3 =EA D6 =EA D7 =EA D8 =EA D9 =EA D10 =EAD11 =EA D12 =EA D13 ; EA D4 =EA D5 ; R1=R2; Among them, EA DX Let EA be the emitter area of ​​diode DX. D0 EA is the emitter area of ​​diode D0; D1 EA is the emitter area of ​​diode D1; D2 EA is the emitter area of ​​diode D2. D3 EA is the emitter area of ​​diode D3; D4 EA is the emitter area of ​​diode D4. D5 R1 is the emitter area of ​​diode D5; R2 is the resistance of resistor R1.

[0035] Furthermore, the following condition is satisfied: (W / L) P1 (W / L) P2 =1:1; Among them, (W / L) PY This represents the width-to-length ratio (W / L) of the MOSFET PY. P1 To protect the width-to-length ratio (W / L) of MOSFET P1. P2 To protect the width-to-length ratio of MOSFET P2.

[0036] Please refer to Figure 1 As shown, the first control branch includes MOSFETs P5, P6, N2, and N3; the second control branch includes MOSFETs P7 and N4; and the enable module also includes MOSFETs P4 and N1.

[0037] External power supply output VCC is connected to the source of MOSFET P4, the source of MOSFET P5, and the source of MOSFET P6. The negative terminal of protection diode D14 is electrically connected to the source of MOSFET P7. External enable signal OE is input to the gate of MOSFET P4 and the gate of MOSFET N1.

[0038] The drains of MOSFET P4 and N1 are electrically connected to the gates of MOSFETs P5, N2, P7, and N4. The drains of MOSFET P5 and N2 are electrically connected to the gates of MOSFETs P6 and N3. The drains of MOSFETs P6 and N3 are electrically connected to the first control terminal of the bus switch module, meaning they are both electrically connected to the other end of resistor R3. The drains of MOSFETs P7 and N4 are electrically connected to the second control terminal of the bus switch module, meaning they are both electrically connected to the other end of resistor R4.

[0039] The sources of MOSFETs N1, N2, N3, and N4 are all grounded.

[0040] When the external enable signal OE is low, the drains of MOSFETs P6 and N3 output a high level, while the drains of MOSFETs P7 and N4 output a low level, driving MOSFETs P0 and N0 to conduct simultaneously, thus enabling the bus. When the external enable signal OE is high, the drains of MOSFETs P6 and N3 output a low level, while the drains of MOSFETs P7 and N4 output a high level, driving MOSFETs P0 and N0 to turn off simultaneously, and the bus channel enters a high-impedance state.

[0041] In this embodiment, port A is the input port, port B is the output port, the input voltage at port A is VA, and the current flowing through the protection diode D4 is I. D ; but ; Among them, I S V is the reverse saturation current of the diode. D V is the voltage applied across the diode, n is the emission coefficient, and V T This is thermal voltage.

[0042] Due to V D Much greater than V T Therefore, it can be simplified to, ; Therefore, ; When the protection MOSFET P1 is turned on, the drain-source voltage difference V across the protection MOSFET P1 is... DS The protection MOSFET P1 is extremely small, and can be considered to be operating in the deep transistor region. In this case, the protection MOSFET P1 can be protected by a linear resistor R.on This indicates that... ; Where μ p C represents the hole mobility of the PMOS transistor. ox For PMOS gate oxide capacitance, (W / L) P1 To protect the aspect ratio of MOSFET P1, V GSP1 To protect the gate voltage of MOSFET P1, V thp This is the threshold voltage of the PMOS transistor.

[0043] Therefore, the drain-source voltage difference V across the protection MOSFET P1 can be obtained. DSP1 for, ; Since the current flowing through the gate of MOSFET P0 is much smaller than the current flowing through the protection MOSFET P1, the voltage drop across R4 can be ignored. The gate-source voltage difference V of the protection MOSFET P1 is... GSP1 It can be represented as, ; Where VA is the input voltage at port A, which is turned off when the protection MOSFET P1 is powered off, and V... GSP1 >V thp In other words, the following conditions must be met to trigger the power-down protection of port A: ; Similarly, when port B is the input port and port A is the output port, the following conditions must be met to trigger the power-down protection of port B: ; Where μ p C represents the hole mobility of the PMOS transistor. OX For PMOS gate oxide capacitance, (W / L) P2 To protect the width-to-length ratio of MOSFET P2, VB is the input voltage at port B. thp This is the threshold voltage of the PMOS transistor.

[0044] Please refer to the appendix. Figure 2 , attached Figure 2 Simulation diagram for enabling signal OE test; simulation conditions: power supply voltage VCC 3.6V. (See attached diagram) Figure 2 It can be seen that when the enable signal OE is low, the channel is in the open state, and signals at terminals A and B can be transmitted normally. When the enable signal OE is 3.6V, the channel is in the closed state, and signals at terminals A and B cannot be transmitted to each other.

[0045] Please refer to the appendix. Figure 3 , attached Figure 3is a power-down protection simulation diagram when VCC=0; the simulation condition is that the power supply voltage VCC is 0V. From the attached Figure 3 , it can be seen that when the enable signal OE inputs 0V, the channel is in an open state, the A terminal inputs a 3.6V high level, and both the channel current and the power supply current are equal to 0A. That is, when VCC is equal to 0, the protection diode D17 and the protection diode D14 protect the power supply at this time, no current flows into the power supply, and the power supply is not damaged. And no current passes through the channel, and the power-down protection is triggered normally.

[0046] Please refer to the attached Figure 4 , the attached Figure 4 is a power-down protection simulation diagram when 0 < VCC ≤ VCCmax; the simulation condition is that the power supply voltage VCC is 3.6V. From the attached Figure 4 , it can be seen that the enable signal OOE inputs a 3.6V high level, and the channel is in a closed state. And VA > VCC, the channel current is approximately equal to 0A. That is, under the normal working condition of the circuit, that is, when 0 < VCC ≤ VCCmax, and the enable signal OE inputs a high level at the same time, the bus channel enters a high-impedance state. Even if VA > VCC, the power-down protection is still triggered, so that no current passes through the bus.

[0047] The above description is only the preferred specific implementation of the present utility model, and the protection scope of the present utility model is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present utility model, which shall be covered within the protection scope of the present utility model. Therefore, the protection scope of the present utility model shall be subject to the protection scope of the claims.

Claims

1. A bus switch circuit with power-down protection, characterized in that, Includes a bus switch module, an enable module, and a power-down protection module; The enabling module includes a first control branch and a second control branch, which are respectively connected to the first control terminal and the second control terminal of the bus switch module. The power-down protection module includes protection MOSFETs P1 and P2, and protection diodes D4, D5, D14, and D17. The sources of protection MOSFETs P1 and P2 are connected to the input and output ports of the bus switch module, respectively. The drains of protection MOSFETs P1 and P2 are electrically connected to the anodes of protection diodes D4 and D5, respectively. The cathodes of protection diodes D4 and D5 are connected and electrically connected to the output terminal of the second control branch. An external power supply outputs VCC to the gate of protection MOSFET P1, the gate of protection MOSFET P2, the power input terminal of the first control branch, and the positive terminals of protection diodes D14 and D17; the negative terminal of protection diode D14 is electrically connected to the power input terminal of the second control branch, and the negative terminal of protection diode D17 is electrically connected to the power input terminal of the bus switch module.

2. The bus switch circuit with power-down protection according to claim 1, characterized in that: The bus switch module includes an ESD protection branch and a transmission gate branch; The first control branch and the second control branch are respectively connected to the first control terminal and the second control terminal of the transmission gate branch; the ESD protection branch is connected between the input port, the output port, the first control terminal and the second control terminal of the transmission gate branch.

3. The bus switch circuit with power-down protection according to claim 2, characterized in that: The ESD protection branch includes diodes D6, D7, D8, D9, D10, D11, D12, and D13; The transmission gate branch includes MOS transistors P0 and N0, and resistors R3 and R4; The source of MOSFET P0 and the source of MOSFET N0 are connected together and are connected to the outside as an input port. The drain of MOSFET P0 and the drain of MOSFET N0 are connected together and are connected to the outside as an output port. The negative terminal of the protection diode D17 is electrically connected to the substrate of MOSFET P0, and the substrate of MOSFET N0 is grounded. The gate of MOSFET N0 is electrically connected to one end of resistor R3, the anode of diode D6, and the anode of diode D8. The other end of resistor R3 is electrically connected to the output terminal of the first control branch as the first control terminal. The cathode of diode D6 is electrically connected to the cathode of diode D7, and the anode of diode D7 is electrically connected to the source of MOSFET P0 and the source of MOSFET N0. The cathode of diode D8 is electrically connected to the cathode of diode D9, and the anode of diode D9 is electrically connected to the source of MOSFET P0 and the drain of MOSFET N0. The gate of the MOSFET P0 is electrically connected to one end of the resistor R4, the anode of diode D11, and the anode of diode D13. The other end of the resistor R4 is electrically connected to the output terminal of the second control branch as the second control terminal. The cathode of diode D11 is electrically connected to the cathode of diode D10, and the anode of diode D10 is electrically connected to the source of MOSFET P0 and the source of MOSFET N0. The cathode of diode D13 is electrically connected to the cathode of diode D12, and the anode of diode D12 is electrically connected to the source of MOSFET P0 and the drain of MOSFET N0.

4. The bus switch circuit with power-down protection according to claim 3, characterized in that: The following conditions must be met. YES D6 =EA D7 =EA D8 =EA D9 =EA D10 =EA D11 =EA D12 =EA D13 ; Among them, EA DX Let EA be the emitter area of ​​diode DX. D6 EA is the emitter area of ​​diode D6. D7 EA is the emitter area of ​​diode D7. D8 EA is the emitter area of ​​diode D8. D9 EA is the emitter area of ​​diode D9. D10 EA is the emitter area of ​​diode D10; D11 EA is the emitter area of ​​diode D11; D12 EA is the emitter area of ​​diode D12. D13 Let be the emitter area of ​​diode D13.

5. The bus switch circuit with power-down protection according to claim 1, characterized in that: The power-down protection module also includes MOSFET P3, diodes D0, D1, D2, D3, D15, D16 and resistors R0, R1, and R2. An external power supply outputs VCC to the positive terminal of diode D15 and the gate of MOSFET P3; the negative terminal of diode D15 is electrically connected to the source of MOSFET P3, one end of resistor R0, one end of resistor R1, and one end of resistor R2; the other end of resistor R0 is electrically connected to the negative terminal of diode D16. The other end of the resistor R1 is electrically connected to the gate of the protection MOSFET P1 and the positive terminal of the diode D1. The negative terminal of the diode D1 is electrically connected to the negative terminal of the diode D0. The positive terminal of the diode D0 is electrically connected to the input port of the bus switch module. The other end of the resistor R2 is electrically connected to the gate of the protection MOSFET P2 and the positive terminal of the diode D3. The negative terminal of the diode D3 is electrically connected to the negative terminal of the diode D2. The positive terminal of the diode D2 is electrically connected to the output port of the bus switch module. The positive terminal of diode D16 and the drain of MOSFET P3 are both grounded.

6. The bus switch circuit with power-down protection according to claim 5, characterized in that: The following conditions must be met. YES D0 =EA D1 =EA D2 =EA D3 ; YES D4 =EA D5 ; R1=R2; Among them, EA DX Let EA be the emitter area of ​​diode DX. D0 EA is the emitter area of ​​diode D0; D1 EA is the emitter area of ​​diode D1; D2 EA is the emitter area of ​​diode D2. D3 EA is the emitter area of ​​diode D3; D4 EA is the emitter area of ​​diode D4. D5 R1 is the emitter area of ​​diode D5; R2 is the resistance of resistor R1.

7. The bus switch circuit with power-down protection according to claim 1, characterized in that: The following conditions must be met. (W / L) P1 :(W / L) P2 =1:1; Among them, (W / L) PY This represents the width-to-length ratio (W / L) of the MOSFET PY. P1 To protect the width-to-length ratio (W / L) of MOSFET P1. P2 To protect the width-to-length ratio of MOSFET P2.

8. The bus switch circuit with power-down protection according to claim 1, characterized in that: The first control branch includes MOSFET P5, MOSFET P6, MOSFET N2 and MOSFET N3; The second control branch includes MOSFET P7 and MOSFET N4; The enabling module also includes MOSFET P4 and MOSFET N1; An external power supply outputs VCC to the source of MOSFET P4, the source of MOSFET P5, and the source of MOSFET P6. The negative terminal of the protection diode D14 is electrically connected to the source of MOSFET P7. An external enable signal OE is input to the gate of MOSFET P4 and the gate of MOSFET N1. The drains of MOSFET P4 and N1 are electrically connected to the gates of MOSFET P5, N2, P7, and N4; the drains of MOSFET P5 and N2 are electrically connected to the gates of MOSFET P6 and N3; the drains of MOSFET P6 and N3 are electrically connected to the first control terminal of the bus switch module; and the drains of MOSFET P7 and N4 are electrically connected to the second control terminal of the bus switch module. The sources of MOS transistors N1, N2, N3, and N4 are all grounded.

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