Switching regulator

CN224732350UActive Publication Date: 2026-09-08SHENZHEN ABA SEMICONDUCTOR DESIGN CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202522178119.4
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-10-15
Publication Date
2026-09-08
Estimated Expiration
2035-10-15

AI Technical Summary

Technical Problem

[0002]现有开关稳压器在实际应用中,在输入电压适应范围、输出参数配置灵活性、开关频率可调节性、辅助供电模块性能、保护与启动特性等方面,尚难以完全匹配上述电子元件在不同场景下的供电需求,对电子系统的整体工作可靠性造成一定影响

Benefits of technology

[0003] The present invention aims to solve, to at least some extent, the technical problems in the above-mentioned technologies.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN224732350U_ABST
    Figure CN224732350U_ABST
Patent Text Reader

Abstract

This utility model discloses a switching regulator, comprising: a first transistor whose emitter is connected to a power supply; a gate driver whose one end is connected to the gate of the first transistor; a flip-flop whose Q terminal is connected to one end of the gate driver and whose D terminal is connected to a high-level signal; an AND gate whose output terminal is connected to the R terminal of the flip-flop; a current sensor whose one end is connected to the collector of the first transistor; a current limiter whose two ends are respectively connected to one end of the current sensor and the input terminal of the AND gate; a ramp generator whose one end is connected to one end of the current sensor; a first operational amplifier whose output terminal is connected to the other input terminal of the AND gate and whose non-inverting input terminal is connected to the connection node of the current sensor and the ramp generator; a second operational amplifier whose output terminal is connected to the inverting input terminal of the first operational amplifier and whose non-inverting input terminal is connected to one end of the ramp generator; and an oscillator whose one end is respectively connected to one end of the ramp generator and the CK terminal of the flip-flop.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This utility model relates to the field of power electronics technology, specifically to a switching regulator. Background Technology

[0002] In practical applications, existing switching regulators are still insufficient to fully match the power supply requirements of the aforementioned electronic components in different scenarios in terms of input voltage range, output parameter configuration flexibility, switching frequency adjustability, auxiliary power supply module performance, protection and startup characteristics, which has a certain impact on the overall reliability of the electronic system. Utility Model Content

[0003] The present invention aims to solve, to at least some extent, the technical problems in the above-mentioned technologies.

[0004] Therefore, this utility model discloses a switching regulator, characterized in that it includes:

[0005] The first transistor has its emitter connected to the power supply;

[0006] A gate driver, the output of which is connected to the gate of the first transistor;

[0007] A flip-flop, the Q terminal of which is connected to the input terminal of the gate driver, and the D terminal of which is connected to a high-level signal;

[0008] An AND gate, the output of which is connected to the R terminal of the flip-flop;

[0009] A current sensor, one end of which is connected to the collector of the first transistor;

[0010] A current limiter, the two ends of which are respectively connected to one end of the current sensor and the input of the AND gate;

[0011] A ramp generator, one end of which is connected to one end of the current sensor;

[0012] The first operational amplifier has its output terminal connected to the other input terminal of the AND gate, and its non-inverting input terminal connected to the connection node of the current sensor and the ramp generator.

[0013] The second operational amplifier has its output terminal connected to the inverting input terminal of the first operational amplifier, and its non-inverting input terminal connected to one end of the ramp generator.

[0014] An oscillator, one end of which is connected to one end of the ramp generator and the CK terminal of the trigger.

[0015] The switching regulator disclosed in this utility model has the advantages of being able to be adjusted according to the needs of electronic components to adapt to the output conditions under different application scenarios, having a certain degree of flexibility in adjusting the switching frequency, having a more reliable current limiting function to provide effective protection when the current is abnormal, and supporting a soft-start function to avoid the impact during the startup process and to protect the load and the regulator.

[0016] In addition, the switching regulator disclosed in this utility model may also have the following additional technical features:

[0017] In one embodiment of this utility model, it further includes:

[0018] The first diode has its cathode connected to the collector of the first transistor and the connection node of the current sensor, and its anode grounded.

[0019] An inductor, one end of which is connected to the cathode of the first diode;

[0020] The first resistor has one end connected to the connection node between the current sensor and the ramp generator, and the other end grounded.

[0021] The second resistor has one end connected to one end of the oscillator and the other end grounded.

[0022] The third resistor has one end connected to the other end of the inductor and the other end grounded.

[0023] The fourth resistor has one end connected to the output terminal of the second operational amplifier;

[0024] The fifth resistor has one end connected to the connection node of the third resistor and the inductor, and the other end connected to the inverting input terminal of the second operational amplifier.

[0025] The sixth resistor has one end connected to the connection node of the fifth resistor and the second operational amplifier, and the other end grounded.

[0026] The first capacitor has one end connected to the connection node of the inductor and the third resistor, and the other end grounded.

[0027] The second capacitor has one end connected to the connection node between the first operational amplifier and the second operational amplifier, and the other end grounded.

[0028] The third capacitor has one end connected to the other end of the fourth resistor, and the other end is grounded.

[0029] In one embodiment of this utility model, it further includes:

[0030] The second transistor has its emitter grounded and its gate connected to one end of the current sensor.

[0031] The third transistor has its gate connected to the collector of the second transistor, its emitter grounded, and its collector connected to one end of the current sensor.

[0032] The third operational amplifier has its output terminal connected to the collector of the second transistor and the gate of the third transistor, respectively, and its non-inverting input terminal connected to the connection node of the current sensor and the third transistor.

[0033] A fast-start circuit is connected to the inverting input of the third operational amplifier.

[0034] In one embodiment of this utility model, it further includes:

[0035] The seventh resistor has one end connected to the output terminal of the third operational amplifier;

[0036] The fourth capacitor is connected at both ends to the other end of the seventh resistor and the non-inverting input of the third operational amplifier, respectively.

[0037] In one embodiment of this utility model, it further includes:

[0038] The eighth resistor has one end connected to the fast-start circuit;

[0039] The fifth capacitor has its two ends connected to the fast start circuit and ground, respectively.

[0040] The sixth capacitor has its two ends connected to the other end of the eighth resistor and ground, respectively.

[0041] Additional features and advantages of this invention will be set forth in the description which follows, or may be learned by practicing this invention. Attached Figure Description

[0042] The technical solution and beneficial effects of this utility model will become apparent and readily understood from the following description in conjunction with the accompanying drawings, wherein:

[0043] Figure 1 This is a circuit diagram of the switching regulator of this utility model;

[0044] Figure 2 This is another circuit diagram of the switching regulator of this utility model. Detailed Implementation

[0045] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present utility model. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments.

[0046] The switching regulator disclosed in this utility model will now be described with reference to the accompanying drawings.

[0047] like Figure 1 and Figure 2 As shown, the switching regulator includes:

[0048] The first transistor M1 has its emitter connected to the power supply Vin;

[0049] The gate driver has its output connected to the gate of the first transistor M1;

[0050] The flip-flop FF has its Q terminal connected to the input of the gate driver, and its D terminal connected to a high-level signal.

[0051] An AND gate is connected to the R terminal of a flip-flop FF;

[0052] A current sensor, one end of which is connected to the collector of the first transistor M1;

[0053] The current limiter is connected to one end of the current sensor and the input of the AND gate, respectively.

[0054] A ramp generator, one end of which is connected to one end of a current sensor;

[0055] The first operational amplifier OA1 has its output connected to the other input of the AND gate, and its non-inverting input is connected to the connection node of the current sensor and the ramp generator.

[0056] The second operational amplifier OA2 has its output terminal connected to the inverting input terminal of the first operational amplifier OA1, and its non-inverting input terminal connected to one end of the ramp generator.

[0057] The oscillator is connected at one end to both the ramp generator and the CK terminal of the flip-flop FF.

[0058] The cathode of the first diode D1 is connected to the collector of the first transistor M1 and the connection node of the current sensor, while its anode is grounded.

[0059] Inductor L1, one end of which is connected to the cathode of the first diode D1;

[0060] The first resistor R1 has one end connected to the connection node of the current sensor and the ramp generator, and the other end grounded.

[0061] The second resistor R2 has one end connected to one end of the oscillator and the other end grounded.

[0062] The third resistor R3 has one end connected to the other end of the inductor L1, and the other end is grounded.

[0063] The fourth resistor R4 is connected at one end to the output terminal of the second operational amplifier OA2;

[0064] The fifth resistor R5 has one end connected to the connection point of the third resistor R3 and the inductor L1, and the other end connected to the inverting input of the second operational amplifier OA2.

[0065] The sixth resistor R6 has one end connected to the connection node of the fifth resistor R5 and the second operational amplifier OA2, and the other end grounded.

[0066] The first capacitor C1 has one end connected to the connection point of the inductor L1 and the third resistor R3, and the other end grounded.

[0067] The second capacitor C2 has one end connected to the connection node of the first operational amplifier OA1 and the second operational amplifier OA2, and the other end grounded.

[0068] The third capacitor C3 has one end connected to the other end of the fourth resistor R4, and the other end is grounded.

[0069] The second transistor M2 has its emitter grounded and its gate connected to one end of the current sensor.

[0070] The gate of the third transistor M3 is connected to the collector of the second transistor M2, its emitter is grounded, and its collector is connected to one end of the current sensor.

[0071] The third operational amplifier OA3 has its output terminal connected to the collector of the second transistor M2 and the gate of the third transistor M3, respectively, and its non-inverting input terminal connected to the connection node of the current sensor and the third transistor M3.

[0072] The fast start circuit is connected to the inverting input of the third operational amplifier OA3.

[0073] The seventh resistor R7 is connected at one end to the output of the third operational amplifier OA3;

[0074] The fourth capacitor C4 is connected to the other end of the seventh resistor R7 and the non-inverting input of the third operational amplifier OA3, respectively.

[0075] The eighth resistor R8 is connected at one end to the fast start circuit Fase Start;

[0076] The fifth capacitor C5 has its two ends connected to the Fast Start circuit and ground, respectively.

[0077] The sixth capacitor C6 has its two ends connected to the other end of the eighth resistor R8 and the ground, respectively.

[0078] Specifically, the first transistor M1 serves as the main switching element. The gate driver amplifies the signal of the trigger FF and outputs a signal that meets the driving requirements of the first transistor M1, ensuring that the first transistor M1 switches reliably.

[0079] After the CK terminal of the flip-flop receives the synchronous clock signal of the oscillator, it will output a stable high level from the Q terminal according to the high level signal of the D terminal. The Q terminal will only output a low level when the R terminal receives the reset signal of the AND gate.

[0080] The AND gate will only output a signal to the flip-flop R terminal and trigger the first transistor M1 when both input terminals are simultaneously input with valid signals.

[0081] The oscillator outputs a fixed frequency clock signal, which serves two purposes: firstly, to provide a clock for the synchronous switching of the flip-flop (FF), and secondly, to provide a synchronization signal for the ramp generator, thus preventing output voltage fluctuations due to timing disorder.

[0082] The current sensor monitors the current at the collector of the first transistor M1 in real time and converts the current signal into an electrical signal that can be recognized by subsequent circuits, which is then passed to the current limiter and the ramp generator.

[0083] After receiving the current signal from the current sensor, the current limiter compares it with the internally preset current threshold. If the current does not exceed the limit, it outputs an invalid signal to the AND gate. If the current exceeds the limit, it outputs an valid signal to the AND gate, triggering the AND gate to send a reset signal to the flip-flop FF, turning off the first transistor M1, thus achieving overcurrent protection.

[0084] The ramp generator is connected to a current sensor at one end and to a first operational amplifier OA1 and a second operational amplifier OA2 at the other end. It generates a reference ramp signal and, after receiving the synchronization signal from the oscillator, outputs a periodic ramp electrical signal. This signal, combined with the current signal from the current sensor, can optimize the transient characteristics of the switch control.

[0085] The first operational amplifier OA1 combines the current signal and the ramp signal at the non-inverting input into a combined signal, which is then compared with the voltage reference signal output by the second operational amplifier OA2 at the inverting input. If the combined signal meets the voltage regulation requirements, an invalid signal is output to the AND gate Add Gate. If the combined signal deviates from the voltage regulation requirements, an valid signal is output to the AND gate Add Gate to participate in triggering the reset and adjusting the switching state of the first transistor M1.

[0086] The second operational amplifier OA2 receives the reference signal from the ramp generator and compares it with the voltage feedback signal at the output end to generate a stable voltage reference comparison signal, which is then transmitted to the first operational amplifier OA1 to ensure that the comparison reference of the first operational amplifier OA1 always matches the output voltage requirement.

[0087] The second transistor M2 and the third transistor M3 together form an auxiliary current monitoring circuit. The second transistor M2 receives the current signal from the current sensor. When the main circuit current changes, its conduction level will change accordingly, thereby changing the gate voltage of the third transistor M3. The third transistor M3 further refines the accuracy of the current sensor output signal by changing its own conduction state, providing a more accurate current feedback signal for the third operational amplifier M3.

[0088] The third operational amplifier OA3 compares the precise current signal at the non-inverting input with the reference signal of the fast-start circuit at the inverting input. If the current signal deviates from the reference, the output adjustment signal changes the conduction state of the second transistor M2 and the third transistor M3, thereby correcting the output signal of the current sensor, so that the main circuit current is always close to the target value, thus improving the current control accuracy.

[0089] In summary, the switching regulator disclosed in this utility model has the advantages of being able to be adjusted according to the needs of electronic components to adapt to the output conditions under different application scenarios, having a certain degree of flexibility in adjusting the switching frequency, having a more reliable current limiting function to provide effective protection in case of abnormal current, and supporting soft-start function to avoid impact during startup and protect the load and regulator.

[0090] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A switching regulator, characterized in that, include: The first transistor has its emitter connected to the power supply; A gate driver, the output of which is connected to the gate of the first transistor; A flip-flop, the Q terminal of which is connected to the input terminal of the gate driver, and the D terminal of which is connected to a high-level signal; An AND gate, the output of which is connected to the R terminal of the flip-flop; A current sensor, one end of which is connected to the collector of the first transistor; A current limiter, the two ends of which are respectively connected to one end of the current sensor and the input of the AND gate; A ramp generator, one end of which is connected to one end of the current sensor; The first operational amplifier has its output terminal connected to the other input terminal of the AND gate, and its non-inverting input terminal connected to the connection node of the current sensor and the ramp generator. The second operational amplifier has its output terminal connected to the inverting input terminal of the first operational amplifier, and its non-inverting input terminal connected to one end of the ramp generator. An oscillator, one end of which is connected to one end of the ramp generator and the CK terminal of the trigger.

2. The switching regulator as described in claim 1, characterized in that, Also includes: The first diode has its cathode connected to the collector of the first transistor and the connection node of the current sensor, and its anode grounded. An inductor, one end of which is connected to the cathode of the first diode; The first resistor has one end connected to the connection node between the current sensor and the ramp generator, and the other end grounded. The second resistor has one end connected to one end of the oscillator and the other end grounded. The third resistor has one end connected to the other end of the inductor and the other end grounded. The fourth resistor has one end connected to the output terminal of the second operational amplifier; The fifth resistor has one end connected to the connection node of the third resistor and the inductor, and the other end connected to the inverting input terminal of the second operational amplifier. The sixth resistor has one end connected to the connection node of the fifth resistor and the second operational amplifier, and the other end grounded. The first capacitor has one end connected to the connection node of the inductor and the third resistor, and the other end grounded. The second capacitor has one end connected to the connection node between the first operational amplifier and the second operational amplifier, and the other end grounded. The third capacitor has one end connected to the other end of the fourth resistor, and the other end is grounded.

3. The switching regulator as described in claim 2, characterized in that, Also includes: The second transistor has its emitter grounded and its gate connected to one end of the current sensor. The third transistor has its gate connected to the collector of the second transistor, its emitter grounded, and its collector connected to one end of the current sensor. The third operational amplifier has its output terminal connected to the collector of the second transistor and the gate of the third transistor, respectively, and its non-inverting input terminal connected to the connection node of the current sensor and the third transistor. A fast-start circuit is connected to the inverting input of the third operational amplifier.

4. The switching regulator as described in claim 3, characterized in that, Also includes: The seventh resistor has one end connected to the output terminal of the third operational amplifier; The fourth capacitor is connected at both ends to the other end of the seventh resistor and the non-inverting input of the third operational amplifier, respectively.

5. The switching regulator as described in claim 4, characterized in that, Also includes: The eighth resistor has one end connected to the fast-start circuit; The fifth capacitor has its two ends connected to the fast start circuit and ground, respectively. The sixth capacitor has its two ends connected to the other end of the eighth resistor and ground, respectively.