A control circuit for a low-power power switch

Abstract

This utility model relates to the field of power switch control circuit technology, specifically to a control circuit for a low-power power switch, applied in portable electronic devices. It includes a power input terminal, a MOS switch circuit, a logic inverting circuit, an RC filter circuit, a signal conversion circuit, a delayed conduction circuit for suppressing transient high voltage, a main control circuit, and a power amplifier circuit. Through the collaborative innovative design of the MOS switch circuit, logic inverting circuit, RC filter circuit, signal conversion circuit, and delayed conduction circuit, it not only solves the problems of high static power consumption, weak anti-interference ability, lack of soft-start mechanism, and inconvenient maintenance of traditional power switches, but also achieves comprehensive optimization in battery life, system stability, production convenience, and cost control, providing a high-performance, highly reliable, and low-cost power switch for portable electronic devices.

Description

Technical Field

[0001] This utility model relates to the field of power switch control circuit technology, specifically to a control circuit for a low-power power switch. Background Technology

[0002] With the widespread use of portable electronic devices (such as wearable devices, mobile terminals, and IoT nodes), the performance requirements for power management circuits are becoming increasingly stringent, especially in terms of low power consumption, high reliability, and miniaturization. As the core component of system power-on control, the design of the power switch directly affects the overall energy efficiency and stability of the device.

[0003] Traditional power switching solutions mainly include mechanical switches, relays, and electronic switches based on discrete MOSFETs. While mechanical switches and relays offer excellent turn-off characteristics and high reliability, they suffer from drawbacks such as large size, limited mechanical lifespan, and slow response speed, making it difficult to meet the miniaturization and long lifespan requirements of modern portable devices. Although MOSFET-based electronic switches offer advantages such as small size, high speed, and low on-resistance, they still face significant challenges in practical applications.

[0004] Firstly, regarding static power consumption, most MOSFET switches rely on continuous control signals (such as high levels) to maintain their on or off states, resulting in static current consumption in the control circuit even when the device is in standby or off mode. Although this leakage current is small, its long-term accumulation in battery-powered scenarios will significantly shorten battery life and affect user experience.

[0005] Secondly, in terms of anti-interference capability, if the switching circuit constructed with discrete MOSFETs lacks a reasonable gate bias design (such as not configuring reliable pull-up or pull-down resistors), its high-impedance gate is extremely susceptible to external electromagnetic interference (EMI). Especially in radio frequency environments or high-noise power supply systems, it may cause false triggering or false turn-on, resulting in abnormal load power-up or power supply short circuit, which seriously threatens the reliability of the system.

[0006] Furthermore, there is a design conflict between switching dynamic performance and system reliability. To achieve rapid power-on, the RC soft-start circuit is often omitted, causing the MOSFET to be fully turned on instantaneously, generating a large inrush current that may damage downstream sensitive devices or cause a voltage drop. While introducing a dedicated power management IC (such as a load switch IC) to implement soft-start and overcurrent protection can improve performance, it significantly increases system cost and PCB footprint, hindering its adoption in cost-sensitive products. At the same time, existing solutions generally lack hardware-level bypass mechanisms. When control logic fails or system debugging is required, it is not easy to bypass the switching circuit; often, temporary paths must be established through flying wires or PCB redesign, greatly increasing the complexity of maintenance and testing. Utility Model Content

[0007] To address the shortcomings and deficiencies of existing technologies, this invention provides a control circuit for a low-power power switch with a simple circuit structure.

[0008] To achieve the above objectives, the present invention provides a low-power power switch control circuit for use in portable electronic devices. The circuit includes a power input terminal, a power output terminal, a MOS switch circuit, a logic inverting circuit, an RC filter circuit, a signal conversion circuit, a delay-on circuit for suppressing transient high voltage, a main control circuit, and a power amplifier circuit. One end of the MOS switch circuit is electrically connected to the power input terminal, and the other end is electrically connected to the delay-on circuit, the RC filter circuit, and the power output terminal. One end of the signal conversion circuit is electrically connected to the RC filter circuit, and the other end is electrically connected to the power amplifier circuit. One end of the logic inverting circuit is electrically connected to the RC filter circuit, and the other end is electrically connected to the delay-on circuit. The signal conversion circuit is electrically connected to the delay-on circuit, the main control circuit, and the logic inverting circuit.

[0009] Furthermore, the MOS switching circuit includes a first resistor and a P-channel MOS transistor; one end of the first resistor is electrically connected to the drain of the P-channel MOS transistor, and the other end is electrically connected to the RC filter circuit; a 3.3V input power supply voltage is connected to the RC filter circuit, the drain of the P-channel MOS transistor is electrically connected to the power supply output terminal; the gate of the P-channel MOS transistor is electrically connected to the logic inverting circuit, and the source of the P-channel MOS transistor is electrically connected to the common terminal of the first resistor and the RC filter circuit.

[0010] Furthermore, the RC filter circuit includes a pull-up resistor and a first capacitor; one end of the first capacitor is electrically connected to the common terminal of the logic inverting circuit and the gate of the P-channel MOS transistor, and the other end is electrically connected to the source of the P-channel MOS transistor; one end of the pull-up resistor is electrically connected to the common terminal of the first resistor and the source of the P-channel MOS transistor, and the other end is electrically connected to the logic inverting circuit.

[0011] Furthermore, the logic inverting circuit includes a transistor, a second resistor, a third resistor, and a fourth resistor; one end of the second resistor is electrically connected to the gate of the P-channel MOS transistor, and the other end is electrically connected to the common terminal of the collector of the transistor and the pull-up resistor; one end of the third resistor is electrically connected to the base of the transistor, and the other end is electrically connected to the main control circuit; one end of the fourth resistor is electrically connected to the base of the transistor, and the other end is electrically connected to the emitter of the transistor; the emitter of the transistor is grounded.

[0012] Further; the signal conversion circuit includes a digital-to-analog converter, a fifth resistor, a sixth resistor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, and a seventh capacitor; one end of the second capacitor is grounded, and the other end is electrically connected to the first pin of the digital-to-analog converter; the second, third, and fourth pins of the digital-to-analog converter are all electrically connected to the main control circuit; one end of the third capacitor is grounded, and the other end is electrically connected to the fifth pin of the digital-to-analog converter; one end of the fourth capacitor is grounded, and the other end is electrically connected to the tenth pin of the digital-to-analog converter; the ninth pin of the digital-to-analog converter is grounded; one end of the fifth capacitor is grounded, and the other end is electrically connected to the sixth pin of the digital-to-analog converter; One end of the fifth resistor is electrically connected to the power amplifier circuit, and the other end is electrically connected to the eighth pin of the digital-to-analog converter; one end of the sixth resistor is electrically connected to the power amplifier circuit, and the other end is electrically connected to the seventh pin of the digital-to-analog converter; one end of the sixth capacitor is grounded, and the other end is electrically connected to the sixth resistor; one end of the seventh capacitor is grounded, and the other end is electrically connected to the power amplifier circuit and the eighth pin of the digital-to-analog converter; one end of the sixth resistor is electrically connected to the power amplifier circuit, and the other end is electrically connected to the seventh pin of the digital-to-analog converter; one end of the sixth capacitor is grounded, and the other end is electrically connected to the sixth resistor; one end of the seventh capacitor is grounded, and the other end is electrically connected to the fifth resistor.

[0013] Furthermore, the control circuit of the low-power power switch also includes a voltage regulator capacitor; one end of the voltage regulator capacitor is grounded, and the other end is electrically connected to the drain of the P-channel MOSFET.

[0014] The beneficial effects of this utility model are:

[0015] This utility model provides a control circuit for a low-power power switch. Through the collaborative innovative design of a MOS switching circuit, a logic inverting circuit, an RC filtering circuit, a signal conversion circuit, and a delayed conduction circuit, this application not only solves the problems of high static power consumption, weak anti-interference ability, lack of soft start mechanism, and inconvenient maintenance of traditional power switches, but also achieves comprehensive optimization in terms of battery life, system stability, production convenience, and cost control, providing a high-performance, high-reliability, and low-cost power switch for portable electronic devices. Attached Figure Description

[0016] Figure 1 This is a block diagram illustrating the working principle of a control circuit for a low-power power switch according to this utility model.

[0017] Figure 2 This is a circuit diagram of a control circuit for a low-power power switch according to the present invention.

[0018] Figure 3 This is a circuit diagram of the signal conversion circuit in the control circuit of a low-power power switch according to this utility model. Detailed Implementation

[0019] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0020] It should be noted that all directional indicators (such as up, down, left, right, front, back, etc.) in this utility model embodiment are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicator will also change accordingly.

[0021] Furthermore, the use of terms such as "first" and "second" in this utility model is for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. Additionally, the technical solutions of the various embodiments can be combined with each other, but only on the basis of being achievable by those skilled in the art. When the combination of technical solutions is contradictory or impossible to implement, such a combination of technical solutions should be considered non-existent and not within the scope of protection claimed by this utility model.

[0022] This invention proposes a control circuit for a low-power power switch.

[0023] In the embodiments of this utility model, such as Figure 1-3 As shown, this low-power power switch control circuit, applied in portable electronic devices, includes a power input terminal, a power output terminal, a MOS switch circuit, a logic inverting circuit, an RC filter circuit, a signal conversion circuit, a delay conduction circuit for suppressing transient high voltage, a main control circuit, and a power amplifier circuit. One end of the MOS switch circuit is electrically connected to the power input terminal, and the other end is electrically connected to the delay conduction circuit, the RC filter circuit, and the power output terminal. One end of the signal conversion circuit is electrically connected to the RC filter circuit, and the other end is electrically connected to the power amplifier circuit. One end of the logic inverting circuit is electrically connected to the RC filter circuit, and the other end is electrically connected to the delay conduction circuit. The signal conversion circuit is electrically connected to the delay conduction circuit, the main control circuit, and the logic inverting circuit.

[0024] In this embodiment, the MOS switching circuit includes a first resistor and a P-channel MOS transistor; one end of the first resistor is electrically connected to the drain of the P-channel MOS transistor, and the other end is electrically connected to the RC filter circuit; a 3.3V input power supply voltage is connected to the RC filter circuit, and the drain of the P-channel MOS transistor is electrically connected to the power supply output terminal; the gate of the P-channel MOS transistor is electrically connected to the logic inverting circuit, and the source of the P-channel MOS transistor is electrically connected to the common terminal of the first resistor and the RC filter circuit.

[0025] In this embodiment, the RC filter circuit includes a pull-up resistor and a first capacitor; one end of the first capacitor is electrically connected to the common terminal of the logic inverting circuit and the gate of the P-channel MOS transistor, and the other end is electrically connected to the source of the P-channel MOS transistor; one end of the pull-up resistor is electrically connected to the common terminal of the first resistor and the source of the P-channel MOS transistor, and the other end is electrically connected to the logic inverting circuit.

[0026] In this embodiment, the logic inverting circuit includes a transistor, a second resistor, a third resistor, and a fourth resistor; one end of the second resistor is electrically connected to the gate of the P-channel MOS transistor, and the other end is electrically connected to the common terminal of the collector of the transistor and the pull-up resistor; one end of the third resistor is electrically connected to the base of the transistor, and the other end is electrically connected to the main control circuit; one end of the fourth resistor is electrically connected to the base of the transistor, and the other end is electrically connected to the emitter of the transistor; the emitter of the transistor is grounded.

[0027] In this embodiment, the signal conversion circuit includes a digital-to-analog converter, a fifth resistor, a sixth resistor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, and a seventh capacitor; one end of the second capacitor is grounded, and the other end is electrically connected to the first pin of the digital-to-analog converter; the second, third, and fourth pins of the digital-to-analog converter are all electrically connected to the main control circuit; one end of the third capacitor is grounded, and the other end is electrically connected to the fifth pin of the digital-to-analog converter; one end of the fourth capacitor is grounded, and the other end is electrically connected to the tenth pin of the digital-to-analog converter; the ninth pin of the digital-to-analog converter is grounded; one end of the fifth capacitor is grounded, and the other end is electrically connected to the sixth pin of the digital-to-analog converter. One end of the fifth resistor is electrically connected to the power amplifier circuit, and the other end is electrically connected to the eighth pin of the digital-to-analog converter; one end of the sixth resistor is electrically connected to the power amplifier circuit, and the other end is electrically connected to the seventh pin of the digital-to-analog converter; one end of the sixth capacitor is grounded, and the other end is electrically connected to the sixth resistor; one end of the seventh capacitor is grounded, and the other end is electrically connected to the power amplifier circuit and the eighth pin of the digital-to-analog converter; one end of the sixth resistor is electrically connected to the power amplifier circuit, and the other end is electrically connected to the seventh pin of the digital-to-analog converter; one end of the sixth capacitor is grounded, and the other end is electrically connected to the sixth resistor; one end of the seventh capacitor is grounded, and the other end is electrically connected to the fifth resistor.

[0028] In this embodiment, the control circuit of the low-power power switch further includes a voltage regulator capacitor; one end of the voltage regulator capacitor is grounded, and the other end is electrically connected to the drain of the P-channel MOSFET.

[0029] Specifically, this application presents a low-power controllable power switch circuit based on a P-channel MOSFET Q1 and a transistor Q2 architecture. Q2 is an NPN transistor, the first resistor R1 is a reserved resistor, the third resistor R4 is the base resistor of transistor Q2, R2 is the pull-up resistor for the PMOS transistor's gate, the second resistor R3 is the gate resistor for the PMOS transistor, R5 is the pull-down resistor for the NPN base, the first capacitor C1 is the source-gate capacitor for the PMOS transistor, and the voltage regulator capacitor C2 is used to stabilize the voltage at the DAC_VDD power output terminal, reducing voltage fluctuations. Through innovative gate drive logic design and an RC filter circuit anti-interference network, zero quiescent current (<1μA) is achieved during turn-off, extending battery life and solving the battery life problem for devices. An integrated RC filter and soft-start mechanism suppresses false triggering and inrush current. It supports hardware bypass mode (0Ω reserved resistor), allowing switching control strategies without modifying the PCB board of portable electronic devices during practical applications. It is low-cost, small in size, and perfectly suited for miniaturized devices.

[0030] In this application, the example model of the P-channel MOSFET is AO3401, the gate threshold voltage VGS(th) of the P-channel MOSFET Q1 is -1.3V, and the example model of the transistor Q2 is MMBT3904. The power supply VDD_3V3 is 3.3V.

[0031] The specific working principle is as follows:

[0032] When the control signal DAC_EN of the main control circuit is high, current flows through the third resistor R4 to the base of transistor Q2, causing transistor Q2 to saturate and conduct (Vce≈0.2V). At this time, the gate of P-channel MOSFET Q1 is pulled down to about 0.2V by the second resistor R3, resulting in its gate-source voltage Vgs being about -3.1V (lower than VGS(th)), thus turning on P-channel MOSFET Q1 and outputting DAC_VDD at 3.3V.

[0033] Conversely, when the control signal DAC_EN of the main control circuit is low, the fourth resistor R5 pulls down the base of transistor Q2 to 0V, causing Q2 to turn off. At this time, the gate of the P-channel MOSFET Q1 is pulled up to 3.3V through the pull-up resistor R2, Vgs becomes 0V, the P-channel MOSFET Q1 is completely turned off, the DAC_VDD output is 0V, that is, the Zener capacitor C2 discharges through the load.

[0034] The pull-up resistor R2 and the second resistor R3, which is electrically connected to the gate of the P-channel MOSFET Q1, work together to optimize static power consumption. The RC filter circuit composed of the first capacitor C1 and the pull-up resistor R2 not only filters out noise but also provides a soft-start function, enhancing the system's anti-interference performance. Meanwhile, the fourth resistor R5 and the first capacitor C1 also help suppress high-frequency gate oscillations. The reserved 0Ω resistor provides convenience for production line testing and emergency fault response.

[0035] Through the design of the MOS switching circuit, logic inverting circuit, RC filtering circuit, signal conversion circuit and delay conduction circuit described above, this application can accurately control the working state of the digital-to-analog converter U1, ensuring that the digital-to-analog converter U1 will not work when there is no DAC_VDD output, thus further saving energy consumption.

[0036] It should be noted that although the main control circuit and power amplifier circuit involved in this application are prior art, they are not covered in this core inventive point, and therefore will not be described in detail.

[0037] This application is particularly suitable for portable and battery-powered electronic devices with extremely high requirements for power consumption, size, and reliability. The circuit, through the gate drive logic design of the P-channel MOSFET Q1 and an RC filter anti-interference network, achieves a quiescent current of less than 1μA in the off state, significantly extending battery life and effectively alleviating the pain point of insufficient battery life in miniaturized devices.

[0038] This application is widely used in the following typical scenarios:

[0039] Wearable devices (such as smartwatches, fitness trackers, etc.)

[0040] Such devices are typically powered by small lithium batteries and require almost no power consumption in standby or sleep mode. This application can completely cut off the power supply DAC_VDD of analog modules such as DAC when the main control circuit shuts down, achieving "true shutdown" and avoiding static leakage caused by the control signal maintenance of traditional switches, thereby significantly improving standby time.

[0041] Such as IoT terminal nodes (e.g., wireless sensors, NB-IoT modules, etc.)

[0042] In remote monitoring systems, sensors are mostly in a dormant state, only periodically awakened to collect data. This application allows the main control circuit to precisely control the power supply to the analog front-end (such as ADC, DAC, operational amplifier) ​​via the DAC_EN signal, completely cutting off power during non-operating periods to achieve ultra-low power consumption and meet application requirements that do not require battery replacement for several years.

[0043] Portable medical devices (such as blood glucose meters, heart rate monitors, etc.)

[0044] Medical devices have extremely high requirements for safety and stability. This application integrates RC filtering and a soft-start mechanism, which can effectively suppress the risk of false start-up caused by radio frequency interference, while avoiding the impact of surge current on sensitive biosignal acquisition modules at the moment of power-on, thereby improving system reliability and measurement accuracy.

[0045] Consumer electronics products (such as TWS earphones, Bluetooth speakers, etc.)

[0046] In audio equipment, the digital-to-analog converter (DAC) and power amplifier circuit are the main power consumers. This application enables on-demand power supply to the DAC_VDD, and with the help of software logic, it automatically cuts off power when there is no audio playback, reducing the overall power consumption. At the same time, it supports a hardware bypass mode (achieved by reserving a 0Ω first resistor R1), which facilitates rapid testing on the production line or forced power-on in case of abnormal control signals, improving production efficiency and maintenance convenience.

[0047] Industrial handheld terminals and low-power meters

[0048] In environments with strong electromagnetic interference (such as factories and power systems), ordinary MOS switches are susceptible to false triggering due to interference. This application significantly enhances anti-interference capabilities and ensures the stability of power supply control through RC filtering (pull-up resistor R2 and first capacitor C1) and pull-down fourth resistor R5, making it suitable for high-reliability industrial scenarios.

[0049] This application achieves efficient, reliable, and low-power control of analog power modules in portable electronic devices through the collaborative design of MOS switching circuits, logic inverting circuits, RC filtering circuits, signal conversion circuits, and delayed conduction circuits. Compared with traditional power switching solutions, it has the following significant technical advantages: achieving ultra-low static power consumption, significantly extending battery life, integrating RC filtering and soft-start functions to improve system reliability, enhancing anti-interference capabilities, ensuring the accuracy of power control, supporting hardware bypass mode, improving testing and maintenance flexibility, and having a compact structure and low cost, adapting to the needs of miniaturized devices, achieving precise on-demand power control, and optimizing system energy efficiency management.

[0050] This application uses a P-channel MOSFET Q1 as the main switching device, combined with a logic inverting drive structure of transistor Q2. In the off state, no control current needs to be maintained. With a reasonable pull-up resistor R2 and a fourth pull-down resistor R5 configuration, the quiescent current of the entire control circuit is less than 1μA. In long-term standby or sleep modes of portable devices, the power supply to high-power analog modules such as DACs and ADCs can be completely cut off, avoiding power waste caused by "false shutdown" and effectively improving the overall battery life. This is particularly suitable for applications with stringent energy efficiency requirements, such as wearable devices and IoT terminals.

[0051] By sharing a key first capacitor element with the RC filter circuit and the delay conduction circuit, not only are high-frequency noise and electromagnetic interference (EMI) in the control signal filtered out, preventing false turn-on due to signal jitter or RF coupling, but also soft-start of the power supply is achieved by controlling the rise slope of the gate voltage of the P-channel MOSFET Q1. This design effectively suppresses the surge current at power-on, avoiding impact on sensitive downstream circuits (such as DACs, sensors, and power amplifiers), and improving the stability and safety of the system startup.

[0052] By setting a fourth pull-down resistor R5 at the base of the transistor, a pull-up resistor R2 and a first capacitor C1 at the P-channel MOSFET Q1, a highly robust input signal processing network is constructed. This ensures that the circuit can maintain a definite off or on state even in complex electromagnetic environments or when the signal source is unstable, preventing abnormal power-up caused by floating pins or noise interference, and improving the overall system's anti-interference performance and operational reliability.

[0053] A pre-reserved first resistor R1 (e.g., a 0Ω resistor) is included in the circuit. This allows for a "forced always-on" mode to be achieved by mounting or removing this resistor without modifying the PCB layout. This design greatly facilitates production line aging tests, functional verification, and on-site troubleshooting, eliminating the need for jumper wires or re-fabrication, significantly reducing production and maintenance costs, and improving product manufacturability and serviceability.

[0054] This application utilizes discrete components, eliminating the need for dedicated power management ICs (such as load switch chips), resulting in low BOM cost and a small PCB footprint. Furthermore, through circuit architecture optimization, it achieves a high degree of integration of multiple functions such as filtering, delay, driving, and phase inversion, meeting the trend of portable electronic devices towards thinner and smaller designs, and demonstrating promising prospects for industrial application.

[0055] The main control circuit can control the on / off state of the analog power supply (DAC_VDD) by using a low-level active control signal (such as DAC_EN). Combined with software strategies, dynamic power management (DPM) can be implemented, which only supplies power to the analog module when needed, minimizing unnecessary energy consumption and improving the overall energy efficiency ratio.

[0056] The above description is only a preferred embodiment of the present utility model and does not limit the patent scope of the present utility model. All equivalent structural transformations made under the inventive concept of the present utility model using the contents of the present utility model specification and drawings, or direct / indirect applications in other related technical fields, are included within the patent protection scope of the present utility model.

Claims

1. A control circuit for a low-power power switch, used in portable electronic devices, characterized in that, The system includes a power input terminal, a power output terminal, a MOS switching circuit, a logic inverting circuit, an RC filter circuit, a signal conversion circuit, a delay conduction circuit for suppressing transient high voltage, a main control circuit, and a power amplifier circuit. One end of the MOS switching circuit is electrically connected to the power input terminal, and the other end is electrically connected to the delay conduction circuit, the RC filter circuit, and the power output terminal. One end of the signal conversion circuit is electrically connected to the RC filter circuit, and the other end is electrically connected to the power amplifier circuit. One end of the logic inverting circuit is electrically connected to the RC filter circuit, and the other end is electrically connected to the delay conduction circuit. The signal conversion circuit is electrically connected to the delay conduction circuit, the main control circuit, and the logic inverting circuit.

2. The control circuit for the low-power power switch as described in claim 1, characterized in that, The MOS switching circuit includes a first resistor and a P-channel MOS transistor; one end of the first resistor is electrically connected to the drain of the P-channel MOS transistor, and the other end is electrically connected to the RC filter circuit; a 3.3V input power supply voltage is connected to the RC filter circuit, the drain of the P-channel MOS transistor is electrically connected to the power supply output terminal; the gate of the P-channel MOS transistor is electrically connected to the logic inverting circuit, and the source of the P-channel MOS transistor is electrically connected to the common terminal of the first resistor and the RC filter circuit.

3. The control circuit for the low-power power switch as described in claim 2, characterized in that, The RC filter circuit includes a pull-up resistor and a first capacitor; one end of the first capacitor is electrically connected to the common terminal of the logic inverting circuit and the gate of the P-channel MOS transistor, and the other end is electrically connected to the source of the P-channel MOS transistor; one end of the pull-up resistor is electrically connected to the common terminal of the first resistor and the source of the P-channel MOS transistor, and the other end is electrically connected to the logic inverting circuit.

4. The control circuit for the low-power power switch as described in claim 3, characterized in that, The logic inverting circuit includes a transistor, a second resistor, a third resistor, and a fourth resistor; one end of the second resistor is electrically connected to the gate of the P-channel MOSFET, and the other end is electrically connected to the common terminal of the collector of the transistor and the pull-up resistor; one end of the third resistor is electrically connected to the base of the transistor, and the other end is electrically connected to the main control circuit; one end of the fourth resistor is electrically connected to the base of the transistor, and the other end is electrically connected to the emitter of the transistor; the emitter of the transistor is grounded.

5. The control circuit for the low-power power switch as described in claim 4, characterized in that, The signal conversion circuit includes a digital-to-analog converter, a fifth resistor, a sixth resistor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, and a seventh capacitor. One end of the second capacitor is grounded, and the other end is electrically connected to the first pin of the digital-to-analog converter. The second, third, and fourth pins of the digital-to-analog converter are all electrically connected to the main control circuit. One end of the third capacitor is grounded, and the other end is electrically connected to the fifth pin of the digital-to-analog converter. One end of the fourth capacitor is grounded, and the other end is electrically connected to the tenth pin of the digital-to-analog converter. The ninth pin of the digital-to-analog converter is grounded. One end of the fifth capacitor is grounded, and the other end is electrically connected to the sixth pin of the digital-to-analog converter. One end of the fifth resistor is electrically connected to the power amplifier circuit, and the other end is electrically connected to the eighth pin of the digital-to-analog converter. One end of the sixth resistor is electrically connected to the power amplifier circuit, and the other end is electrically connected to the seventh pin of the digital-to-analog converter. One end of the sixth capacitor is grounded, and the other end is electrically connected to the sixth resistor. One end of the seventh capacitor is grounded, and the other end is electrically connected to the fifth resistor.

6. The control circuit for the low-power power switch as described in claim 5, characterized in that, The control circuit of the low-power power switch also includes a voltage regulator capacitor; one end of the voltage regulator capacitor is grounded, and the other end is electrically connected to the drain of the P-channel MOSFET.

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