A boost converter and switch clamp circuit applied to a photovoltaic grid-connected inverter
Patent Information
- Application Number
- CN202522103392.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-29
- Publication Date
- 2026-09-08
- Estimated Expiration
- 2035-09-29
AI Technical Summary
[0003]目前广泛使用的是传统Boost(BoostCoutnverter)变换器，其优点是拓扑简单，控制成熟；缺点是电压增益受限，升压比有限，特别在如光伏板电压低时仍需升到高压母线这种高升压比需求的场景下，电感、开关管的应力和损耗会显著增加；开关管电压应力高，开关管承受的电压为输出母线电压，在高母线电压下应力大，需要选用更高规格的器件，成本高且开关损耗大；电感体积大、电流纹波大，为了减小电流纹波和磁芯损耗，常常需要较大体积的电感，不利于提高功率密度；在宽输入电压范围和低光照条件下，此时输入电流大、电压低，Boost变换器的效率可能明显下降
本实用新型通过飞跨电容器对第一开关管的第一电极和第二电极之间的电压，第二开关管的第一电极和第二电极之间的电压进行箝位并进行能量转移，开关管箝位电路的输出端耦接于第四节点和第六节点，其作为整个BOOST变换器的输出端，连接到后级逆变器。能够在相同占空比下提供更高升压比，第一开关管和第二开关管额的电压应力降至母线电压的的一半，飞跨电容交替的在开关管上并联钳位，在相同的母线电压下，开关管的电压被钳位在飞跨电容电压，即二分之一母线电压，使开关管的电压应力减半。同时低耐压的第一开关管和第二开关管具有更低的导通电阻，使得导通损耗降低。两个开关管交替导通使得电感的电流频率翻倍，频率越高，所需的电感值越小，电感体积也越小，提升了功率密度。降低开关管的损耗和使用成本。
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Figure CN224733641U_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to photovoltaic grid-connected inverters. More specifically, it relates to a Boost converter and a switching clamping circuit for use in photovoltaic grid-connected inverters. Background Technology
[0002] String inverters are widely used due to their flexibility and high power generation efficiency. Their front-end typically requires a high-efficiency boost converter, whose main task is to efficiently boost the variable DC voltage of the photovoltaic panels, such as 500 to 1500V, to a stable and sufficiently high DC bus voltage, such as 1600V, to meet the grid connection requirements of the downstream inverters, while also achieving efficient maximum power point tracking (MPPT).
[0003] Currently, the traditional Boost Converter is widely used. Its advantages include simple topology and mature control. However, its disadvantages include limited voltage gain and a limited boost ratio. Especially in scenarios requiring a high boost ratio, such as when the photovoltaic panel voltage is low but still needs to be boosted to the high-voltage bus, the stress and losses of the inductor and switching transistors increase significantly. The switching transistors experience high voltage stress, as they withstand the output bus voltage. High bus voltages necessitate the use of higher-specification components, increasing cost and switching losses. The inductors are large and have high current ripple. To reduce current ripple and core losses, larger inductors are often required, hindering power density improvement. Under wide input voltage ranges and low light conditions, the high input current and low voltage can significantly reduce the efficiency of the Boost converter. While other improved topologies such as cascaded Boost, coupled inductor Boost, and three-level Boost can improve some performance, they generally suffer from high voltage stress on switching transistors like IGBTs, low boost ratios, and complex control. Utility Model Content
[0004] The purpose of this disclosure is to provide a Boost converter and switching clamping circuit for photovoltaic grid-connected inverters that achieves high voltage gain, reduced switching stress, current ripple, improved efficiency, and maintains simple and reliable control, thereby solving at least one of the problems existing in the prior art.
[0005] To achieve the above objectives, the present disclosure adopts the following technical solution: The first aspect of this disclosure provides a switch clamping circuit, including: First diode, second diode, and flying capacitor; The positive terminal of the second diode and the first electrode of the first switching transistor are coupled to the first node; The positive terminal of the flying capacitor is coupled to the positive terminal of the first diode and the negative terminal of the second diode at the second node, and the negative terminal is coupled to the second electrode of the first switch and the first electrode of the second switch at the third node, respectively, for clamping the voltage between the first and second electrodes of the first switch and the voltage between the first and second electrodes of the second switch.
[0006] Furthermore, the clamping circuit also includes an inductor, an input capacitor, and a capacitor assembly; The first terminal of the inductor, the positive terminal of the second diode, and the first electrode of the first switch are coupled to the first node; The second electrode of the second switch, the negative terminal of the input capacitor, the negative terminal of the photovoltaic module, and one end of the capacitor module are coupled to the fourth node; The second end of the inductor, the positive terminal of the input capacitor, and the positive terminal of the photovoltaic module are coupled to the fifth node; The negative terminal of the first diode and the other end of the capacitor assembly are coupled to the sixth node.
[0007] Furthermore, the capacitor assembly includes a first output capacitor, a second output capacitor, and a third output capacitor; The negative terminal of the first diode, the positive terminal of the first output capacitor, and the positive terminal of the third output capacitor are coupled to the sixth node; The second electrode of the second switch, the negative terminal of the second output capacitor, and the negative terminal of the third output capacitor are coupled to the fourth node; The negative terminal of the first output capacitor and the positive terminal of the second output capacitor are electrically connected.
[0008] Furthermore, the clamping circuit also includes a current sampling circuit; The current sampling circuit includes a current sampling chip, a first sampling capacitor, a second sampling capacitor, a third sampling capacitor, and a fourth sampling capacitor; The first current acquisition terminal of the current sampling chip is coupled to the fifth node, and the second current acquisition terminal is electrically connected to the first terminal of the inductor. The power supply terminal of the current sampling chip is coupled to one end of the first sampling capacitor, one end of the second sampling capacitor, and the external power supply terminal at the seventh node. The first output terminal, one end of the third sampling capacitor, and the first current acquisition terminal of the controller are coupled to the eighth node. The second output terminal, one end of the fourth sampling capacitor, and the second current acquisition terminal of the controller are coupled to the ninth node.
[0009] Furthermore, the current sampling chip is selected from the current sampling isolation chip NACA40E-P6 / VN.
[0010] Furthermore, the photovoltaic module is a string photovoltaic module.
[0011] Furthermore, the clamping circuit includes a voltage sampling module; The voltage sampling module is coupled between the fourth node and the fifth node; The output of the voltage sampling module is connected to the voltage acquisition terminal of the controller.
[0012] Furthermore, the flying capacitor includes an electrolytic capacitor.
[0013] A second aspect of this disclosure provides a Boost converter for use in a photovoltaic grid-connected inverter, comprising: The controller, the first switch, the second switch, the drive module, and the clamping circuit as described in any one of the first aspects; The signal output terminal of the controller is connected to the input terminal of the drive module; The first output terminal of the drive module is connected to the control electrode of the first switching transistor, and the second output terminal is connected to the control electrode of the second switching transistor.
[0014] Furthermore, the first switch and the second switch are respectively selected from a metal-oxide-semiconductor field-effect transistor and an insulated-gate bipolar transistor.
[0015] The beneficial effects of this disclosure are as follows: This invention clamps and transfers energy between the first and second electrodes of the first switching transistor and the first and second electrodes of the second switching transistor using flying capacitors. The output of the switching transistor clamping circuit is coupled to the fourth and sixth nodes, serving as the output of the entire BOOST converter and connecting to the subsequent inverter. It can provide a higher boost ratio at the same duty cycle. The rated voltage stress of the first and second switching transistors is reduced to half of the bus voltage. The flying capacitors alternately clamp the switching transistors in parallel, clamping the voltage of the switching transistors to the flying capacitor voltage (half the bus voltage) at the same bus voltage, thus halving the voltage stress on the switching transistors. Simultaneously, the low-voltage first and second switching transistors have lower on-resistance, reducing conduction losses. The alternating conduction of the two switching transistors doubles the current frequency of the inductor; the higher the frequency, the smaller the required inductance value and the smaller the inductor size, increasing power density. It also reduces switching transistor losses and operating costs. Attached Figure Description
[0016] The specific embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.
[0017] Figure 1 A schematic diagram of a Boost converter applied to a photovoltaic grid-connected inverter according to an embodiment of the present disclosure is shown.
[0018] Figure 2 A circuit diagram illustrating a switch clamping according to an embodiment of the present disclosure is shown.
[0019] Figure 3 A circuit diagram of a capacitor assembly according to an embodiment of the present disclosure is shown.
[0020] Figure 4 A circuit diagram of a current sampling circuit according to an embodiment of the present disclosure is shown. Detailed Implementation
[0021] To more clearly illustrate this disclosure, the following description, in conjunction with embodiments and accompanying drawings, provides further insight. Similar components in the drawings are indicated by the same reference numerals. Those skilled in the art should understand that the specific description below is illustrative rather than restrictive and should not be construed as limiting the scope of protection of this disclosure.
[0022] like Figure 2 As shown, the first embodiment of this utility model provides a switch clamping circuit, which is used in a BOOST converter, and the BOOST converter is used in the MPPT front-end boost stage of a string photovoltaic grid-connected inverter; the switch clamping circuit includes: First diode D1, second diode D2, and flying capacitor CFC; The positive terminal of the second diode D2 and the first electrode of the first switching transistor T1 are coupled to the first node TP1; The positive terminal of the flying capacitor CFC is coupled to the positive terminal of the first diode D1 and the negative terminal of the second diode D2 at the second node TP2, and the negative terminal is coupled to the second electrode of the first switch T1 and the first electrode of the second switch T2 at the third node TP3. This clamps the voltage between the first and second electrodes of the first switch T1 and the second switch T2, respectively. In this embodiment, the flying capacitor CFC clamps and transfers energy between the first and second electrodes of the first switch T1 and the second switch T2. The output of the switch clamping circuit is coupled to the fourth node TP4 and the sixth node TP6, serving as the output of the entire BOOST converter and connecting to the subsequent inverter. Achieving a higher boost ratio at the same duty cycle, the rated voltage stress of the first switch T1 and the second switch T2 is reduced to half of the bus voltage. Flying capacitors alternately clamp the switches in parallel, clamping the switch voltage to the flying capacitor voltage (half the bus voltage) at the same bus voltage, thus halving the switch stress. Simultaneously, the low-voltage first switch T1 and the second switch T2 have lower on-resistance, reducing conduction losses. The alternating conduction of the two switches doubles the inductor current frequency; higher frequencies require smaller inductance values and smaller inductor sizes, increasing power density. This also reduces switch losses and operating costs.
[0023] In a specific example, a string PV grid-connected inverter refers to a device that connects several photovoltaic (PV) modules in series to form a string, and then equips each string with an independent inverter for MPPT (Multi-Level Photovoltaic Power Optimization) and grid connection. Its key feature is independent power optimization for each string, making it suitable for complex lighting conditions.
[0024] Maximum Power Point Tracking (MPPT) is a control algorithm and circuit technique used to dynamically adjust the operating point of a photovoltaic cell so that it always outputs the maximum usable power under the current sunlight and temperature conditions.
[0025] A converter (or power converter) is a power electronic device that converts electrical energy into different forms (primarily voltage, current, and frequency). In this context, it specifically refers to a DC-DC boost converter.
[0026] A boost converter is a DC-DC boost converter topology in which the output voltage is higher than the input voltage.
[0027] In this embodiment, the flying capacitor refers to an ungrounded capacitor used in power electronic topologies, connected between two or more switching transistors or on a specific branch, for storing and transferring energy, balancing voltage stress, or increasing voltage gain.
[0028] A switching device (or power switch) is a device used to periodically turn on and off to achieve energy conversion.
[0029] Voltage stress refers to the maximum voltage that a switching transistor or capacitor can withstand.
[0030] Bus voltage (DCLinkVoltage): The DC voltage output by the converter before the inverter is boosted, and the inverter after the inverter converts this DC voltage into AC for grid connection.
[0031] In one possible implementation, the clamping circuit further includes an inductor L, an input capacitor Cin, and a capacitor assembly Cout; The first terminal of the inductor L, the positive terminal of the second diode D2, and the first electrode of the first switch T1 are coupled to the first node TP1; The second electrode of the second switch transistor T2, the negative terminal of the input capacitor Cin, the negative terminal of the photovoltaic module PV, and one end of the capacitor module Cout are coupled to the fourth node TP4. The second terminal of the inductor L, the positive terminal of the input capacitor Cin, and the positive terminal of the photovoltaic module PV are coupled to the fifth node TP5; The negative terminal of the first diode D1 and the other end of the capacitor assembly Cout are coupled to the sixth node TP6.
[0032] In one possible implementation, such as Figure 3 As shown, the capacitor assembly Cout includes a first output capacitor Cout1, a second output capacitor Cout2, and a third output capacitor Cout3; The negative terminal of the first diode D1, the positive terminal of the first output capacitor Cout1, and the positive terminal of the third output capacitor Cout3 are coupled to the sixth node TP6; The second electrode of the second switch transistor T2, the negative terminal of the second output capacitor Cout2, and the negative terminal of the third output capacitor Cout3 are coupled to the fourth node TP4. The negative terminal of the first output capacitor Cout1 and the positive terminal of the second output capacitor Cout2 are electrically connected.
[0033] In one possible implementation, such as Figure 4 As shown, the clamping circuit also includes a current sampling circuit; The current sampling circuit includes a current sampling chip, a first sampling capacitor C1, a second sampling capacitor C2, a third sampling capacitor C3, and a fourth sampling capacitor C4. The first current acquisition terminal of the current sampling chip is coupled to the fifth node TP5, and the second current acquisition terminal is electrically connected to the first terminal of the inductor L. The power supply terminal of the current sampling chip is coupled to one end of the first sampling capacitor C1, one end of the second sampling capacitor C2, and the external power supply terminal at the seventh node TP7. The first output terminal, one end of the third sampling capacitor C3, and the first current acquisition terminal of the controller CU are coupled to the eighth node TP8. The second output terminal, one end of the fourth sampling capacitor C4, and the second current acquisition terminal of the controller CU are coupled to the ninth node TP9. Specifically, the other ends of the first sampling capacitor C1, the second sampling capacitor C2, the third sampling capacitor C3, the fourth sampling capacitor C4, and the ground terminal of the current sampling chip are all grounded.
[0034] In a specific example, the current sampling chip is selected from the NACA40E-P6 / VN current sampling isolation chip. The high-precision isolation sampling chip NACA40E-P6 / VN is used, and the chip is connected in series in the circuit containing inductor L. The sampling output generates a proportional voltage signal V_Isense, which is directly input to the current acquisition terminal of the controller CU, such as the first current acquisition terminal and the second current acquisition terminal. Specifically, if the controller CU uses a microcontroller unit (MCU), it is connected to the MCU's ADC pin to achieve current detection with a precision of 0.5%, improving the MPPT control accuracy and stability. It also enables completely isolated DC or AC current detection, meeting the high isolation and high-precision sampling requirements of photovoltaic inverters. Furthermore, the NACA40E-P6 / VN is directly connected in series in the inductor circuit, and the output signal is directly connected to the MCU's ADC pin, eliminating the need for additional conditioning circuitry. This simplifies the design, improves the current loop control accuracy, and significantly enhances the stability of the MPPT under complex lighting conditions. By integrating sampling innovations into a single topology, this approach addresses the issues of large sampling errors and insufficient isolation in traditional solutions. It is particularly suitable for high ripple current environments, reducing system costs and improving reliability.
[0035] In a specific example, ripple current refers to the alternating current component flowing through an inductor, capacitor, or load, the magnitude of which affects the device's losses and temperature rise.
[0036] In one possible implementation, the photovoltaic module PV is a string photovoltaic module PV.
[0037] In one possible implementation, the clamping circuit includes a voltage sampling module; The voltage sampling module is coupled between the fourth node TP4 and the fifth node TP5; The output of the voltage sampling module is connected to the voltage acquisition terminal of the controller CU.
[0038] It should be noted that the voltage sampling module can use a dedicated voltage sampling device such as a voltmeter, or it can employ a voltage sampling circuit composed of a precision resistor voltage divider network and a differential operational amplifier to suppress common-mode interference and achieve high-precision input voltage detection. This embodiment does not impose any limitations on this.
[0039] In one possible implementation, the flying capacitor CFC comprises an electrolytic capacitor.
[0040] like Figure 1 As shown, the second embodiment of this utility model provides a Boost converter applied to a photovoltaic grid-connected inverter, comprising: The controller CU, the first switch T1, the second switch T2, the drive module DM, and the clamping circuit as described in any one of the first embodiments; The signal output terminal of the controller CU is connected to the input terminal of the drive module DM; The first output terminal of the drive module DM is connected to the control electrode of the first switching transistor T1, and the second output terminal is connected to the control electrode of the second switching transistor T2.
[0041] In one possible implementation, the first switch T1 and the second switch T2 are respectively selected from an insulated gate bipolar transistor (IGBT) and an insulated gate bipolar transistor (MOSFET).
[0042] In a specific example, the driver module DM includes a switching transistor driver circuit and an isolated driver power supply circuit. The output of the isolated driver power supply circuit is connected to the input of the switchable driver circuit. The first output of the switching transistor driver circuit is connected to the control electrode of the first switching transistor T1, and the second output is connected to the control electrode of the second switching transistor T2. Specifically, the switching transistor driver circuit uses a TLP5754 chip as the isolated driver chip. The PWM signal generated by the controller CU is input to the low-voltage side of the isolated driver chip TLP5754. Through internal isolation transmission, the high-voltage side of the isolated driver chip TLP5754 outputs drive signals to the control electrodes of the first switching transistor T1 and the second switching transistor T2, respectively. A passive network is used between the high-voltage side of the driver chip TLP5754 and the control electrodes of each switching transistor to suppress ringing effects and ensure high-speed switching.
[0043] In one specific example, a mechanical surge arrester is also connected between the photovoltaic module (PV) and the clamping circuit. When the mechanical surge arrester is triggered, it physically disconnects the downstream circuit, providing reliable lightning protection.
[0044] In a specific example, the isolated drive power supply circuit generates two isolated power supplies from the 12V system power supply, which respectively supply the high-voltage side and low-voltage side of the isolated drive chip TLP5754 to ensure potential fluctuation. The control strategy adopts interleaved PWM drive, in which the signal sent to the first switch T1 and the signal sent to the second switch T2 are 180 degrees out of phase. Combined with the perturbation observation method MPPT tracking, the duty cycle is dynamically adjusted to optimize efficiency.
[0045] It should be noted that in this embodiment, the input terminal of the switch clamping circuit is connected in parallel with the input capacitor Cin, and the output terminal is connected in parallel with both ends of the capacitor assembly Cout.
[0046] It should be noted that in this embodiment, the switching transistor is an IGBT, so the control electrode is the gate, which mainly controls the conduction of the other two electrodes. The first electrode is the drain and the second electrode is the source. This embodiment does not impose any restrictions on this.
[0047] In the description of this disclosure, it should be noted that the terms "upper," "lower," etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this disclosure. Unless otherwise expressly specified and limited, the terms "installed," "connected," and "linked" should be interpreted broadly, for example, they can be fixed connections, detachable connections, or integral connections; they can be mechanical connections or electrical connections; they can be direct connections or indirect connections through an intermediate medium; they can be internal connections between two elements. For those skilled in the art, the specific meaning of the above terms in this disclosure can be understood according to the specific circumstances.
[0048] It should also be noted that, in the description of this disclosure, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0049] Obviously, the above embodiments of this disclosure are merely examples for clearly illustrating this disclosure, and are not intended to limit the implementation of this disclosure. For those skilled in the art, other variations or modifications can be made based on the above description. It is impossible to exhaustively list all implementation methods here. Any obvious variations or modifications derived from the technical solutions of this disclosure are still within the protection scope of this disclosure.
Claims
1. A switching transistor clamping circuit, characterized in that, include: First diode, second diode, and flying capacitor; The positive terminal of the second diode and the first electrode of the first switching transistor are coupled to the first node; The positive terminal of the flying capacitor is coupled to the positive terminal of the first diode and the negative terminal of the second diode at the second node, and the negative terminal is coupled to the second electrode of the first switch and the first electrode of the second switch at the third node, respectively, for clamping the voltage between the first and second electrodes of the first switch and the voltage between the first and second electrodes of the second switch.
2. The clamping circuit according to claim 1, characterized in that, The clamping circuit also includes an inductor, an input capacitor, and a capacitor assembly; The first terminal of the inductor, the positive terminal of the second diode, and the first electrode of the first switch are coupled to the first node; The second electrode of the second switch, the negative terminal of the input capacitor, the negative terminal of the photovoltaic module, and one end of the capacitor module are coupled to the fourth node; The second end of the inductor, the positive terminal of the input capacitor, and the positive terminal of the photovoltaic module are coupled to the fifth node; The negative terminal of the first diode and the other end of the capacitor assembly are coupled to the sixth node.
3. The clamping circuit according to claim 2, characterized in that, The capacitor assembly includes a first output capacitor, a second output capacitor, and a third output capacitor; The negative terminal of the first diode, the positive terminal of the first output capacitor, and the positive terminal of the third output capacitor are coupled to the sixth node; The second electrode of the second switch, the negative terminal of the second output capacitor, and the negative terminal of the third output capacitor are coupled to the fourth node; The negative terminal of the first output capacitor and the positive terminal of the second output capacitor are electrically connected.
4. The clamping circuit according to claim 2, characterized in that, The clamping circuit also includes a current sampling circuit; The current sampling circuit includes a current sampling chip, a first sampling capacitor, a second sampling capacitor, a third sampling capacitor, and a fourth sampling capacitor; The first current acquisition terminal of the current sampling chip is coupled to the fifth node, and the second current acquisition terminal is electrically connected to the first terminal of the inductor. The power supply terminal of the current sampling chip is coupled to one end of the first sampling capacitor, one end of the second sampling capacitor, and the external power supply terminal at the seventh node. The first output terminal, one end of the third sampling capacitor, and the first current acquisition terminal of the controller are coupled to the eighth node. The second output terminal, one end of the fourth sampling capacitor, and the second current acquisition terminal of the controller are coupled to the ninth node.
5. The clamping circuit according to claim 4, characterized in that, The current sampling chip is selected from the current sampling isolation chip NACA40E-P6 / VN.
6. The clamping circuit according to claim 2, characterized in that, The photovoltaic module is a string photovoltaic module.
7. The clamping circuit according to claim 2, characterized in that, The clamping circuit includes a voltage sampling module; The voltage sampling module is coupled between the fourth node and the fifth node; The output of the voltage sampling module is connected to the voltage acquisition terminal of the controller.
8. The clamping circuit according to claim 1, characterized in that, The flying capacitor includes an electrolytic capacitor.
9. A Boost converter applied to a photovoltaic grid-connected inverter, characterized in that, include: The controller, the first switching transistor, the second switching transistor, the drive module, and the clamping circuit as described in any one of claims 1-8; The signal output terminal of the controller is connected to the input terminal of the drive module; The first output terminal of the drive module is connected to the control electrode of the first switching transistor, and the second output terminal is connected to the control electrode of the second switching transistor.
10. The Boost converter according to claim 9, characterized in that, The first switch and the second switch are respectively selected from metal-oxide-semiconductor field-effect transistors and insulated-gate bipolar transistors.