A structure of a high-side MOS driven by a combination controller
Patent Information
- Application Number
- CN202521358369.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-30
- Publication Date
- 2026-09-08
- Estimated Expiration
- 2035-06-30
AI Technical Summary
然而,使用PMOS方案,由于PMOS的工艺参数问题导致它不能像NMOS那样承担过大电流的能力,意味着它只能使用在小型的动力电池包上面
由于本实用新型结合控制器驱动高边MOS的结构的NMOS管的漏极所述BMS单元中电池模组的正极端P+相连,NMOS管的源极用于与用电设备相连,控制单元为用电设备的控制器,NMOS管的栅极连接有驱动模块,驱动模块含有电源单元和驱动电路,电源单元的输入电压PSystem由所述BMS单元产生,电源单元将输入电压PSystem转换成NMOS管的驱动电压boostv,驱动电压boostv通过驱动电路与NMOS管的栅极相连,控制单元向所述驱动电路发送控制使能Pmotor_Enable,BMS单元向驱动电路发送控制信号DSG,当驱动电路接收到控制使能Pmotor_Enable和控制信号DSG后,驱动电压boostv到达NMOS管的栅极,NMOS管导通。这种高边MOS的结构利用BMS单元产生的用于作为其芯片电源的弱电作为输入电压PSystem产生NMOS管的驱动电压boostv,再由用电设备的控制器控制驱动电压boostv是否达到NMOS管的栅极,从而实现高边NMOS的驱动工作。从而避免了采样PMOS作为高边方案没法承担大电流的情况,使得高边MOS的结构可适用到大型动力电池包。而且,利用用电设备的控制器作为控制单元,从而无需额外设置复杂的外围电路。
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Figure CN224733703U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of power battery technology, specifically a structure that combines a controller to drive a high-side MOS. Background Technology
[0002] Currently, many BMS battery packs use MOSFETs (Metal-Oxide-Semiconductor Units) to control charging and discharging. This structure is simple and relatively easy to implement, making it the mainstream solution. However, with the development of new energy sources, the safety of power battery packs has received considerable attention. The negative-terminal MOSFET solution used in previous BMS battery packs carries certain risks. If a person comes into contact with the positive terminal of the battery pack and forms a circuit with the ground, it can cause electric shock because this solution controls the negative terminal of the battery pack, not the positive terminal. Therefore, high-side control solutions for power battery packs have become a cutting-edge approach.
[0003] Currently, there are two or three existing solutions for power battery packs. One is a PMOS-based solution, replacing the previously used NMOS with a PMOS driver. The second is a separate solution, using a dedicated chip to act as a charge pump, leveraging its characteristics to boost the voltage and drive the NMOS. However, the PMOS solution, due to its manufacturing process limitations, cannot handle the high currents of NMOS, meaning it's limited to smaller power battery packs. The separate solution, which can be combined with existing AFE chips, expands its application range, but requires complex external circuitry to support it. Utility Model Content
[0004] The technical problem to be solved by this invention is to provide a structure that combines a controller to drive a high-side MOS, which can handle large currents without the need for complex external circuitry.
[0005] To solve the above problems, the following technical solutions are provided: This invention relates to a structure combining a controller and a high-side MOS transistor, comprising a BMS unit, characterized by further including an NMOS transistor and a control unit. The drain of the NMOS transistor is connected to the positive terminal P+ of the battery module in the BMS unit, and the source of the NMOS transistor is used to connect to the electrical device. The control unit is the controller of the electrical device. The gate of the NMOS transistor is connected to a driving module, which contains a power supply unit and a driving circuit. The input voltage PSystem of the power supply unit is generated by the BMS unit, and the power supply unit converts the input voltage PSystem into a driving voltage boostv for the NMOS transistor. The driving voltage boostv is connected to the gate of the NMOS transistor through the driving circuit. The control unit sends a control enable Pmotor_Enable to the driving circuit, and the BMS unit sends a control signal DSG to the driving circuit. When the driving circuit receives the control enable Pmotor_Enable and the control signal DSG, the driving voltage boostv reaches the gate of the NMOS transistor, and the NMOS transistor is turned on.
[0006] The device comprises two NMOS transistors, namely NMOS transistor Q1 and NMOS transistor Q2. The drains of both NMOS transistor Q1 and NMOS transistor Q2 are connected to the positive terminal P+ of the battery module. The sources of both NMOS transistor Q1 and NMOS transistor Q2 are used to connect to electrical devices. The drains of both NMOS transistor Q1 and NMOS transistor Q2 are connected to one end of capacitor C1. The other end of capacitor C1 is connected to one end of capacitor C2. The other end of capacitor C2 is connected to the source of both NMOS transistor Q1 and NMOS transistor Q2. The driving circuit is connected to the gate of both NMOS transistor Q1 and NMOS transistor Q2.
[0007] The power supply unit includes a voltage conversion chip U5, which converts the input voltage PSystem into a 12V voltage. The 12V voltage is connected to the anode of diode D17. The cathode of diode D17 is connected to the anode of diode D18, one end of capacitor C87, and one end of capacitor C89. The other ends of capacitors C87 and C89 form a BOOST_SW signal connected to the voltage conversion chip U5. The cathode of diode D18 is connected to one end of capacitor C90 and one end of capacitor C91. The other ends of capacitors C90 and C91 are both grounded. The cathode of diode D18 generates the driving voltage boostv.
[0008] The driving circuit includes a transistor Q9 and a resistor R9. One end of resistor R9 is connected to the driving voltage boostv and one end of resistor R13, respectively. The other end of resistor R9 is connected to the emitter of transistor Q9. The other end of resistor R13 is connected to the base of transistor Q9 and one end of resistor R23. The other end of resistor R23 is connected to the collector of transistor Q19. The base of transistor Q19 is connected to one end of resistor R30 and one end of resistor R34, respectively. The other end of resistor R30 is connected to the control enable Pmotor_Enable. The other end of resistor R36 is grounded. The emitter of transistor Q19 is connected to one end of resistor R33. The other end of resistor R33 is connected to the drain of NMOS transistor Q21. The gate of NMOS transistor Q21 is connected to the control signal DSG. The gate of NMOS transistor Q21 is connected to one end of resistor R42. The other end of resistor R42 and the source of NMOS transistor Q21 are both grounded; the collector of transistor Q9 is connected to the cathode of diode D8, the anode of diode D5, the base of transistor Q11, and one end of resistor R19, respectively. The anode of diode D8, the other end of resistor R19, and the collector of transistor Q11 are all connected to the source of the NMOS transistor; the emitter of transistor Q11 is connected to the gate of the NMOS transistor through a protection resistor; the cathode of diode D5 is connected to one end of resistor R10, and the other end of resistor R10 is connected to the emitter of transistor Q11.
[0009] The BMS unit contains a low-voltage conversion unit. The input terminal of the low-voltage conversion unit is connected to the positive terminal P+ of the battery module. After receiving the charging protection signal MCU_ChargeEnable and the control signal DSG generated by the control unit, the output terminal of the low-voltage conversion unit generates the input voltage PSystem.
[0010] The low-voltage conversion unit includes PMOS transistors Q5 and Q6. The source of PMOS transistor Q5 is the input terminal of the low-voltage conversion unit. The source of PMOS transistor Q5 is connected to one end of resistor R3, the collector of transistor Q8, one end of resistor R4, and the cathode of diode D2. The other end of resistor R3 and the base of transistor Q8 are both connected to the cathode of diode D7. The anode of diode D7, the other end of resistor R4, and the anode of diode D2 are all connected to the gate of PMOS transistor Q5. The cathode of diode D7 is connected to one end of resistor R15. The other end of resistor R15 is connected to the drain of NMOS transistor Q13. The gate of NMOS transistor Q13 is connected to the control signal DSG. The gate of NMOS transistor Q13 is connected to one end of resistor R25. The source of transistor Q13 and the other end of resistor R25 are both grounded; the drain of PMOS transistor Q5 is connected to one end of resistor R6, the cathode of diode D4, and the source of PMOS transistor Q6; the other end of resistor R6 and the anode of diode D4 are both connected to the gate of PMOS transistor Q6; the gate of PMOS transistor Q6 is connected to one end of resistor R16; the other end of resistor R16 is connected to the drain of NMOS transistor Q14; the gate of NMOS transistor Q14 is connected to the cathode of diode D44 and one end of resistor R26; the anode of diode D44 is used to receive the charging protection signal MCU_ChargeEnable; the other end of resistor R26 and the source of NMOS transistor Q14 are both grounded; the drain of PMOS transistor Q6 outputs the input voltage PSystem.
[0011] The source of the PMOS transistor Q5 is connected to one end of the capacitor C3, the other end of the capacitor C3 is connected to one end of the capacitor C4, and the other end of the capacitor C4 is connected to the drain of the PMOS transistor Q6.
[0012] The above approach has the following advantages: In this invention, the drain of the NMOS transistor, which combines a controller driving a high-side MOS, is connected to the positive terminal P+ of the battery module in the BMS unit. The source of the NMOS transistor is used to connect to the electrical equipment. The control unit is the controller of the electrical equipment. The gate of the NMOS transistor is connected to a driving module, which contains a power supply unit and a driving circuit. The input voltage PSystem of the power supply unit is generated by the BMS unit. The power supply unit converts the input voltage PSystem into the driving voltage boostv of the NMOS transistor. The driving voltage boostv is connected to the gate of the NMOS transistor through the driving circuit. The control unit sends a control enable Pmotor_Enable to the driving circuit. The BMS unit sends a control signal DSG to the driving circuit. When the driving circuit receives the control enable Pmotor_Enable and the control signal DSG, the driving voltage boostv reaches the gate of the NMOS transistor, and the NMOS transistor is turned on. This high-side MOS structure utilizes the weak current generated by the BMS unit as its chip power supply as the input voltage PSystem to generate the drive voltage boostv of the NMOS transistor. The controller of the power device then controls whether the drive voltage boostv reaches the gate of the NMOS transistor, thereby realizing the driving operation of the high-side NMOS. This avoids the situation where sampling PMOS as a high-side solution cannot handle large currents, making the high-side MOS structure applicable to large power battery packs. Moreover, by using the controller of the power device as the control unit, there is no need to set up additional complex peripheral circuits. Attached Figure Description
[0013] Figure 1 This is a topology diagram of the structure of this utility model that combines a controller to drive a high-side MOS; Figure 2 This is a circuit diagram of the battery module of the BMS unit in the structure of the present invention, which combines a controller to drive a high-side MOS. Figure 3 This is a circuit diagram of the AFE unit of the BMS unit in the structure of the present invention, which combines a controller to drive a high-side MOS. Figure 4 This is a circuit diagram of the low-voltage conversion unit in the structure of the present invention, which combines a controller to drive a high-side MOS. Figure 5 This is a circuit diagram of the power supply unit in the structure of this utility model that combines a controller to drive a high-side MOS. Figure 6 This is a schematic diagram of the connection between the driving circuit and the NMOS transistor in the structure of the present invention, which combines a controller to drive a high-side MOS. Figure 7 This is a circuit diagram of the control unit in the structure of the combined controller driving the high-side MOS of this utility model. Detailed Implementation
[0014] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments.
[0015] like Figure 1 As shown, the structure of this utility model, which combines a controller to drive a high-side MOS transistor, includes a BMS unit, an NMOS transistor, and a control unit. The drain of the NMOS transistor is connected to the positive terminal P+ of the battery module in the BMS unit. The source of the NMOS transistor is used to connect to the electrical device. The control unit is the controller of the electrical device. The gate of the NMOS transistor is connected to a driving module, which contains a power supply unit and a driving circuit. The input voltage PSystem of the power supply unit is generated by the BMS unit. The power supply unit converts the input voltage PSystem into the driving voltage boostv of the NMOS transistor. The driving voltage boostv is connected to the gate of the NMOS transistor through the driving circuit. The control unit sends a control enable Pmotor_Enable to the driving circuit. The BMS unit sends a control signal DSG to the driving circuit. When the driving circuit receives the control enable Pmotor_Enable and the control signal DSG, the driving voltage boostv reaches the gate of the NMOS transistor, and the NMOS transistor turns on.
[0016] In this embodiment, the electrical device is a scooter. The source of the NMOS transistor is connected to the scooter's motor, supplying high voltage to the motor. The specific circuit structure of the NMOS transistor's source and the scooter's motor is consistent with the existing technology of power transistor and motor connection structure, and is therefore not described in detail here. The control unit is the scooter's central control unit. In this embodiment, the central control unit is an MM32SPIN27PS MCU chip U4 and the peripheral circuitry used to drive its operation. The specific structure is as follows: Figure 7 As shown, this is existing technology and will not be elaborated further here.
[0017] In this embodiment, the BMS unit includes a low-voltage conversion unit, a battery module, and an AFE chip U1 of model SH367306. The circuit structure of the battery module is as follows: Figure 2 As shown, the peripheral circuit of AFE chip U1 is as follows: Figure 3 As shown, the structure of the low-voltage conversion unit is as follows: Figure 4 As shown, the connection method of the low-voltage conversion unit, battery module and AFE chip U1 is as follows: Figure 2 , Figure 3 Is and Figure 4 As shown.
[0018] like Figure 4As shown, the input terminal of the low-voltage conversion unit is connected to the positive terminal P+ of the battery module. After receiving the charging protection signal MCU_ChargeEnable and the control signal DSG generated by the control unit, the output terminal of the low-voltage conversion unit generates the input voltage PSystem. The low-voltage conversion unit includes PMOS transistors Q5 and Q6. The source of PMOS transistor Q5 is the input terminal of the low-voltage conversion unit. The source of PMOS transistor Q5 is connected to one end of resistor R3, the collector of transistor Q8, one end of resistor R4, and the cathode of diode D2. The other end of resistor R3 and the base of transistor Q8 are both connected to the cathode of diode D7. The anode of diode D7, the other end of resistor R4, and the anode of diode D2 are all connected to the gate of PMOS transistor Q5. The cathode of diode D7 is connected to one end of resistor R15, and the other end of resistor R15 is connected to the drain of NMOS transistor Q13. The gate of NMOS transistor Q13 is connected to the control signal DSG. The gate of NMOS transistor Q13 is also connected to one end of resistor R25. The source of NMOS transistor Q13 and the other end of resistor R25 are both grounded. The drain of PMOS transistor Q5 is connected to one end of resistor R6, the cathode of diode D4, and the source of PMOS transistor Q6. The other end of resistor R6 and the anode of diode D4 are both connected to the gate of PMOS transistor Q6. The gate of PMOS transistor Q6 is connected to one end of resistor R16, and the other end of resistor R16 is connected to the drain of NMOS transistor Q14. The gate of NMOS transistor Q14 is connected to the cathode of diode D44 and one end of resistor R26. The anode of diode D44 is used to receive the charging protection signal MCU_ChargeEnable. The other end of resistor R26 and the source of NMOS transistor Q14 are both grounded. The drain of PMOS transistor Q6 is the output input voltage PSystem. The source of PMOS transistor Q5 is connected to one end of capacitor C3, the other end of capacitor C3 is connected to one end of capacitor C4, and the other end of capacitor C4 is connected to the drain of PMOS transistor Q6.
[0019] like Figure 5 As shown, the power supply unit contains a voltage conversion chip U5, which converts the input voltage PSystem into a 12V voltage. This 12V voltage is connected to the anode of diode D17. The cathode of diode D17 is connected to the anode of diode D18, one end of capacitor C87, and one end of capacitor C89. The other ends of capacitors C87 and C89 form a BOOST_SW signal connected to voltage conversion chip U5. The cathode of diode D18 is connected to one end of capacitor C90 and one end of capacitor C91. The other ends of capacitors C90 and C91 are both grounded. The cathode of diode D18 generates a drive voltage boostv.
[0020] like Figure 6As shown, there are two NMOS transistors, namely NMOS transistor Q1 and NMOS transistor Q2. The drains of both NMOS transistor Q1 and NMOS transistor Q2 are connected to the positive terminal P+ of the battery module. The sources of both NMOS transistors Q1 and Q2 are used to connect to the electrical devices. The drains of both NMOS transistors Q1 and Q2 are connected to one end of capacitor C1. The other end of capacitor C1 is connected to one end of capacitor C2. The other end of capacitor C2 is connected to the source of both NMOS transistors Q1 and Q2. The driving circuits are all connected to the gates of NMOS transistors Q1 and Q2.
[0021] like Figure 6 As shown, the driving circuit includes transistor Q9 and resistor R9. One end of resistor R9 is connected to the driving voltage boostv and one end of resistor R13. The other end of resistor R9 is connected to the emitter of transistor Q9. The other end of resistor R13 is connected to the base of transistor Q9 and one end of resistor R23. The other end of resistor R23 is connected to the collector of transistor Q19. The base of transistor Q19 is connected to one end of resistor R30 and one end of resistor R34. The other end of resistor R30 is connected to the receive control enable Pmotor_Enable. The other end of resistor R36 is grounded. The emitter of transistor Q19 is connected to one end of resistor R33. The other end of resistor R33 is connected to the drain of NMOS transistor Q21. The gate of NMOS transistor Q21 is connected to the control signal DSG. The gate of NMOS transistor Q21 is connected to one end of resistor R42. The other end of resistor R42 and the source of NMOS transistor Q21 are both grounded. The collector of transistor Q9 is connected to the cathode of diode D8, the anode of diode D5, the base of transistor Q11, and one end of resistor R19. The anode of diode D8, the other end of resistor R19, and the collector of transistor Q11 are all connected to the source of the NMOS transistor. The emitter of transistor Q11 is connected to the gate of the NMOS transistor through a protection resistor. The cathode of diode D5 is connected to one end of resistor R10, and the other end of resistor R10 is connected to the emitter of transistor Q11.
[0022] This design employs a combination of PMOS and NMOS to drive the high-side MOS. The PMOS provides the low-voltage drive for the current circuit. When the system uses low-voltage power, it needs to convert the power supply to a suitable voltage. During this conversion, a charge pump is used to convert one of the voltages into a drive power source for the high-side NMOS. The MCU then drives this power source to drive the high-side NMOS. This satisfies both the current operating voltage requirements and the conditions for driving the high-side NMOS. If the PMOS fails, the high-side NMOS will not output high voltage due to the lack of power. This solution saves on external circuitry without affecting battery pack protection, bridging the gap with current mainstream solutions. It improves circuit compatibility and optimizes the product's application.
Claims
1. A structure combining a controller to drive a high-side MOS, comprising a BMS unit, characterized in that, It also includes an NMOS transistor and a control unit. The drain of the NMOS transistor is connected to the positive terminal P+ of the battery module in the BMS unit, and the source of the NMOS transistor is used to connect to the electrical device. The control unit is the controller of the electrical device. The gate of the NMOS transistor is connected to a driving module, which contains a power supply unit and a driving circuit. The input voltage PSystem of the power supply unit is generated by the BMS unit. The power supply unit converts the input voltage PSystem into the driving voltage boostv of the NMOS transistor. The driving voltage boostv is connected to the gate of the NMOS transistor through the driving circuit. The control unit sends a control enable Pmotor_Enable to the driving circuit. The BMS unit sends a control signal DSG to the driving circuit. When the driving circuit receives the control enable Pmotor_Enable and the control signal DSG, the driving voltage boostv reaches the gate of the NMOS transistor, and the NMOS transistor is turned on.
2. The structure of combining a controller to drive a high-side MOS as described in claim 1, characterized in that, There are two NMOS transistors, namely NMOS transistor Q1 and NMOS transistor Q2. The drains of NMOS transistor Q1 and NMOS transistor Q2 are both connected to the positive terminal P+ of the battery module. The sources of NMOS transistor Q1 and NMOS transistor Q2 are both used to connect to electrical devices. The drains of NMOS transistor Q1 and NMOS transistor Q2 are both connected to one end of capacitor C1. The other end of capacitor C1 is connected to one end of capacitor C2. The other end of capacitor C2 is connected to the source of NMOS transistor Q1 and the source of NMOS transistor Q2. The driving circuit is connected to the gate of NMOS transistor Q1 and the gate of NMOS transistor Q2.
3. The structure of combining a controller to drive a high-side MOS as described in claim 1, characterized in that, The power supply unit includes a voltage conversion chip U5, which converts the input voltage PSystem into a 12V voltage. The 12V voltage is connected to the anode of diode D17. The cathode of diode D17 is connected to the anode of diode D18, one end of capacitor C87, and one end of capacitor C89. The other ends of capacitors C87 and C89 form a BOOST_SW signal connected to the voltage conversion chip U5. The cathode of diode D18 is connected to one end of capacitor C90 and one end of capacitor C91. The other ends of capacitors C90 and C91 are both grounded. The cathode of diode D18 generates the driving voltage boostv.
4. The structure of combining a controller to drive a high-side MOS as described in claim 1, characterized in that, The driving circuit includes a transistor Q9 and a resistor R9. One end of resistor R9 is connected to the driving voltage boostv and one end of resistor R13, respectively. The other end of resistor R9 is connected to the emitter of transistor Q9. The other end of resistor R13 is connected to the base of transistor Q9 and one end of resistor R23. The other end of resistor R23 is connected to the collector of transistor Q19. The base of transistor Q19 is connected to one end of resistor R30 and one end of resistor R34, respectively. The other end of resistor R30 is connected to the control enable Pmotor_Enable. The other end of resistor R36 is grounded. The emitter of transistor Q19 is connected to one end of resistor R33. The other end of resistor R33 is connected to the drain of NMOS transistor Q21. The gate of NMOS transistor Q21 is connected to the control signal DSG, and the gate of NMOS transistor Q21 is connected to one end of resistor R42; the other end of resistor R42 and the source of NMOS transistor Q21 are both grounded; the collector of transistor Q9 is connected to the cathode of diode D8, the anode of diode D5, the base of transistor Q11, and one end of resistor R19, respectively; the anode of diode D8, the other end of resistor R19, and the collector of transistor Q11 are all connected to the source of the NMOS transistor; the emitter of transistor Q11 is connected to the gate of the NMOS transistor through a protection resistor; the cathode of diode D5 is connected to one end of resistor R10, and the other end of resistor R10 is connected to the emitter of transistor Q11.
5. The structure of combining a controller to drive a high-side MOS as described in claim 1, characterized in that, The BMS unit contains a low-voltage conversion unit. The input terminal of the low-voltage conversion unit is connected to the positive terminal P+ of the battery module. After receiving the charging protection signal MCU_ChargeEnable and the control signal DSG generated by the control unit, the output terminal of the low-voltage conversion unit generates the input voltage PSystem.
6. The structure of combining a controller to drive a high-side MOS as described in claim 5, characterized in that, The low-voltage conversion unit includes PMOS transistors Q5 and Q6. The source of PMOS transistor Q5 is the input terminal of the low-voltage conversion unit. The source of PMOS transistor Q5 is connected to one end of resistor R3, the collector of transistor Q8, one end of resistor R4, and the cathode of diode D2. The other end of resistor R3 and the base of transistor Q8 are both connected to the cathode of diode D7. The anode of diode D7, the other end of resistor R4, and the anode of diode D2 are all connected to the gate of PMOS transistor Q5. The cathode of diode D7 is connected to one end of resistor R15. The other end of resistor R15 is connected to the drain of NMOS transistor Q13. The gate of NMOS transistor Q13 is connected to the control signal DSG. The gate of NMOS transistor Q13 is connected to one end of resistor R25. The source of transistor Q13 and the other end of resistor R25 are both grounded; the drain of PMOS transistor Q5 is connected to one end of resistor R6, the cathode of diode D4, and the source of PMOS transistor Q6; the other end of resistor R6 and the anode of diode D4 are both connected to the gate of PMOS transistor Q6; the gate of PMOS transistor Q6 is connected to one end of resistor R16; the other end of resistor R16 is connected to the drain of NMOS transistor Q14; the gate of NMOS transistor Q14 is connected to the cathode of diode D44 and one end of resistor R26; the anode of diode D44 is used to receive the charging protection signal MCU_ChargeEnable; the other end of resistor R26 and the source of NMOS transistor Q14 are both grounded; the drain of PMOS transistor Q6 outputs the input voltage PSystem.
7. The structure of combining a controller to drive a high-side MOS as described in claim 6, characterized in that, The source of the PMOS transistor Q5 is connected to one end of the capacitor C3, the other end of the capacitor C3 is connected to one end of the capacitor C4, and the other end of the capacitor C4 is connected to the drain of the PMOS transistor Q6.