Semiconductor chip double-sided heat dissipation packaging structure and electronic device

Abstract

The utility model provides a kind of semiconductor chip double-sided heat dissipation packaging structure and electronic equipment, it is related to chip packaging technical field.The semiconductor chip double-sided heat dissipation packaging structure includes: substrate, chip, copper piece, first heat dissipation layer and second heat dissipation layer;Chip is connected on substrate, copper piece covers and connects chip, and copper piece is connected with substrate;First heat dissipation layer is connected on the surface of copper piece, and second heat dissipation layer is connected on the surface of substrate away from copper piece.The semiconductor chip double-sided heat dissipation packaging structure not only can realize double-sided heat dissipation, improve the heat dissipation efficiency, and easily realize that first heat dissipation layer and second heat dissipation layer are tightly engaged in corresponding heat dissipation structure interface, guarantee the stability of heat dissipation efficiency, production process is easily realized, and production cost is lower.

Description

Technical Field

[0001] This utility model relates to the field of chip packaging technology, and in particular to a semiconductor chip double-sided heat dissipation packaging structure and electronic device. Background Technology

[0002] In current chip packaging technology, single-sided heat dissipation remains the mainstream solution, primarily relying on the substrate or heat sink to achieve heat conduction in one direction. However, with the widespread application of high-power devices (such as gallium nitride (GaN) and silicon carbide (SiC) devices), their heat density continues to rise, making traditional single-sided heat dissipation methods insufficient to meet the ever-increasing heat dissipation demands. While increasing the thickness of the heat dissipation layer or using materials with high thermal conductivity can improve heat dissipation to some extent, this significantly increases manufacturing costs. Furthermore, the roughness of the heat dissipation structure interface and potential damage to the metal layer during processing can also adversely affect overall heat conduction efficiency. Utility Model Content

[0003] The purpose of this invention is to provide a semiconductor chip double-sided heat dissipation packaging structure and electronic device to alleviate the technical problem of poor heat dissipation performance of semiconductor chip packaging structures in the prior art.

[0004] In a first aspect, the semiconductor chip double-sided heat dissipation packaging structure provided by this utility model includes: a substrate, a chip, a copper component, a first heat dissipation layer, and a second heat dissipation layer; The chip is connected to the substrate, the copper component covers and connects to the chip, and the copper component is connected to the substrate; The first heat dissipation layer is connected to the surface of the copper component, and the second heat dissipation layer is connected to the surface of the substrate facing away from the copper component.

[0005] In conjunction with the first aspect, the present invention provides a first possible implementation of the first aspect, wherein the substrate, the chip, and the copper component are all encapsulated in a plastic encapsulation.

[0006] In conjunction with the first possible implementation of the first aspect, the present invention provides a second possible implementation of the first aspect, wherein the molding compound comprises an epoxy molding compound cured body.

[0007] In conjunction with the first possible implementation of the first aspect, the present invention provides a third possible implementation of the first aspect, wherein the encapsulation body is ground to expose the copper component, and the copper component has a flat and clean surface that engages with the first heat dissipation layer.

[0008] In conjunction with the first possible implementation of the first aspect, the present invention provides a fourth possible implementation of the first aspect, wherein the copper component is encapsulated to form the encapsulated body while covered with a high-temperature resistant film, and after the high-temperature resistant film is removed, the copper component has an exposed, flat, and clean surface that is bonded to the first heat dissipation layer.

[0009] In conjunction with the first aspect, this utility model provides a fifth possible implementation of the first aspect, wherein the substrate comprises a plurality of mutually isolated base islands.

[0010] In conjunction with the first aspect, this utility model provides a sixth possible implementation of the first aspect, wherein the substrate surface is provided with a plurality of independent solder portions, and the chip and the copper component are respectively connected to the corresponding solder portions.

[0011] In conjunction with the first aspect, this utility model provides a seventh possible implementation of the first aspect, wherein the surfaces of the first heat dissipation layer and the second heat dissipation layer are respectively coated with an adhesive, and the copper component is connected to the first heat dissipation layer and the second heat dissipation layer by the adhesive.

[0012] In conjunction with the seventh possible implementation of the first aspect, this utility model provides an eighth possible implementation of the first aspect, wherein the first heat dissipation layer and the second heat dissipation layer are respectively configured as a metal plating layer or a graphene thermal conductive layer.

[0013] Secondly, the electronic device provided by this utility model is equipped with the semiconductor chip double-sided heat dissipation packaging structure described in the first aspect.

[0014] The present invention provides the following beneficial effects: by connecting a chip to a substrate, covering the chip with a copper component, and connecting the copper component to the substrate, the first heat dissipation layer is connected to the surface of the copper component, and the second heat dissipation layer is connected to the surface of the substrate facing away from the copper component, not only can double-sided heat dissipation be achieved and the heat dissipation efficiency be improved, but it is also easy to achieve a tight bond between the first heat dissipation layer and the second heat dissipation layer at the corresponding heat dissipation structure interface, thus ensuring the stability of the heat dissipation efficiency.

[0015] To make the above-mentioned objectives, features and advantages of this utility model more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the specific embodiments or related technologies of this utility model, the drawings used in the description of the specific embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are some embodiments of this utility model. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0017] Figure 1 A schematic diagram of a double-sided heat dissipation packaging structure for a semiconductor chip provided in an embodiment of this utility model; Figure 2 A schematic diagram of the substrate and solder section of the semiconductor chip double-sided heat dissipation packaging structure provided in an embodiment of this utility model; Figure 3 A schematic diagram of the substrate and chip of the semiconductor chip double-sided heat dissipation packaging structure provided in the embodiments of this utility model; Figure 4 A schematic diagram of the substrate, chip, and adhesive of the semiconductor chip double-sided heat dissipation packaging structure provided in this embodiment of the utility model; Figure 5 A schematic diagram of the substrate, chip, and copper components of the semiconductor chip double-sided heat dissipation packaging structure provided in this embodiment of the utility model; Figure 6 A schematic diagram showing the semiconductor chip double-sided heat dissipation packaging structure provided in this embodiment of the utility model, in which the substrate, chip and copper components are all encapsulated by a plastic encapsulation. Figure 7 This is a schematic diagram of the semiconductor chip double-sided heat dissipation packaging structure provided in the embodiment of the present utility model before the addition of the first heat dissipation layer and the second heat dissipation layer.

[0018] Icons: 100-Substrate; 101-Solder section; 200-Chip; 300-Copper component; 400-First heat dissipation layer; 500-Second heat dissipation layer; 600-Molding body; 700-Adhesive. Detailed Implementation

[0019] The technical solution of this utility model will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this utility model. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this utility model.

[0020] In the description of this utility model, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the accompanying drawings and are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this utility model. Furthermore, the terms "first," "second," and "third" are only used to describe differences in name and should not be construed as indicating or implying relative importance. Physical quantities in formulas, unless otherwise specified, should be understood as basic quantities of the International System of Units (SI) base units, or derived quantities derived from basic quantities through mathematical operations such as multiplication, division, differentiation, or integration.

[0021] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.

[0022] like Figure 1 As shown, the semiconductor chip double-sided heat dissipation packaging structure provided in this embodiment includes: a substrate 100, a chip 200, a copper component 300, a first heat dissipation layer 400, and a second heat dissipation layer 500; the chip 200 is connected to the substrate 100, the copper component 300 covers and connects to the chip 200, and the copper component 300 is connected to the substrate 100; the first heat dissipation layer 400 is connected to the surface of the copper component 300, and the second heat dissipation layer 500 is connected to the surface of the substrate 100 facing away from the copper component 300.

[0023] Multiple chips 200 can be connected at intervals on the substrate 100, with any two adjacent chips 200 spaced apart. Heat from the chips 200 can be conducted to the first heat dissipation layer 400 via the copper component 300, and further conducted to the second heat dissipation layer 500 via the substrate 100, achieving efficient heat dissipation on both sides. Furthermore, the first heat dissipation layer 400 is connected to the copper component 300, and the second heat dissipation layer 500 is connected to the substrate 100. The interfaces of the heat dissipation structures corresponding to the first and second heat dissipation layers 400 and 500 are easily and tightly bonded, thus ensuring the stability of heat dissipation efficiency.

[0024] See Figure 1 , Figure 6 and Figure 7 In this embodiment of the utility model, the substrate 100, the chip 200 and the copper component 300 are all encapsulated by the molding compound 600.

[0025] Among them, the molding compound 600 includes a cured epoxy molding compound.

[0026] During processing, multiple independent solder portions 101 can be formed on the substrate 100 first. The solder portions 101 can be made of welding metal materials, epoxy resin adhesive, or other sintering materials, thereby forming... Figure 2 The substrate 100 is shown. See then... Figure 3 The chip 200 and the copper component 300 are respectively connected to the corresponding solder section 101. See [link / reference] Figure 4 Adhesive 700 is applied to the surfaces of multiple chips 200, and then copper components 300 are connected to the substrate 100 and the chips 200. See also Figure 4 and Figure 5 The copper component 300 is connected to the substrate 100 via the solder part 101, and the copper component 300 is connected to the chip 200 via the adhesive 700.

[0027] See Figure 6 During injection molding to form the encapsulation 600, the encapsulation 600 fills the space between two adjacent chips 200. The substrate 100 includes multiple isolated base islands, and the encapsulation 600 also fills the space between two adjacent base islands. Furthermore, the encapsulation 600 covers the sides of the copper component 300 and the surface facing away from the substrate 100 (see [link to encapsulation]). Figure 6 ).

[0028] Before connecting the first heat dissipation layer 400, the molding compound 600 should be ground so that the surface of the copper component 300 facing away from the substrate 100 is exposed (see [reference]). Figure 7 The copper component 300 is treated with processes such as plasma cleaning to give it a smooth and clean surface for bonding with the first heat dissipation layer 400, thereby ensuring a tight bond between the first heat dissipation layer 400 and the copper component 300 (see...). Figure 1 ).

[0029] In an optional embodiment, the copper component 300 is encapsulated to form a molded body 600 while covered with a high-temperature resistant film. After removing the high-temperature resistant film, the copper component 300 has a smooth and clean surface exposed and bonded to the first heat dissipation layer 400. The high-temperature resistant film can be a polyimide (PI) film with a working temperature greater than 180 degrees Celsius and is not adhered to by the molded body 600. By shielding the surface of the copper component 300 facing away from the substrate 100 with the high-temperature resistant film, the surface of the copper component 300 facing away from the substrate 100 can be exposed after the molded body 600 has cured. This eliminates the need for grinding the molded body 600 to expose the copper component 300, allowing it to be directly obtained during injection molding of the molded body 600. Figure 7 The structure shown allows for the subsequent attachment and fixation of the first heat dissipation layer 400 to the surface of the copper component 300 facing away from the substrate 100 (see [reference]). Figure 1 ).

[0030] Furthermore, the first heat dissipation layer 400 and the second heat dissipation layer 500 are respectively configured as metal plating layers or graphene thermally conductive layers. The metal plating layers can be selected from high thermal conductivity metal materials such as copper (Cu), aluminum (Al), and silver (Ag), and can be formed on the corresponding surface through processes such as electroplating, electroless plating, sputtering, or evaporation. The thickness can be adjusted according to actual thermal management requirements, typically controlled between 1 μm and 20 μm. The graphene thermally conductive layer can be formed using chemical vapor deposition (CVD) or coating processes, possessing excellent planar thermal conductivity and thinness, with a thickness generally between 0.1 μm and 5 μm. The first heat dissipation layer 400 and the second heat dissipation layer 500 are structurally independent, but work synergistically in the heat conduction path, forming a double-sided high-efficiency heat dissipation structure. Compared to traditional single-sided heat dissipation structures, this double-sided heat dissipation design can significantly improve the overall thermal conductivity of the packaging structure, allowing the heat generated by the chip components during operation to be quickly dissipated in both the top and bottom directions, thereby effectively reducing the chip operating temperature and improving the stability and lifespan of the device.

[0031] While ensuring overall thermal management performance, reducing the thickness of a single layer of heat dissipation material not only helps reduce material costs but also facilitates the thinning and high integration of the packaging structure. For example, in a traditional single-sided heat dissipation structure, the thickness of the heat dissipation layer may need to reach more than 20 μm, while in this embodiment, through double-sided collaborative heat dissipation, the thickness of each heat dissipation layer can be controlled within 10 μm, thereby optimizing material usage and controlling costs.

[0032] Furthermore, the materials chosen for the first heat dissipation layer 400 and the second heat dissipation layer 500 can differ. For example, the upper layer can use a graphene thermal conductive layer to achieve thin and efficient planar heat conduction, while the lower layer can use a metal plating layer to achieve efficient vertical heat conduction, thus achieving a composite heat dissipation structure with clear functional division and synergistic optimization. This material combination method can be flexibly configured according to the working environment, heat source distribution characteristics, and heat dissipation path of the packaging structure, exhibiting good adaptability and scalability. By configuring the first heat dissipation layer 400 and the second heat dissipation layer 500 as metal plating layers or graphene thermal conductive layers respectively, and adopting a double-sided synergistic heat dissipation design, the heat dissipation structure achieves thinness, cost optimization, and efficient thermal management without sacrificing heat dissipation performance, demonstrating promising engineering application prospects and industrialization value.

[0033] The electronic device provided in this embodiment of the present invention is equipped with the semiconductor chip double-sided heat dissipation packaging structure described in the above embodiments. The electronic device has the same technical effects as the semiconductor chip double-sided heat dissipation packaging structure, and will not be described again here.

[0034] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this utility model, and are not intended to limit it. Although the utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this utility model.

Claims

1. A double-sided heat dissipation packaging structure for a semiconductor chip, characterized in that, include: Substrate (100), chip (200), copper component (300), first heat dissipation layer (400) and second heat dissipation layer (500); The chip (200) is connected to the substrate (100), the copper component (300) covers and connects to the chip (200), and the copper component (300) is connected to the substrate (100); The first heat dissipation layer (400) is connected to the surface of the copper component (300), and the second heat dissipation layer (500) is connected to the surface of the substrate (100) facing away from the copper component (300).

2. The semiconductor chip double-sided heat dissipation packaging structure according to claim 1, characterized in that, The substrate (100), the chip (200) and the copper component (300) are all encapsulated in a molding compound (600).

3. The semiconductor chip double-sided heat dissipation packaging structure according to claim 2, characterized in that, The molding compound (600) includes a cured epoxy molding compound.

4. The semiconductor chip double-sided heat dissipation packaging structure according to claim 2 or 3, characterized in that, The encapsulation body (600) is ground to expose the copper component (300), and the copper component (300) has a flat, clean surface that engages with the first heat dissipation layer (400).

5. The semiconductor chip double-sided heat dissipation packaging structure according to claim 2 or 3, characterized in that, The copper component (300) is encapsulated to form the encapsulated body (600) while covered with a high-temperature resistant film. After the high-temperature resistant film is removed, the copper component (300) has a flat and clean surface that is exposed and bonded to the first heat dissipation layer (400).

6. The semiconductor chip double-sided heat dissipation packaging structure according to claim 1, characterized in that, The substrate (100) includes a plurality of base islands that are isolated from each other.

7. The semiconductor chip double-sided heat dissipation packaging structure according to claim 1 or 6, characterized in that, The substrate (100) has a plurality of independent solder sections (101) on its surface, and the chip (200) and the copper component (300) are respectively connected to the corresponding solder section (101).

8. The semiconductor chip double-sided heat dissipation packaging structure according to claim 1, characterized in that, The surfaces of the first heat dissipation layer (400) and the second heat dissipation layer (500) are respectively coated with adhesive (700), and the copper part (300) is connected to the first heat dissipation layer (400) and the second heat dissipation layer (500) through the adhesive (700).

9. The semiconductor chip double-sided heat dissipation packaging structure according to claim 8, characterized in that, The first heat dissipation layer (400) and the second heat dissipation layer (500) are respectively configured as a metal coating or a graphene thermal conductive layer.

10. An electronic device, characterized in that, The electronic device is equipped with a semiconductor chip double-sided heat dissipation packaging structure as described in any one of claims 1 to 9.

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