A magnetic random access memory based on a position-optimized magnetic shielding packaging structure
Patent Information
- Application Number
- CN202522181727.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-15
- Publication Date
- 2026-09-08
- Estimated Expiration
- 2035-10-15
AI Technical Summary
[0005]有鉴于此,本实用新型的目的在于提供一种基于位置优化的磁屏蔽封装结构及磁随机存储器,解决了现有技术中改进磁屏蔽结构的外形,导致磁屏蔽效率提升有限,且过于复杂的磁屏蔽结构会导致加工成本高的问题
[0023]As can be seen, the position-optimized magnetic shielding packaging structure provided by this utility model includes a chip, a lead frame, a molding compound, and a magnetic shielding structure with symmetrical upper and lower structures. A central symmetry plane is formed along the middle of the symmetrical upper and lower structures of the magnetic shielding structure. The chip is disposed within the space enclosed by the magnetic shielding structure and includes a magnetically sensitive layer. The distance between the magnetically sensitive layer and the central symmetry plane is less than a preset value. The preset value is a distance value set according to the minimum magnetic shielding efficiency requirement of the chip. The chip is electrically connected to the lead frame. The molding compound encapsulates the chip, lead frame, and magnetic shielding structure. By setting the magnetic shielding structure to be symmetrical upper and lower, and ensuring that the distance between the magnetically sensitive layer of the chip and the central symmetry plane is less than a preset value, this utility model enables the vertical component of the magnetic field at the location of the magnetically sensitive layer in the chip to cancel out, reducing the influence of the vertical magnetic field on the magnetically sensitive layer and improving the chip's antimagnetic performance.
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Figure CN224734162U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of chip packaging, and in particular to a position-optimized magnetic shielding packaging structure and a magnetic random access memory. Background Technology
[0002] Taking magnetic random access memory (MRM) as an example, existing MRMs record data using different orientations of magnetic moments. The data in an MRM is recorded by the relative orientation of a magnetic reference layer and a magnetic free layer. When the two layers are aligned, the element is in a low-resistance state, while when they are aligned in opposite directions, the element is in a high-resistance state. The stability of the magnetic free layer is relatively weak, so its magnetic moment direction can be changed in various ways to achieve data writing. However, external magnetic fields can significantly affect the stability of the magnetic free layer. Existing methods increase the write voltage to improve the stability of the magnetic free layer, but this reduces the number of write cycles or may lead to write errors. Conversely, reduced stability of the magnetic free layer can cause data storage errors in the chip. Therefore, effective shielding against external magnetic fields is necessary for MRMs.
[0003] The current main approach to external magnetic field shielding is to construct a high-permeability loop to wrap around the chip, thereby reducing the magnetic field at the chip. However, current methods focus on improving the shape of the magnetic shielding structure, resulting in limited improvement in magnetic shielding efficiency. Furthermore, overly complex magnetic shielding structures lead to high processing costs.
[0004] Therefore, how to effectively improve magnetic shielding efficiency without increasing the complexity of the magnetic shielding structure is a problem that urgently needs to be solved by those skilled in the art. Utility Model Content
[0005] In view of this, the purpose of this utility model is to provide a magnetic shielding packaging structure and magnetic random access memory based on position optimization, which solves the problems in the prior art where improving the shape of the magnetic shielding structure leads to limited improvement in magnetic shielding efficiency, and the overly complex magnetic shielding structure leads to high processing costs.
[0006] To solve the above-mentioned technical problems, this utility model provides a position-optimized magnetic shielding packaging structure, comprising:
[0007] The chip, lead frame, molding compound, and symmetrical magnetic shielding structure are provided; the magnetic shielding structure has a central symmetry plane formed along the middle of the symmetrical upper and lower structures.
[0008] The chip is disposed within the space enclosed by the magnetic shielding structure, and the chip includes a magnetically sensitive layer. The distance between the magnetically sensitive layer and the central symmetry plane is less than a preset value. The preset value is a distance value set according to the minimum magnetic shielding efficiency requirement of the chip.
[0009] The chip is electrically connected to the lead frame;
[0010] The molding compound encapsulates the chip, the lead frame, and the magnetic shielding structure within it.
[0011] Optionally, the distance between the magnetically sensitive layer and the central symmetry plane is less than or equal to five percent of the height of the space enclosed by the magnetic shielding structure.
[0012] Optionally, the magnetically sensitive layer coincides with the central symmetry plane.
[0013] Optionally, the height of the space enclosed by the magnetic shielding structure for placing the chip is equal to twice the sum of the chip's thickness and the adjustment margin value;
[0014] The adjustment margin is 50 micrometers to 200 micrometers.
[0015] Optionally, the chip is a magnetic random access memory chip;
[0016] The top surface of the magnetic random access memory chip coincides with the central symmetry plane.
[0017] Optionally, the magnetic shielding structure includes a bottom magnetic shielding layer, a top magnetic shielding layer, and a magnetic shielding structure sidewall disposed between the bottom magnetic shielding layer and the top magnetic shielding layer.
[0018] Optionally, the magnetic shielding structure includes a bottom magnetic shielding layer and a top magnetic shielding layer;
[0019] The bottom magnetic shielding layer is fixed to the lead frame, and the top magnetic shielding layer is suspended through the plastic encapsulation body, corresponding to the bottom magnetic shielding layer.
[0020] Optionally, the magnetic shielding structure is a soft magnetic material magnetic shielding structure.
[0021] Optionally, the chip is bonded to the lead frame via metal leads.
[0022] This invention also provides a magnetic random access memory, including multiple position-optimized magnetic shielding packaging structures as described above.
[0023] As can be seen, the position-optimized magnetic shielding packaging structure provided by this utility model includes a chip, a lead frame, a molding compound, and a magnetic shielding structure with symmetrical upper and lower structures. A central symmetry plane is formed along the middle of the symmetrical upper and lower structures of the magnetic shielding structure. The chip is disposed within the space enclosed by the magnetic shielding structure and includes a magnetically sensitive layer. The distance between the magnetically sensitive layer and the central symmetry plane is less than a preset value. The preset value is a distance value set according to the minimum magnetic shielding efficiency requirement of the chip. The chip is electrically connected to the lead frame. The molding compound encapsulates the chip, lead frame, and magnetic shielding structure. By setting the magnetic shielding structure to be symmetrical upper and lower, and ensuring that the distance between the magnetically sensitive layer of the chip and the central symmetry plane is less than a preset value, this utility model enables the vertical component of the magnetic field at the location of the magnetically sensitive layer in the chip to cancel out, reducing the influence of the vertical magnetic field on the magnetically sensitive layer and improving the chip's antimagnetic performance.
[0024] In addition, this invention also provides a magnetic random access memory, which has the same beneficial effects as described above. Attached Figure Description
[0025] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.
[0026] Figure 1 This is an example diagram for simulating the magnetic field around an existing magnetic shielding structure;
[0027] Figure 2 This is a graph showing the trend of magnetic flux density as a function of three-dimensional coordinates at the central symmetry plane of a symmetrical magnetic shielding structure with upper and lower structures, obtained after simulating the magnetic field around an existing magnetic shielding structure.
[0028] Figure 3 This is a graph showing the trend of magnetic flux density as a function of three-dimensional coordinates at a point off the central symmetry plane in a magnetically shielded structure with symmetrical upper and lower structures, obtained after simulating the magnetic field around an existing magnetic shielding structure.
[0029] Figure 4 A schematic diagram of a position-optimized magnetic shielding packaging structure provided for an embodiment of this utility model;
[0030] Figure 5 A schematic diagram of another position-optimized magnetic shielding packaging structure provided for an embodiment of this utility model;
[0031] The annotations in the attached figures are explained as follows:
[0032] I-lead frame, II-symmetrical magnetic shielding structure, III-chip, IV-magnetic sensitive layer, V-molded enclosure. Detailed Implementation
[0033] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.
[0034] Taking magnetic random access memory (MRM) as an example, existing MRMs record data using different orientations of magnetic moments. The data in an MRM is recorded by the relative orientation of a magnetic reference layer and a magnetic free layer. When the two layers are aligned, the element is in a low-resistance state, while when they are aligned in opposite directions, the element is in a high-resistance state. The stability of the magnetic free layer is relatively weak, so its magnetic moment direction can be changed in various ways to achieve data writing. However, external magnetic fields can significantly affect the stability of the magnetic free layer. Existing methods increase the write voltage to improve the stability of the magnetic free layer, but this reduces the number of write cycles or may lead to write errors. Conversely, reduced stability of the magnetic free layer can cause data storage errors in the chip. Therefore, effective shielding against external magnetic fields is necessary for MRMs.
[0035] Under an external horizontal magnetic field, within the horizontal plane of the middle of the magnetic shielding structure, due to the symmetry of the upper and lower structures, there is essentially no residual magnetism in the vertical direction. (Refer to...) Figure 1 and Figure 2 , Figure 1 This is an example diagram for simulating the magnetic field around an existing magnetic shielding structure. Figure 2 This is a graph showing the trend of magnetic flux density as a function of three-dimensional coordinates at the central symmetry plane of a symmetrical magnetic shielding structure (with symmetrical upper and lower structures) after magnetic field simulation around an existing magnetic shielding structure. Figure 2 The horizontal axis represents the distance from the initial point within the central plane of symmetry, and the vertical axis represents the magnetic flux density. When deviating from the central plane of symmetry, there is remanence in the vertical direction, such as... Figure 3 As shown, Figure 3 This is a graph showing the trend of magnetic flux density as a function of three-dimensional coordinates at locations deviating from the central plane of symmetry in a symmetrical magnetic shielding structure, obtained after simulating the magnetic field around an existing magnetic shielding structure. Figure 3The horizontal axis represents the distance from the initial point within the central plane of symmetry, while the vertical axis represents the magnetic flux density. Furthermore, as the distance from the central plane of symmetry increases, the ratio of the vertical to the horizontal components gradually increases, severely impacting the chip's antimagnetic capability. Therefore, placing the chip's magnetically sensitive layer at the central plane of symmetry in the magnetic shielding structure helps achieve optimized horizontal magnetic field shielding.
[0036] Please refer to Figure 4 , Figure 4 A schematic diagram of a position-optimized magnetic shielding packaging structure provided for an embodiment of this utility model may include:
[0037] Chip III, lead frame I, molding compound V, and magnetic shielding structure II with symmetrical upper and lower structures; the magnetic shielding structure forms a central symmetry plane along the middle of the upper and lower symmetrical structures;
[0038] Chip III is set within the space enclosed by the magnetic shielding structure, and chip III includes a magnetically sensitive layer IV. The distance between the magnetically sensitive layer IV and the central symmetry plane is less than a preset value. The preset value is a distance value set according to the minimum magnetic shielding efficiency requirement of chip III.
[0039] Chip III is electrically connected to lead frame I;
[0040] The molding compound V encapsulates the chip III, lead frame I, and magnetic shielding structure.
[0041] In this embodiment, a symmetrical magnetic shielding structure II can be positioned on the lead frame I. By setting the distance between the magnetic sensitive layer IV and the central symmetry plane to be less than a preset value, the influence of the vertical magnetic field on the magnetic sensitive layer IV can be reduced, thus improving the magnetic shielding effect of the magnetic shielding structure on the chip III within a preset range. It is foreseeable that the closer the magnetic sensitive layer IV is to the central symmetry plane, the smaller the influence of the vertical magnetic field on it. This embodiment balances the influence of the vertical magnetic field on the magnetic sensitive layer IV with the precision requirements of the chip III's placement. By setting the distance between the magnetic sensitive layer IV and the central symmetry plane to be less than a preset value, the ease of fabrication is ensured while reducing the influence of the vertical magnetic field on the chip III.
[0042] Furthermore, the minimum magnetic shielding efficiency requirement for chip III in this embodiment can be set by the operator based on the working scenario of chip III. It should also be noted that in this embodiment, the magnetically sensitive layer IV is a functional layer in chip III that is susceptible to magnetic field influences. It can be an active layer of chip III, or it can be the functional layer in chip III most affected by magnetic fields. For example, in an MRAM (Magnetic Random Access Memory) chip III, the magnetically sensitive layer IV can be a magnetic tunnel junction.
[0043] Furthermore, in order to ensure the magnetic shielding effect of the magnetic shielding structure on chip III, the distance between the magnetic sensitive layer IV and the central symmetry plane can be set to be less than or equal to five percent of the height of the space enclosed by the magnetic shielding structure.
[0044] In this embodiment, by setting the distance between the magnetically sensitive layer IV and the central symmetry plane to be less than or equal to five percent of the height of the space enclosed by the magnetic shielding structure, the shielding effect of the prepared magnetic shielding packaging structure on the chip III can be guaranteed. In particular, the influence of the vertical magnetic field on the magnetically sensitive layer IV is reduced, while the preparation of the magnetic shielding packaging structure is facilitated and the preparation complexity is reduced.
[0045] Furthermore, in order to minimize the influence of external magnetic fields on the magnetically sensitive layer IV, the magnetically sensitive layer IV can be arranged to coincide with the central symmetry plane.
[0046] In this embodiment, by setting the magnetic sensitive layer IV to coincide with the aforementioned central symmetry plane, since the vertical magnetic field cancels out at the central symmetry plane of the magnetic shielding structure II with symmetrical upper and lower structures, setting the magnetic sensitive layer IV at this central symmetry plane can minimize the influence of external magnetic fields on the magnetic sensitive layer IV and improve the magnetic shielding effect.
[0047] Furthermore, in order to ensure the magnetic shielding performance of the magnetic shielding structure for chip III, the magnetic shielding structure can be configured to include a bottom magnetic shielding layer, a top magnetic shielding layer, and a magnetic shielding structure sidewall disposed between the bottom magnetic shielding layer and the top magnetic shielding layer.
[0048] In this embodiment, by setting a magnetic shielding structure including a bottom magnetic shielding layer, a top magnetic shielding layer, and a magnetic shielding structure sidewall, a high magnetic shielding effect can be achieved for chip III, thereby improving the antimagnetic performance of chip III.
[0049] In one feasible embodiment, to reduce the fabrication cost of the magnetic shielding structure and improve its structural simplicity, reference can be made to... Figure 5 , Figure 5 This is a schematic diagram of another position-optimized magnetic shielding packaging structure provided for an embodiment of the present invention. The magnetic shielding structure may include a bottom magnetic shielding layer and a top magnetic shielding layer.
[0050] The bottom magnetic shielding layer is fixed on the lead frame I, and the top magnetic shielding layer is suspended through the encapsulation body V, corresponding to the bottom magnetic shielding layer.
[0051] In this embodiment, by setting the magnetic shielding structure to include only a bottom magnetic shielding layer and a top magnetic shielding layer, the amount of material used in fabricating the magnetic shielding structure is reduced, and the structural simplicity of the magnetic shielding structure is improved. Since no other magnetic shielding structure is set between the bottom magnetic shielding layer and the top magnetic shielding layer, the stability of the magnetic shielding structure is ensured by suspending the top magnetic shielding layer in the encapsulation body V.
[0052] Furthermore, in order to reduce the impact of interference magnetic field noise on chip III, the above-mentioned magnetic shielding structure can be set as a soft magnetic material magnetic shielding structure.
[0053] In this embodiment, by setting the magnetic shielding structure as a soft magnetic material magnetic shielding structure, the shielding effect on static magnetic fields and low-frequency magnetic fields can be improved, the influence of external interference magnetic field noise on chip III can be reduced, and thus the magnetic shielding performance can be improved.
[0054] Furthermore, in order to ensure the stability of the connection between chip III and lead frame I and reduce manufacturing costs, chip III can be bonded to lead frame I via metal leads.
[0055] In this embodiment, by setting chip III to be bonded to lead frame I via metal leads, the stability of the connection between chip III and lead frame I is improved, and the conduction efficiency is increased.
[0056] The position-optimized magnetic shielding packaging structure provided by this utility model includes a chip III, a lead frame I, a molding compound V, and a magnetic shielding structure II with symmetrical upper and lower structures. A central symmetry plane is formed along the middle of the symmetrical upper and lower structures in the magnetic shielding structure. The chip III is disposed within the space enclosed by the magnetic shielding structure, and the chip III includes a magnetically sensitive layer IV. The distance between the magnetically sensitive layer IV and the central symmetry plane is less than a preset value. The preset value is a distance value set according to the minimum magnetic shielding efficiency requirement of the chip III. The chip III is electrically connected to the lead frame I. The molding compound V encapsulates the chip III, the lead frame I, and the magnetic shielding structure. By setting the magnetic shielding structure to be symmetrical upper and lower, and the distance between the magnetically sensitive layer IV of the chip III and the central symmetry plane being less than the preset value, this utility model enables the vertical component of the magnetic field at the location of the magnetically sensitive layer IV in the chip III to cancel out, reducing the influence of the vertical magnetic field on the magnetically sensitive layer IV and improving the antimagnetic performance of the chip III.
[0057] Furthermore, by setting the distance between the magnetically sensitive layer IV and the central symmetry plane to be less than or equal to 5% of the height of the space enclosed by the magnetic shielding structure, this embodiment of the present invention can ensure the shielding effect of the prepared magnetic shielding packaging structure on the chip III, especially reducing the influence of the vertical magnetic field on the magnetically sensitive layer IV, while facilitating the preparation of the magnetic shielding packaging structure and reducing the complexity of preparation; by setting the magnetically sensitive layer IV to coincide with the aforementioned central symmetry plane, the influence of the external magnetic field on the magnetically sensitive layer IV can be minimized, thereby improving the magnetic shielding effect; by setting the magnetic shielding structure to include a bottom magnetic shielding layer, a top magnetic shielding layer, and a magnetic shielding structure sidewall, a high magnetic shielding effect on the chip III can be achieved. The shielding effect is improved, thereby enhancing the antimagnetic performance of chip III. By setting the magnetic shielding structure to include only a bottom magnetic shielding layer and a top magnetic shielding layer, the amount of material used in fabricating the magnetic shielding structure is reduced, improving the structural simplicity of the magnetic shielding structure. By suspending the top magnetic shielding layer in the molding compound V, the stability of the magnetic shielding structure is ensured. By setting the magnetic shielding structure to a soft magnetic material, the shielding effect against static magnetic fields and low-frequency magnetic fields can be improved, reducing the impact of external interference magnetic field noise on chip III, thereby improving the magnetic shielding performance. By setting chip III to be bonded to the lead frame I through metal leads, the stability of the connection between chip III and lead frame I is improved, and the conduction efficiency is increased.
[0058] Example 2:
[0059] The following describes another position-optimized magnetic shielding packaging structure provided by the present invention. The other position-optimized magnetic shielding packaging structure described below can be referred to in correspondence with the position-optimized magnetic shielding packaging structure described above.
[0060] The position-optimized magnetic shielding packaging structure provided in this embodiment differs from Embodiment 1 in that:
[0061] The height of the space enclosed by the magnetic shielding structure for placing chip III is equal to twice the thickness of chip III plus the adjustment margin value.
[0062] Adjust the margin from 50 micrometers to 200 micrometers.
[0063] In this embodiment, by setting the height of the space enclosed by the magnetic shielding structure for placing chip III to be equal to twice the thickness of chip III, plus an adjustment margin, chip III can be directly placed on the bottom surface of the packaging structure during fabrication without the need for additional height adjustments. Furthermore, the adjustment margin ensures that the distance between the magnetically sensitive layer IV of chip III and the aforementioned central symmetrical plane is less than a preset value, improving the ease of placement. This is particularly suitable for structures where the magnetically sensitive layer IV of chip III is located at or near the top.
[0064] Furthermore, in order to improve the fabrication efficiency of the magnetic shielding packaging structure, the aforementioned chip III can be configured as a magnetic random access memory chip III;
[0065] The top surface of the magnetic random access memory chip III coincides with the central symmetry plane.
[0066] It should be noted that in this embodiment, the top surface of the magnetic random access memory chip III coincides with the aforementioned central symmetry plane. The distance between the MTJ (Magnetic Tunnel Junction) structure of the magnetic random access memory chip III and the top of the chip III is small, which is less than the acceptable error range when the chip III is laid out. Therefore, directly setting the magnetic random access memory chip III to coincide with the aforementioned central symmetry plane can reduce the complexity of the fabrication while ensuring the antimagnetic effect of the chip III, thereby improving the fabrication efficiency.
[0067] The position-optimized magnetic shielding packaging structure provided in this embodiment includes a space enclosed by the magnetic shielding structure for placing chip III. The height of this space is equal to twice the thickness of chip III plus an adjustment margin of 50 to 200 micrometers. By setting the height of the space enclosed by the magnetic shielding structure to twice the thickness of chip III, plus an additional adjustment margin, chip III can be directly placed on the bottom surface of the packaging structure during fabrication without additional height adjustments. Furthermore, the adjustment margin ensures that the magnetically sensitive layer IV of chip III is positioned within a distance from the aforementioned central symmetry plane that is less than a preset value, improving placement convenience. In addition, by aligning the top surface of the magnetic random access memory chip III with the aforementioned central symmetry plane, this embodiment reduces fabrication complexity while maintaining the antimagnetic effect of chip III, thereby improving fabrication efficiency.
[0068] In one feasible embodiment, the above-described position-optimized magnetic shielding encapsulation structure may specifically include the following structure:
[0069] The chip, lead frame, molding compound, and symmetrical magnetic shielding structure are included; the magnetic shielding structure forms a central symmetry plane along the middle of the symmetrical upper and lower structures.
[0070] The chip is set within the space enclosed by the magnetic shielding structure, and the chip includes a magnetically sensitive layer that coincides with the central symmetry plane.
[0071] The chip is electrically connected to the lead frame;
[0072] The molding compound encapsulates the chip, lead frame, and magnetic shielding structure.
[0073] The magnetic shielding structure includes a bottom magnetic shielding layer, a top magnetic shielding layer, and a magnetic shielding structure sidewall disposed between the bottom magnetic shielding layer and the top magnetic shielding layer;
[0074] The magnetic shielding structure is made of soft magnetic material; the chip is bonded to the lead frame via metal leads.
[0075] The magnetic random access memory provided in the embodiments of this utility model is described below. The magnetic random access memory described below can be referred to in correspondence with the position-optimized magnetic shielding packaging structure described above.
[0076] The magnetic random access memory provided in this embodiment of the invention may include multiple magnetically shielded packaging structures as described above based on position optimization.
[0077] This embodiment further improves the optimization effect of the magnetic shielding structure by setting multiple position-optimized magnetic shielding encapsulation structures as described above in the magnetic random access memory, thereby improving the storage stability and read / write accuracy of the magnetic random access memory.
[0078] The magnetic random access memory (MRMemory) provided by this invention includes multiple position-optimized magnetic shielding packaging structures as described above. By symmetrically aligning the magnetic shielding structures vertically and ensuring the distance between the magnetically sensitive layer of the chip and the central symmetry plane is less than a preset value, this invention enables the vertical component of the magnetic field at the location of the magnetically sensitive layer to cancel out, reducing the influence of the vertical magnetic field on the magnetically sensitive layer and improving the chip's antimagnetic performance. Furthermore, by including multiple position-optimized magnetic shielding packaging structures as described above in the MRMemory, the optimization effect of the magnetic shielding structure is further improved, thereby enhancing the storage stability and read / write accuracy of the MRMemory.
[0079] The various embodiments in this specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.
[0080] Furthermore, it should be noted that in this document, relationships such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprising," "including," or any other variations are intended to cover non-exclusive inclusion.
[0081] The above provides a detailed description of a position-optimized magnetic shielding packaging structure and a magnetic random access memory provided by this utility model. Specific examples have been used to illustrate the principle and implementation of this utility model. The description of the above embodiments is only for the purpose of helping to understand the structure and core idea of this utility model. At the same time, for those skilled in the art, there will be changes in the specific implementation and application scope based on the idea of this utility model. Therefore, the content of this specification should not be construed as a limitation of this utility model.
Claims
1. A location-optimized magnetic shielding packaging structure, characterized by include: The chip, lead frame, molding compound, and symmetrical magnetic shielding structure are provided; the magnetic shielding structure has a central symmetry plane formed along the middle of the symmetrical upper and lower structures. The chip is disposed within the space enclosed by the magnetic shielding structure, and the chip includes a magnetically sensitive layer. The distance between the magnetically sensitive layer and the central symmetry plane is less than a preset value. The preset value is a distance value set according to the minimum magnetic shielding efficiency requirement of the chip. The chip is electrically connected to the lead frame; The molding compound encapsulates the chip, the lead frame, and the magnetic shielding structure within it.
2. The location-optimized magnetic shielding packaging structure according to claim 1, characterized in that, The distance between the magnetically sensitive layer and the central symmetry plane is less than or equal to five percent of the height of the space enclosed by the magnetic shielding structure.
3. The location-optimized magnetic shielding packaging structure according to claim 2, characterized in that, The magnetically sensitive layer coincides with the central symmetry plane.
4. The location optimization based magnetic shielding package structure of claim 1, wherein, The height of the space enclosed by the magnetic shielding structure for placing the chip is equal to twice the sum of the chip's thickness and the adjustment margin value. The adjustment margin is 50 micrometers to 200 micrometers.
5. The position-optimized magnetic shielding packaging structure according to claim 4, characterized in that, The chip is a magnetic random access memory chip; The top surface of the magnetic random access memory chip coincides with the central symmetry plane.
6. The location optimization based magnetic shielding package structure of claim 1, wherein, The magnetic shielding structure includes a bottom magnetic shielding layer, a top magnetic shielding layer, and a magnetic shielding structure sidewall disposed between the bottom magnetic shielding layer and the top magnetic shielding layer.
7. The location optimization based magnetic shielding packaging structure of claim 1, wherein, The magnetic shielding structure includes a bottom magnetic shielding layer and a top magnetic shielding layer; The bottom magnetic shielding layer is fixed to the lead frame, and the top magnetic shielding layer is suspended through the plastic encapsulation body, corresponding to the bottom magnetic shielding layer.
8. The location optimization based magnetic shielding package structure of claim 1, wherein, The magnetic shielding structure is a soft magnetic material magnetic shielding structure.
9. The location optimization based magnetic shielding packaging structure of claim 1, wherein, The chip is bonded to the lead frame via metal leads.
10. A magnetic random access memory, comprising: It includes multiple position-optimized magnetic shielding encapsulation structures as described in any one of claims 1 to 9.