A low parasitic inductance SiC power packaging module

Abstract

This utility model discloses a low parasitic inductance SiC power packaging module, including: a first substrate; a stacked busbar mounted on the first substrate, including a positive busbar and a negative busbar, with a gap between the positive busbar and the negative busbar, and an insulating layer in the gap, with spherical particles on the insulating layer; this application achieves precise control and stable maintenance of the busbar gap, which avoids the increase of parasitic inductance caused by excessive gap and eliminates the short circuit risk caused by excessively small gap.

Description

Technical Field

[0001] This utility model relates to the field of SiC packaging, and more particularly to a low parasitic inductance SiC power package module. Background Technology

[0002] Silicon carbide (SiC) power modules are power electronic devices made with silicon carbide (SiC) semiconductor material as the core. They are characterized by high efficiency, high power density and high temperature resistance, and are widely used in power electronic systems.

[0003] With the widespread application of wide bandgap semiconductor devices such as silicon carbide (SiC) MOSFETs, higher requirements are placed on packaging. It is necessary to have ultra-low parasitic inductance to suppress voltage overshoot and electromagnetic interference during high-frequency switching, and to achieve low thermal resistance to ensure heat dissipation and long-term reliability under high current conditions.

[0004] In traditional power modules, stacked busbars serve as conductive components. To achieve lower parasitic inductance, the area of ​​the stacked busbars is increased to enhance mutual inductance and reduce parasitic inductance. However, in practice, the busbar gap is difficult to control. If the gap is too large, the mutual inductance is small, but the parasitic inductance is large. If the gap is too small, there is a risk of contact circuit. Utility Model Content

[0005] To overcome the shortcomings of existing technologies where stacked busbars are used as conductive components in power modules, and to achieve lower parasitic inductance, the area of ​​the stacked busbars is increased to increase mutual inductance and reduce parasitic inductance. However, in practice, the busbar gap is not easy to control. If the gap is too large, the mutual inductance is small, but the parasitic inductance is large. If the gap is too small, there is a risk of contact with the circuit. This utility model provides a low parasitic inductance SiC power package module, including: Substrate layer; The stacked busbar is connected to the substrate and includes a positive busbar and a negative busbar. A gap is provided between the positive busbar and the negative busbar, and an insulating layer is provided in the gap. Spherical particles are provided on the insulating layer.

[0006] Optionally, the substrate layer includes a first substrate, a second substrate, and a third substrate. The second substrate is mounted on the first substrate, the stacked busbar is connected to the second substrate, and the second substrate is connected to the drive terminal through the third substrate.

[0007] Optionally, the second substrate is provided with multiple power chips, which are connected to the second substrate via leads.

[0008] Optionally, the second substrate has a first connection surface and a second connection surface, and multiple power chips are respectively provided on the first connection surface and the second connection surface.

[0009] Optionally, the stacked busbar also includes an AC output layer, with the positive busbar connected to the first connection surface of the second substrate, the negative busbar connected to the second connection surface of the second substrate, and the AC output layer connected to the first connection surface.

[0010] Optionally, it also includes a housing, in which the substrate layer and the stacked busbar are embedded and fixed.

[0011] Optionally, the drive terminal is mounted on the housing.

[0012] Optionally, the first substrate is an active metal brazed ceramic substrate.

[0013] Optionally, the outer casing is made of aluminum silicon carbide.

[0014] Optionally, the spherical particles are made of alumina or polyimide.

[0015] The beneficial effects of this utility model are as follows: This application achieves precise control and stable maintenance of the gap between the stacked busbars, avoiding both the increase in parasitic inductance caused by excessively large gaps and the short-circuit risk caused by excessively small gaps. The synergistic effect of the spherical particles and the insulating layer enhances the insulation stability under high-frequency operating conditions, while significantly reducing the loop inductance by optimizing the mutual inductance area. The module can maintain stable electrical performance under harsh conditions such as high temperature and vibration, providing reliable packaging protection for the high-frequency and high-efficiency operation of silicon carbide devices. Attached Figure Description

[0016] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0017] Figure 1 These are schematic diagrams of structures in some embodiments; Figure 2 These are cross-sectional views from some embodiments; Figure 3 These are exploded views of some embodiments; Figure 4 These are schematic diagrams of the stacked busbar structure in some embodiments.

[0018] Explanation of reference numerals in the attached figures: 1. Substrate layer; 2. Laminated busbar; 200. First substrate; 201. Second substrate; 202. Third substrate; 203. Drive terminal; 204. Spherical particle; 205. Power chip; 206. First connection surface; 207. Second connection surface; 208. Positive busbar; 209. Negative busbar; 210. AC output layer; 3. Housing. Detailed Implementation

[0019] The following will clearly and completely describe the concept, specific structure, and technical effects of this utility model in conjunction with embodiments and accompanying drawings, so as to fully understand the purpose, features, and effects of this utility model. Obviously, the described embodiments are only a part of the embodiments of this utility model, not all of them. Other embodiments obtained by those skilled in the art based on the embodiments of this utility model without creative effort are all within the scope of protection of this utility model. Furthermore, all connections / linkages involved in the patent do not simply refer to direct contact between components, but rather to the ability to form a better connection structure by adding or reducing connecting accessories according to specific implementation conditions. The various technical features in this utility model can be combined interactively without contradicting each other.

[0020] This utility model provides a low parasitic inductance SiC power package module, characterized in that it includes: a substrate layer 1; a stacked busbar 2 connected to the substrate, including a positive busbar 208 and a negative busbar 209, with a gap between the positive busbar 208 and the negative busbar 209, an insulating layer in the gap, and spherical particles 204 on the insulating layer.

[0021] Specifically, substrate layer 1 can be implemented using an active metal brazed ceramic substrate, forming a stable mounting plane through the high thermal conductivity of the ceramic material and the electrical conductivity of the metal layer. The laminated busbar 22 refers to a laminated structure containing positive and negative conductors. The positive busbar 208 and negative busbar 209 form a current loop through staggered lamination, reducing loop inductance by utilizing the mutual inductance effect between conductors. The insulating layer is a dielectric material layer that isolates the positive and negative busbars 209, and can be implemented using a polyimide film, maintaining stable insulation performance at high temperatures. The spherical particles 204 refer to rigid microspheres dispersed on the surface of the insulating layer, and can be implemented using alumina ceramic microspheres, ensuring precise control of the busbar gap through particle size uniformity.

[0022] Specifically, the positive busbar 208 and the negative busbar 209 are arranged parallel to each other on the surface of the substrate layer 1, and are electrically isolated from each other by an insulating layer. Spherical particles 204 are uniformly distributed on the surface of the insulating layer. During the busbar pressing process, the particles are squeezed by the upper and lower busbars, creating a mechanical limiting effect. The particle diameter determines the minimum spacing between the busbars, eliminating dimensional deviations caused by manual assembly. The regular arrangement of the particles on the surface of the insulating layer forms a support network, suppressing gap changes caused by thermal deformation of the busbars. When the module operates and generates mechanical vibration, the rigidity of the particles prevents short circuits in the busbar contacts, while maintaining a constant mutual inductance area to reduce parasitic inductance. The insulating layer and the spherical particles 204 are encapsulated with silicone gel.

[0023] In some cases, the insulating medium used in the laminated busbar 2, in addition to the preferred high-performance polymer film, can also be replaced with materials such as ceramic sheets that have high insulation strength and good thermal conductivity.

[0024] Compared to existing technologies, traditional methods rely on precision machining to control busbar gaps, but these methods are prone to dimensional instability due to material thermal expansion. Existing technologies use elastic fillers to adjust gaps, but this is susceptible to gap widening due to filler aging. This solution establishes a physical limiting mechanism using rigid spherical particles 204, automatically determining the gap size during assembly without complex machining processes. Compared to planar insulation layer structures, the particle-supported insulation layer forms a multi-point contact pattern, effectively dispersing mechanical stress and improving long-term reliability.

[0025] Through the above technical solution, this application achieves precise control and stable maintenance of the busbar gap, avoiding both the increase in parasitic inductance caused by excessively large gaps and the short-circuit risk caused by excessively small gaps. The synergistic effect of the spherical particles 204 and the insulating layer enhances the insulation stability under high-frequency operating conditions, while significantly reducing the loop inductance by optimizing the mutual inductance area. The module maintains stable electrical performance even under harsh conditions such as high temperature and vibration, providing reliable packaging protection for the high-frequency and high-efficiency operation of silicon carbide devices.

[0026] In some embodiments, the substrate layer 1 includes a first substrate 200, a second substrate 201 and a third substrate 202. The second substrate 201 is mounted on the first substrate 200. The stacked busbar 2 is connected to the second substrate 201. The second substrate 201 is connected to the driving terminal 203 through the third substrate 202.

[0027] The second substrate 201 is a metal substrate used for power current transmission, specifically a copper or aluminum substrate, used to carry the large current of the power circuit and reduce resistance loss. The third substrate 202 is an intermediate layer substrate used for drive signal transmission, specifically a copper-clad ceramic substrate, physically isolated from the second substrate 201 by insulating material, thereby reducing electromagnetic coupling between the drive circuit and the power circuit. The drive terminal 203 is a conductive interface for connecting to external drive circuits, specifically implemented with copper alloy pins, indirectly connected to the second substrate 201 through the third substrate 202, avoiding direct intersection of signal transmission path and power path. The multilayer busbar 2 is a conductive interface for connecting external loads or power supplies, specifically implemented with a multilayer copper busbar structure, directly soldered to the second substrate 201 to reduce contact resistance.

[0028] Specifically, the second substrate 201, serving as a power transmission layer, is directly electrically connected to the stacked busbar 2, forming a low-impedance, high-current path. The third substrate 202 is stacked on top of the first substrate 200, achieving electrical isolation through an insulating dielectric layer. The drive terminal 203 is fixed to the third substrate 202, forming an independent drive signal transmission path. This layered structure spatially separates the drive circuit and the power circuit, avoiding interference caused by electromagnetic coupling during high-frequency switching. Simultaneously, the fixed connection between the second substrate 201 and the first substrate 200 is achieved through mechanical pressing or welding, ensuring structural stability and overcoming the technological challenges of traditional single busbar gap control.

[0029] In some embodiments, a plurality of power chips 205 are provided on the second substrate 201, and the power chips 205 are connected to the second substrate 201 through leads.

[0030] The second substrate 201 refers to the conductive substrate that carries the power chip 205. It can be implemented using a copper-clad ceramic substrate or a metal-based composite material, with a conductive layer formed on its surface for electrical connection. The power chip 205 is a silicon carbide semiconductor device, specifically a SiC MOSFET or SiC diode, which achieves electrical conduction through a surface metallization layer and leads. Lead connection refers to the interconnection between the chip electrodes and the substrate conductive layer using metal wires. This can be accomplished using aluminum wire bonding or copper strip welding processes, with the current path controlled by adjusting the lead length and routing.

[0031] Specifically, multiple power chips 205 are distributed in an array on the surface of the second substrate 201, with the electrodes of each chip electrically connected to the conductive layer of the substrate via independent leads. This distributed layout ensures that the current paths between adjacent chips are independent, avoiding the strong electromagnetic coupling caused by the large-area parallel distribution of positive and negative conductors in traditional stacked busbars 2. The lead connection method allows the chip spacing to be flexibly adjusted according to thermal distribution requirements, reducing the overall package size while ensuring electrical insulation distance. The substrate, as a common terminal for current transmission, forms a low-impedance loop through multi-point connections, shortening the flow path of high-frequency current and thus reducing the parasitic inductance of the loop.

[0032] In some embodiments, the second substrate 201 is provided with a first connection surface 206 and a second connection surface 207, and a plurality of power chips 205 are respectively provided on the first connection surface 206 and the second connection surface 207.

[0033] Specifically, both sides of the front of the second substrate 201, which are equally spaced, are configured as mounting areas for power chips 205, with two sets of power chips 205 distributed on both sides of the substrate. During current transmission, the current loops formed by the power chips 205 on the two sides of the front divider cause the magnetic fields generated by adjacent loops to cancel each other out. Simultaneously, the double-sided layout shortens the spacing between the power chips 205 on the same substrate, forming a parallel current path structure, effectively reducing the electromagnetic radiation intensity of a single loop. The power chips 205 on both sides of the substrate are symmetrically connected to the positive busbar 208 and the negative busbar 209 via leads, respectively, forming a closed current loop.

[0034] In some embodiments, the stacked busbar 2 further includes an AC output layer 210, a positive busbar 208 connected to a first connection surface 206 of a second substrate 201, a negative busbar 209 connected to a second connection surface 207 of a second substrate 201, and an AC output layer 210 connected to the first connection surface 206.

[0035] The AC output layer 210 can be made of copper or aluminum to optimize current path distribution and participate in mutual inductance. The positive busbar 208 and negative busbar 209 are conductive components that connect to the positive and negative terminals of the power supply, respectively. They can be implemented using silver-plated copper plates, which are stacked to form a current loop. The positive busbar 208 and negative busbar 209 are also DC positive and DC negative busbars.

[0036] Specifically, the AC output layer 210 and the positive busbar 208 are arranged on the first connection surface 206 of the second substrate 201, forming two independent current input or output points. Current is shunt to the substrate surface through these two connectors, resulting in a more uniform lateral distribution of current density across the substrate and reducing localized heat accumulation. The negative busbar 209 is connected to the second substrate 201 or an external circuit layer, further extending the parallel structure of the current path and reducing loop inductance. Thus, the synergistic effect of multiple connectors disperses the current-carrying pressure of a single connection point, while the redundant design improves the vibration and thermal cycling resistance of the mechanical connections.

[0037] In some embodiments, a housing 3 is also included, in which the substrate layer 1 and the stacked busbar 2 are embedded and fixed.

[0038] The outer shell 3 refers to a rigid package that encloses the internal electronic components. It can be molded from engineering plastics or metal materials and is used to physically constrain the stacked busbar 2 and the substrate layer 1. Embedding refers to fixing the substrate layer 1 and the stacked busbar 2 as a whole inside the outer shell 3. This can be achieved through injection molding or pressing processes, so that the gaps between the busbars are completely filled and fixed by the material of the outer shell 3.

[0039] Specifically, the outer shell 3 uses a molding process to completely encapsulate the substrate layer 1 and the stacked busbar 2, filling and solidifying the gap between the positive busbar 208 and the negative busbar 209 with the material of the outer shell 3. The rigid structure of the outer shell 3 restricts the relative displacement of the busbars, maintaining a uniform distribution of the insulating layer and spherical particles 204 within the gap, preventing the gap from widening or narrowing due to vibration or thermal deformation. Simultaneously, the close contact between the outer shell 3 material and the busbar surface forms a physical isolation barrier, blocking external moisture or contaminants from intruding into the gap area and preventing short-circuit risks caused by localized breakdown of the insulating layer. The embedded outer shell 3 design simplifies the assembly process and reduces manufacturing costs while ensuring good mechanical strength and insulation performance, and maintains the same mounting interface and dimensions as the standard Economial package, facilitating compatibility and upgrades of existing systems.

[0040] In some cases, in addition to using an embedded housing design, injection-molded engineering plastics (such as polyphenylene sulfide PPS) can be used to further reduce costs, or metal-based composite materials (such as aluminum silicon carbide AlSiC) can be selected to enhance heat dissipation and mechanical rigidity.

[0041] In some embodiments, the drive terminal 203 is fixed to the housing 3.

[0042] Specifically, the drive terminal 203 is mechanically locked by being embedded in the fixing groove of the housing 3 and having the gap filled with epoxy resin. During module operation, the rigid support of the housing 3 suppresses the lateral displacement of the terminal, preventing the gap between the positive busbar 208 and the negative busbar 209 from changing due to external forces. When the power chip 205 switches at high frequency, the fixing structure reduces the contact resistance fluctuation at the connection between the busbar and the terminal, maintaining a uniform distribution of the insulation layer within the gap, thereby avoiding the risk of local electric field concentration or short circuit due to gap narrowing. At the same time, the thermal expansion coefficient of the housing 3 matches the internal substrate material, maintaining the gap size stability during temperature cycling, ensuring maximum mutual inductance effect to reduce parasitic inductance in the circuit.

[0043] In some embodiments, the first substrate 200 is an active metal brazing ceramic substrate.

[0044] Active metal brazing (AMB) ceramic substrates refer to composite substrates where ceramic materials are bonded to metal layers using an active metal brazing process. Specifically, this can be achieved using silicon carbide (Si3N4) ceramic substrates soldered with titanium-based brazing filler metal. This process creates a metallurgical bond between the ceramic and metal layers, enhancing interfacial bonding strength and preventing parasitic inductance fluctuations caused by substrate delamination. The active metal brazing process utilizes a filler metal containing active elements such as titanium and zirconium to react with the ceramic surface at high temperatures, forming chemical bonds. This can be achieved using vacuum brazing technology. This process reduces the difference in thermal expansion coefficients between the ceramic and metal layers, minimizing thermal stress and improving the substrate's mechanical stability at high temperatures. Specifically, the active metal brazing ceramic substrate rapidly dissipates the heat generated by the power chip 205 through its high thermal conductivity, maintaining the dimensional stability of the gap between the stacked busbars 2 and preventing gap shifts caused by temperature changes. The high insulation performance of the ceramic substrate ensures reliable isolation between the positive and negative busbars 209, forming a double protection together with the spherical particle 204 insulating layer in the gap. The substrate surface prepared by the active metal brazing process has higher flatness, providing a basis for the precise assembly of the stacked busbars 2, thereby ensuring the uniformity of the gap between the positive and negative busbars 209 and optimizing the mutual inductance effect to achieve a low parasitic inductance design. This AMB substrate not only has excellent thermal conductivity (≥110 W / m·K) for efficient heat conduction, but also significantly improves its structural strength and thermal fatigue reliability, thereby greatly reducing the junction-to-case thermal resistance (Rth(jc)) and improving the overall heat dissipation performance of the module.

[0045] In some cases, in cost-sensitive applications, aluminum nitride (AlN) ceramic can be used for the first substrate 200, but its thermal performance and overall reliability are slightly better than traditional alumina but still inferior to the optimal silicon nitride (Si3N4) ceramic solution.

[0046] In some embodiments, the spherical particles 204 are made of alumina or polyimide.

[0047] Among them, the spherical particles 204 refer to the geometric support structure uniformly distributed within the insulation layer. Specifically, they can be achieved using alumina ceramic spheres or polyimide plastic spheres with a diameter ranging from 0.1 to 0.5 mm. The regular arrangement of the particles forms a mechanical support effect. Alumina, as a high-hardness ceramic material, maintains structural stability under high-temperature environments; polyimide, as a high-temperature resistant polymer, absorbs stress differences between busbars through elastic deformation.

[0048] Specifically, spherical particles 204 are embedded within the insulation layer to form a spacer support network. The uniformity of particle diameter ensures that the gap between the positive busbar 208 and the negative busbar 209 remains constant. Alumina particles are fixed in the insulation layer matrix through a sintering process, forming a rigid support to prevent gap changes caused by vibration. Polyimide particles are injection molded and bonded to the insulation layer, utilizing the material's elasticity to compensate for displacement differences in the busbars caused by thermal expansion. Both materials use their own insulating properties to block leakage current paths between the busbars.

[0049] The above is a detailed description of the preferred embodiments of the present utility model. However, the present utility model is not limited to the described embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present utility model. All such equivalent modifications or substitutions are included within the scope defined by the claims of this application.

Claims

1. A low parasitic inductance SiC power package module, characterized in that, include: Substrate layer; The stacked busbar is connected to the substrate layer and includes a positive busbar and a negative busbar. A gap is provided between the positive busbar and the negative busbar, and an insulating layer is provided in the gap. Spherical particles are provided on the insulating layer.

2. The low parasitic inductance SiC power package module according to claim 1, characterized in that, The substrate layer includes a first substrate, a second substrate and a third substrate. The second substrate is mounted on the first substrate, the stacked busbar is connected to the second substrate, and the second substrate is connected to the drive terminal through the third substrate.

3. The low parasitic inductance SiC power package module according to claim 1, characterized in that, Multiple power chips are provided on the second substrate, and the power chips are connected to the second substrate through leads.

4. The low parasitic inductance SiC power package module according to claim 1, characterized in that, The second substrate has a first connection surface and a second connection surface, and multiple power chips are respectively provided on the first connection surface and the second connection surface.

5. The low parasitic inductance SiC power package module according to claim 2, characterized in that, The stacked busbar also includes an AC output layer. The positive busbar is connected to the first connection surface of the second substrate, the negative busbar is connected to the second connection surface of the second substrate, and the AC output layer is connected to the first connection surface.

6. The low parasitic inductance SiC power package module according to claim 5, characterized in that, It also includes a housing, in which the substrate layer and the stacked busbar are embedded and fixed.

7. The low parasitic inductance SiC power package module according to claim 1, characterized in that, The drive terminal is fixed on the housing.

8. The low parasitic inductance SiC power package module according to claim 1, characterized in that, The first substrate is an active metal brazed ceramic substrate.

9. The low parasitic inductance SiC power package module according to claim 6, characterized in that, The outer shell is made of aluminum silicon carbide.

10. The low parasitic inductance SiC power package module according to claim 1, characterized in that, The spherical particles are made of alumina or polyimide.

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