Dual transfer-resistant RFID tag
Patent Information
- Application Number
- CN202521858585.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-29
- Publication Date
- 2026-09-11
- Estimated Expiration
- 2035-08-29
AI Technical Summary
[0005]本实用新型的目的是通过采取外部特征参数识别和专用防转移凸块(Bump)并用的方式,解决芯片防转移问题,此方式具有极高的防转移识别率
[0015]本实用新型提出的有益效果在于:通过特殊试剂溶解导电胶以泡取芯片时,覆盖在防转移凸块上的绝缘材料会被一同溶解,再次覆晶封装时防转移凸块与标签天线之间会电性导通,环境参数凸块与可变纹路连接状态会发生变化,进而导致外部特征参数发生变化,从而认定电子标签芯片被转移重用。
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Figure CN224745380U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of radio frequency identification (RFID) tag technology, specifically a dual anti-transfer RFID tag. Background Technology
[0002] RFID tags mainly consist of two parts: a chip and an antenna. They are connected using flip-chip technology. The tags can be attached to items to prove their identity. They are commonly used in product traceability and anti-counterfeiting. The key point is to prevent RFID tags from being transferred and reused.
[0003] Currently, a common approach is to implement anti-transfer measures at the RFID tag antenna level. These measures include using fragile paper or ceramic substrates, designing easily damaged antenna lines, and pre-drilling vulnerable grooves during manufacturing. The aim is to damage the antenna and cause the tag to malfunction when it is transferred. This method is particularly effective in preventing the entire tag from being transferred and reused.
[0004] However, the drawback of the existing method is that the chip remains intact. Counterfeiters can use special reagents to soak the chip and then re-encapsulate it onto a new antenna, thereby achieving chip reuse. Therefore, this single method is one-sided and cannot completely prevent the transfer and reuse of RFID tags. Summary of the Invention
[0005] The purpose of this invention is to solve the chip anti-transfer problem by using external feature parameter recognition and a dedicated anti-transfer bump, which has an extremely high anti-transfer recognition rate.
[0006] To achieve the above objectives, this utility model provides the following technical solution: A dual anti-transfer RFID tag includes: an electronic tag chip, an electronic tag antenna, and an anisotropic conductive adhesive; The electronic tag chip has an RF bump, an environmental parameter bump, and an anti-transfer bump on the side near the electronic tag antenna, wherein the anti-transfer bump is provided with an insulating layer; the electronic tag chip also includes a logic circuit, which can detect the environmental parameters of the electronic tag chip and thus determine the transfer status of the RFID tag. The electronic tag antenna is connected to the radio frequency bump, environmental parameter bump, and anti-transfer bump via the anisotropic conductive adhesive.
[0007] Preferably, the electronic tag antenna includes: Antenna substrate; A conductive circuit layer is fixedly connected to the antenna substrate; Variable conductive texture is disposed on the inner side of the conductive loop layer; The conductive circuit layer is connected to the radio frequency bump via the anisotropic conductive adhesive; the variable conductive texture is connected to the environmental parameter bump and the anti-transfer bump corresponding to the conductive texture via the anisotropic conductive adhesive.
[0008] Preferably, the anisotropic conductive adhesive contains conductive particles, which achieve electrical conductivity between the electronic tag chip and the electronic tag antenna through hot pressing.
[0009] Preferably, the radio frequency bump is disposed on the outer edge of the electronic tag chip and is used to transmit and receive radio frequency signals.
[0010] Preferably, the environmental parameter bump is used to record the initial environmental parameters of the electronic tag chip.
[0011] Preferably, the insulating layer and the anisotropic conductive adhesive have the same solubility properties, and the dissolution of the insulating layer changes the environmental parameters of the electronic tag chip.
[0012] Preferably, the logic circuit includes a comparator; the inputs of the comparator are a reference voltage, a clock signal, a combined capacitor value, and a supply voltage through a resistor; the output of the comparator is a characteristic parameter.
[0013] Preferably, the combined capacitance value is obtained through the capacitor assembly of the logic circuit. The capacitor assembly includes several groups of grounded capacitors, wherein one end of each group of grounded capacitors is grounded and the other end is connected to the environmental parameter bump or the anti-transfer bump. The environmental parameter bump and the anti-transfer bump are connected to the comparator.
[0014] Preferably, the sizes of the several groups of grounding capacitors are all different.
[0015] The beneficial effects proposed by this utility model are as follows: when the conductive adhesive is dissolved by special reagent to extract the chip, the insulating material covering the anti-transfer bump will be dissolved together. When flip-chip is packaged again, the anti-transfer bump and the tag antenna will be electrically connected. The connection state between the environmental parameter bump and the variable texture will change, which will lead to changes in the external characteristic parameters, thereby determining that the electronic tag chip has been transferred and reused. Attached Figure Description
[0016] Figure 1 This is a schematic diagram of the structure of this utility model; Figure 2 for Figure 1 Schematic diagram of the antenna structure; Figure 3 for Figure 1 Schematic diagram of the connection between the chip and the antenna; Figure 4for Figure 3 Enlarged view of the connection structure at point A in the middle; Figure 5 for Figure 1 A schematic diagram of a logic circuit.
[0017] In the diagram: 1. Electronic tag chip, 2. RF bump, 3. Environmental parameter bump, 4. Anti-transfer bump, 5. Insulating layer, 6. Conductive particles, 7. Conductive circuit layer, 8. Antenna substrate, 9. Variable conductive texture, 10. Anisotropic conductive adhesive, 11. Comparator, 12. Capacitor assembly, 13. Resistor. Detailed Implementation
[0018] The present invention will be further described below with reference to the accompanying drawings:
[0019] This embodiment:
[0020] Please see Figure 1-5 In this embodiment: a dual anti-transfer RFID tag, the RFID tag includes: an electronic tag chip 1, an electronic tag antenna, and an anisotropic conductive adhesive 10.
[0021] Specifically, the electronic tag chip 1 and the electronic tag antenna are processed into an RFID tag using a flip-chip packaging method.
[0022] In this embodiment, the electronic tag chip 1 is provided with an radio frequency bump 2, an environmental parameter bump 3 and an anti-transfer bump 4 on the side near the electronic tag antenna, wherein the anti-transfer bump 4 is provided with an insulating layer 5.
[0023] In this embodiment, the radio frequency bump 2 is disposed on the outer edge of the electronic tag chip 1 and is used to transmit and receive radio frequency signals.
[0024] As some optional implementations of this embodiment, the radio frequency bumps 2 are disposed on the four corners of the electronic tag chip 1.
[0025] In this embodiment, the environmental parameter bump 3 is used to record the initial environmental parameters of the electronic tag chip 1.
[0026] In this embodiment, the insulating layer 5 and the anisotropic conductive adhesive 10 have the same dissolution characteristics. After the insulating layer 5 dissolves, the environmental parameters of the electronic tag chip 1 change.
[0027] In this embodiment, the electronic tag chip 1 also includes a logic circuit, which can detect the environmental parameters of the electronic tag chip 1 and thus determine the transfer status of the RFID tag.
[0028] Specifically, since the anti-transfer bump 4 is provided with an insulating layer 5, and the insulating layer 5 has the same characteristics as the anisotropic conductive adhesive 10, when the anisotropic conductive adhesive 10 is dissolved with a specific reagent to soak the electronic tag chip 1, the insulating layer 5 is also dissolved at the same time. After flip-chip encapsulation, electrical conduction occurs between the anti-transfer bump 4 and the electronic tag antenna, and the environmental parameters of the electronic tag chip 1 change. Therefore, it can be determined that the electronic tag chip 1 has been transferred and reused, that is, the RFID tag has been transferred and reused.
[0029] In this embodiment, the electronic tag antenna is connected to the radio frequency bump 2, the environmental parameter bump 3, and the anti-transfer bump 4 via the anisotropic conductive adhesive 10.
[0030] Specifically, the electronic tag antenna includes: 1) Antenna substrate 8.
[0031] 2) The conductive circuit layer 7 is fixedly connected to the antenna substrate 8.
[0032] 3) Variable conductive texture 9 is set on the inner side of conductive circuit layer 7.
[0033] The conductive circuit layer 7 is connected to the radio frequency bump 2 via anisotropic conductive adhesive 10; the variable conductive texture 9 is connected to the environmental parameter bump 3 and the anti-transfer bump 4 corresponding to the conductive texture via anisotropic conductive adhesive 10.
[0034] In this embodiment, different batches of chips can use different variable conductive textures 9 to connect each batch of chips with different environmental parameter bumps 3 and anti-transfer bumps 4, thereby further improving the anti-transfer reuse recognition rate of RFID tags.
[0035] Specifically, the electronic tag antenna is bonded to the environmental parameter bump 3 on the electronic tag chip 1 via the variable conductive texture 9, thereby achieving electrical conductivity between the electronic tag antenna and the environmental parameter bump 3. Furthermore, the electronic tag antenna is also bonded to the anti-transfer bump 4 on the electronic tag chip 1 via the variable conductive texture 9. Since the anti-transfer bump 4 has an insulating layer 5, the electronic tag antenna and the electronic tag chip 1 will not achieve electrical conductivity through the anti-transfer bump 4. If the electronic tag antenna and the electronic tag chip 1 achieve electrical conductivity through the anti-transfer bump 4, i.e., the insulating layer 5 is damaged, it can be considered that the electronic tag chip 1 has been transferred and reused, thus confirming that the RFID tag has been transferred and reused.
[0036] In this embodiment, conductive particles 6 are disposed inside the anisotropic conductive adhesive 10. The conductive particles 6 achieve electrical conduction between the electronic tag chip 1 and the electronic tag antenna by hot pressing.
[0037] In this embodiment, the logic circuit includes a comparator 11; the inputs of the comparator 11 are a reference voltage Vref (Voltage Reference), a clock signal CLK (Clock Signal), a combined capacitor value, and a supply voltage VCC (Voltage Common Collector) through resistor 13; the output of the comparator 11 is the characteristic parameter Data.
[0038] Specifically, the reference voltage is input to one input terminal of comparator 11, and the combined capacitance value and the supply voltage through resistor 13 are input to the other input terminal of comparator 11. The clock signal is used to control comparator 11 to periodically detect the combined capacitance value. The combined capacitance value is the environmental parameter of the electronic tag chip 1.
[0039] In this embodiment, the combined capacitance value is obtained through the capacitor component 12 of the logic circuit. The capacitor component 12 includes several groups of grounded capacitors, wherein one end of each group of grounded capacitors is grounded, and the other end of each group of grounded capacitors is connected to the environmental parameter bump 3 or the anti-transfer bump 4. The environmental parameter bump 3 or the anti-transfer bump 4 is connected to the comparator 11.
[0040] Specifically, the environmental parameter bumps 3 and the anti-transfer bumps 4 are randomly arranged. Upon initial power-on, the initial environmental parameters of the electronic tag chip 1 (i.e., the value of the grounding capacitor connected to the environmental parameter bumps 3) are collected and recorded. When the application starts working, the environmental parameter values of the electronic tag chip 1 are re-detected and compared with the initial environmental parameter values. If the environmental parameter values change (i.e., the values of some or all of the anti-transfer bumps 4 and the grounding capacitors connected to the environmental parameter bumps 3), it proves that the insulating layer 5 on the anti-transfer bumps 4 has been damaged. This indicates that the electronic tag chip 1 has been transferred and reused, thus confirming that the RFID tag has been transferred and reused. There are N (N≥1) environmental parameter bumps 3. Using multiple environmental parameter bumps 3 can increase the possibility of environmental parameter changes after repackaging, thereby improving the anti-transfer recognition rate. There are M (M≥1) anti-transfer bumps 4. Using multiple anti-transfer bumps 4 can improve the recognition rate of electrical on / off changes. In this way, when the connection of the anisotropic conductive adhesive 10 is broken by a specific reagent to extract the electronic tag chip 1, the insulating layer 5 is dissolved, the on / off combination of the electronic tag antenna and the anti-transfer bump 4 changes, and electrical conduction occurs between the electronic tag antenna and the anti-transfer bump 4, thereby changing the physical state of the electronic tag chip 1 and improving the sensitivity of repackaging recognition.
[0041] As some optional implementations of this embodiment, assuming the use of N=4 environmental parameter bumps 3 and M=5 anti-transfer bumps 4, the capacitor assembly is as follows: Figure 5 As shown, flip-chip packaging can result in... With different combinations of states, if the initial state is configured as 000111, then except for the case that is exactly the same as the initial state, all can be identified as transfer reuse. Therefore, the success probability among the possible states of transfer reuse is less than 0.8%. Furthermore, even in this extremely low probability case, if the insulating layer 5 of the anti-transfer bump 4 without a connected capacitor is dissolved, it is directly judged as a failure.
[0042] In this embodiment, the values of the several sets of grounding capacitors are all different, that is, different combined capacitance values can be generated under different external environmental conditions. Among them, when the grounding capacitance value is 0, one end of the environmental parameter bump 3 or the anti-transfer bump 4 is grounded, and the other end is connected to the comparator 11.
[0043] As an optional implementation of this embodiment, the capacitor assembly 12 may be composed of N=5 environmental parameter bumps 3 and M=5 anti-transfer bumps 4 arranged randomly, wherein the capacitance value of bump N1 is 0, the capacitance value of N2 is 4, the capacitance value of N3 is 10, the capacitance value of N4 is 1, the capacitance value of N5 is 2, the capacitance value of M1 is 2, the capacitance value of M2 is 0, the capacitance value of M3 is 9, the capacitance value of M4 is 6, and the capacitance value of M5 is 7.
[0044] As another optional implementation of this embodiment, the capacitor assembly 12 may be composed of N=6 environmental parameter bumps 3 and M=7 anti-transfer bumps 4 arranged randomly, wherein the capacitance value of bump N1 is 10, the capacitance value of N2 is 5, the capacitance value of N3 is 18, the capacitance value of N4 is 100, the capacitance value of N5 is 0, the capacitance value of N6 is 35, the capacitance value of M1 is 21, the capacitance value of M2 is 3, the capacitance value of M3 is 43, the capacitance value of M4 is 0, the capacitance value of M5 is 68, the capacitance value of M6 is 102, and the capacitance value of M7 is 0.
[0045] Specifically, the internal circuit determines changes in environmental parameters of the electronic tag chip 1 based on the on / off state of the identified capacitor component 12, thereby improving the accuracy of identifying changes in environmental parameters. Different batches of chips can use different capacitor components 12 and different variable conductive ripples 9. In this way, the electronic tag chip 1 can collect different environmental characteristic parameters when it is first powered on, and batch-to-batch variations can be achieved during application, further improving the anti-counterfeiting and anti-transfer identification capabilities of RFID tags. This chip, based on dual chip anti-transfer technology and further implementing a multi-layered three-dimensional protection mechanism, has almost no possibility of successful transfer and reuse. In this way, it has an extremely high chip anti-transfer identification rate, thus realizing the function of chip anti-transfer and reuse.
[0046] Working principle: When using the RFID tag with dual chip anti-transfer technology, the electronic tag chip 1 is placed on the corresponding position of the conductive circuit layer 7, and the electronic tag chip 1 is adhered to the conductive circuit layer 7 using anisotropic conductive adhesive 10. The anisotropic conductive adhesive 10 contains conductive particles 6. After being hot-pressed, the conductive particles 6 can achieve electrical conduction between the electronic tag chip 1 and the electronic tag antenna, that is, electrical conduction between the radio frequency bump 2 and the environmental parameter bump 3 and the conductive circuit layer 7.
[0047] After the special solvent dissolves the conductive adhesive around the chip, the insulating layer 5 on the anti-transfer bump 4 will also be dissolved, causing electrical conduction between the electronic tag antenna and the anti-transfer bump 4. This changes the state of the capacitor component 12, and the logic circuit of the electronic tag chip 1 can identify the current RFID tag as an electronic tag that has been transferred and reused by changing the state of the capacitor component 12.
[0048] Although the present invention has been illustrated and described with reference to preferred embodiments, those skilled in the art should understand that various changes in form and detail are possible within the scope of the claims.
Claims
1. A dual anti -skimming RFID tag, characterized by, include: Electronic tag chip (1), electronic tag antenna and anisotropic conductive adhesive (10); The electronic tag chip (1) has an RF bump (2), an environmental parameter bump (3) and an anti-transfer bump (4) on the side near the electronic tag antenna, wherein the anti-transfer bump (4) is provided with an insulating layer (5); the electronic tag chip (1) also includes a logic circuit, through which the environmental parameters of the electronic tag chip (1) can be detected, thereby determining the transfer status of the RFID tag; The electronic tag antenna is connected to the radio frequency bump (2), the environmental parameter bump (3), and the anti-transfer bump (4) through the anisotropic conductive adhesive (10).
2. The dual anti-skid RFID tag of claim 1, wherein: The electronic tag antenna includes: Antenna substrate (8); The conductive circuit layer (7) is fixedly connected to the antenna substrate (8); Variable conductive texture (9) is disposed on the inner side of the conductive loop layer (7); The conductive circuit layer (7) is connected to the radio frequency bump (2) through the anisotropic conductive adhesive (10); the variable conductive texture (9) is connected to the environmental parameter bump (3) and the anti-transfer bump (4) corresponding to the conductive texture through the anisotropic conductive adhesive (10).
3. The dual anti-skid RFID tag of claim 1, wherein: The anisotropic conductive adhesive (10) contains conductive particles (6), which achieve electrical conduction between the electronic tag chip (1) and the electronic tag antenna by hot pressing.
4. The dual anti-skid RFID tag of claim 1, wherein: The radio frequency bump (2) is disposed on the outer edge of the electronic tag chip (1) and is used to transmit and receive radio frequency signals.
5. The dual anti-skid RFID tag of claim 1, wherein: The environmental parameter bump (3) is used to record the initial environmental parameters of the electronic tag chip (1).
6. The dual tamper-evident RFID tag of claim 1, wherein: The insulating layer (5) has the same solubility characteristics as the anisotropic conductive adhesive (10). After the insulating layer (5) dissolves, the environmental parameters of the electronic tag chip (1) change.
7. The dual tamper-evident RFID tag of claim 1, wherein: The logic circuit includes a comparator (11); the inputs of the comparator (11) are a reference voltage, a clock signal, a combined capacitor value, and a supply voltage through a resistor (13); the output of the comparator (11) is a characteristic parameter.
8. The dual tamper-evident RFID tag of claim 7, wherein: The combined capacitance value is obtained through the capacitor assembly (12) of the logic circuit. The capacitor assembly (12) includes several groups of grounded capacitors, wherein one end of each group of grounded capacitors is grounded and the other end is connected to the environmental parameter bump (3) or the anti-transfer bump (4). The environmental parameter bump (3) and the anti-transfer bump (4) are connected to the comparator (11).
9. The dual anti-skid RFID tag of claim 8, wherein: The capacitance values of the several groups of grounding capacitors are all different.