Synchronous rectification circuit for suppressing noise and ripple of a step-down switching power supply and electronic product thereof

Abstract

This application discloses a synchronous rectification circuit and its electronic product for suppressing noise and ripple in a buck switching power supply. The circuit includes: a synchronous rectification Buck main circuit, comprising a first switching transistor, a second switching transistor, a high-side drive sub-circuit, a low-side drive sub-circuit, and an input filter capacitor; the drains of the first and second switching transistors are connected to the power input terminal; a first-stage filter circuit is connected between the common node of the drains of the first and second switching transistors and ground; a second-stage filter circuit is connected between the output terminal of the first-stage filter circuit and the power output terminal; a third-stage filter circuit is connected between the output terminal of the second-stage filter circuit and ground; a fourth-stage filter circuit has its input terminal connected between the output terminal of the third-stage filter circuit and ground; and a fifth-stage filter circuit has its input terminal connected to the output terminal of the fourth-stage filter circuit. This application provides a power supply circuit structure that can specifically suppress the conduction of MHz-level high-frequency switching noise without significantly increasing cost and design complexity.

Description

Technical Field

[0001] This application relates to the field of non-isolated buck switching power supply technology, and in particular to a synchronous rectifier circuit and electronic product thereof for suppressing noise and ripple in buck switching power supplies. Background Technology

[0002] In the field of low-voltage non-isolated buck switching power supplies, synchronous rectified Buck circuits are widely used in power supply systems for digital systems, analog circuits, and RF modules due to their high efficiency. However, insufficient suppression of conducted high-frequency switching noise has become a key defect restricting the purity of the power supply.

[0003] like Figure 1 As shown, in the cascaded scheme of a conventional Buck circuit and a linear regulator (LDO), significant high-frequency noise still exists at the output. Figure 1 The measured peak-to-peak value reached 139.43mV, which is mainly caused by the rapid switching behavior of the switching node (SW), which excites the resonance of parasitic inductance and capacitance (e.g., Figures 2-3 As shown), it generates MHz-level high-frequency spikes; while the LDO's power supply rejection ratio (PSRR) at high frequencies decreases sharply (as shown). Figure 4 As shown), this prevents it from effectively filtering out noise components >100kHz. Such high-frequency noise can interfere with subsequent sensitive circuits (such as ADCs and RF modules) through conduction paths, causing logic errors (such as...). Figure 1 (as shown by the voltage fluctuations), and exacerbate electromagnetic compatibility (EMI) risks.

[0004] While existing technologies attempt to improve performance by optimizing PCB layout, selecting wide-bandgap semiconductors (such as GaN), or adding filter capacitors, these methods suffer from drawbacks such as high cost, limited high-frequency suppression, or increased design complexity.

[0005] Therefore, there is an urgent need for a power supply circuit structure that can specifically suppress the conduction of MHz-level high-frequency switching noise without significantly increasing cost and design complexity. Utility Model Content

[0006] To address the shortcomings of existing technologies and to provide a power supply circuit structure that can specifically suppress the conduction of MHz-level high-frequency switching noise without significantly increasing cost and design complexity, this application provides a synchronous rectification circuit and its electronic product for suppressing noise and ripple in a buck switching power supply.

[0007] In a first aspect, this application provides a synchronous rectification circuit for suppressing noise and ripple in a buck switching power supply, employing the following technical solution: Synchronous rectification circuit for suppressing noise and ripple in buck switching power supplies, including: The synchronous rectification Buck main circuit includes a first switching transistor, a second switching transistor, a high-side driving sub-circuit, a low-side driving sub-circuit, and an input filter capacitor; the drains of the first and second switching transistors are connected to the power input terminal, the sources are connected to the output terminals of the high-side driving sub-circuit and the low-side driving sub-circuit, respectively, and the gates are connected to the output terminals of the high-side driving sub-circuit and the low-side driving sub-circuit, respectively. A primary filter circuit is connected between the common drain node of the first and second switching transistors and ground; the common drain node of the first and second switching transistors is the SW switch node. A secondary filter circuit is connected between the output terminal of the primary filter circuit and the power output terminal. A third-stage filter circuit is connected between the output terminal of the second-stage filter circuit and ground. The four-stage filter circuit includes an active transient suppression unit, with its input terminal connected between the output terminal of the three-stage filter circuit and ground. The five-stage filter circuit includes a linear regulator, the input of which is connected to the output of the four-stage filter circuit, and the output serves as the power supply output.

[0008] By adopting the above technical solution, the synchronous rectification Buck main circuit controls the complementary conduction of the first and second switching transistors through the high-side drive sub-circuit and the low-side drive sub-circuit, achieving efficient voltage conversion. The synchronous rectification Buck main circuit is used to complete the basic step-down conversion. The first-stage filter circuit is directly connected in parallel between the switching node (SW) and ground to absorb high-frequency spikes and form a high-frequency noise absorption path to suppress the resonant noise caused by the switching of the first and second switching transistors in the synchronous rectification Buck main circuit. The second-stage filter circuit reduces mid-to-low frequency conducted noise, easing the burden on subsequent high-frequency suppression. The third-stage filter circuit blocks the conduction path of high-frequency noise to the linear regulator LDO. The active transient suppression unit in the fourth-stage filter circuit, such as the Darlington transistor, dynamically responds to load changes or sudden interference, bypassing transient spikes to ground and suppressing background technology. Figure 1 The voltage jump-type logic error shown is addressed by the five-stage filter circuit, which utilizes the high PSRR characteristics of a linear regulator (LDO) (especially 60-80dB in the low-frequency range) to finally regulate the pre-filtered signal and achieve ultra-low ripple output. The first three passive networks progressively suppress noise in the order of "high frequency, mid frequency, and wide frequency," ensuring that noise energy decays step by step. The last two active and linear networks precisely address residual transient noise and low-frequency ripple, achieving the technical objective of suppressing noise and ripple in non-isolated buck switching power supplies. Thus, this application achieves a power supply circuit structure that can specifically suppress MHz-level high-frequency switching noise conduction without significantly increasing cost or design complexity.

[0009] Preferably, the primary filter circuit includes a primary filter capacitor, a first damping resistor, and a second damping resistor; one end of the primary filter capacitor is connected to the common drain node of the first switch and the second switch, and the other end is grounded; the first damping resistor and the second damping resistor are connected in series and then in parallel across the primary filter capacitor.

[0010] By adopting the above technical solution, the first damping resistor and the second damping resistor are connected in series to form a damping resistor group, which works in conjunction with the first-stage filter circuit to resonate at the SW switch node, such as... Figure 4 The oscillation shown converts high-frequency peak energy into heat energy consumption.

[0011] Preferably, the secondary filter circuit includes an energy storage inductor and an output filter capacitor; one end of the energy storage inductor is connected to the primary filter capacitor, one end of the output filter capacitor is connected to one end of the energy storage inductor, and the other end is grounded.

[0012] By adopting the above technical solution, the energy storage inductor and the output filter capacitor constitute a second-order low-pass filter, which reduces the load on the intermediate and subsequent filtering stages.

[0013] Preferably, the three-stage filtering circuit includes a first high-frequency filtering capacitor, a second high-frequency filtering capacitor, and a ferrite bead; the first high-frequency filtering capacitor and the second high-frequency filtering capacitor are connected in series and then in parallel between the output terminal of the output filtering capacitor and ground; the ferrite bead is connected in parallel between the series node of the first high-frequency filtering capacitor and the second high-frequency filtering capacitor and ground.

[0014] By adopting the above technical solution, the three-stage filter circuit forms a three-stage π-type ferrite bead filter. The first and second high-frequency filter capacitors can cover the low-frequency band (<100kHz). The ferrite bead exhibits high impedance for high-frequency noise (>1MHz), which can compensate for the deficiency of LDO high-frequency PSRR and block the conduction of MHz noise to the five-stage filter circuit.

[0015] Preferably, the four-stage filter circuit includes a third filter capacitor, a fourth filter capacitor, a first voltage divider resistor, a second voltage divider resistor, and a Darlington transistor. The third filter capacitor and the fourth filter capacitor are connected in series and then in parallel between the output terminal of the three-stage filter circuit and ground. The first voltage divider resistor and the second voltage divider resistor are connected in series and then in parallel between the output terminal of the three-stage filter circuit and ground. The collector of the Darlington transistor is connected to the output terminal of the three-stage filter circuit, the emitter is grounded, and the base is connected to the series node of the first voltage divider resistor and the second voltage divider resistor.

[0016] By adopting the above technical solution, the four-stage filter circuit forms a four-stage active transient suppression. The Darlington transistor is triggered by the voltage divider resistors of the first and second voltage divider resistors. When the transient ripple noise spike is greater than the threshold, the Darlington transistor instantaneously conducts the bypass current, with a response speed of nanoseconds, which can suppress voltage jumps caused by load changes.

[0017] Preferably, the five-stage filtering circuit further includes a fourth output filtering capacitor and a fifth output filtering capacitor; one end of the fourth output filtering capacitor is connected to the output terminal of the four-stage filtering circuit, and the other end is grounded; the input terminal of the linear regulator is connected to the output terminal of the four-stage filtering circuit, the output terminal serves as the power output terminal, and the grounding terminal is grounded; one end of the fifth output filtering capacitor is connected to the output terminal of the linear regulator, and the other end is grounded.

[0018] By adopting the above technical solution, the capacity-graded design of the fourth and fifth output filter capacitors ensures that the low ESR characteristics of the fifth output filter capacitor suppress the noise of the linear regulator itself.

[0019] Preferably, the input filter capacitor is an electrolytic capacitor, a tantalum capacitor, or a ceramic capacitor.

[0020] By adopting the above technical solution, ceramic capacitors (with excellent high-frequency characteristics) suppress switching noise; Electrolytic capacitors (large capacity) stabilize the input voltage to suit different cost and performance requirements.

[0021] Preferably, the resistance values ​​of the first damping resistor and the second damping resistor are equal.

[0022] By adopting the above technical solution and using a symmetrical design of damping resistors, the charging and discharging time of the RC network in the first-stage filter circuit is balanced, the voltage bias of the SW switch node is avoided, and the high-frequency noise and ripple absorption efficiency is improved.

[0023] Preferably, the Darlington transistor is an NPN Darlington transistor, and the base bias current is provided by the output voltage of the three-stage filter circuit; the linear regulator is a low-dropout linear regulator, and the input voltage range of the linear regulator covers the output voltage range of the four-stage filter circuit.

[0024] By adopting the above technical solutions, the high current gain (hFE>1000) of the NPN Darlington transistor can improve the transient response sensitivity; the low dropout linear regulator can reduce the pressure on the front-end filter.

[0025] Secondly, the synchronous rectification electronic product for suppressing noise and ripple in buck switching power supplies provided in this application adopts the following technical solution: A synchronous rectification electronic product for suppressing noise and ripple in a buck switching power supply includes a housing and a circuit board, the circuit board being disposed in the housing and carrying a synchronous rectification circuit for suppressing noise and ripple in a buck switching power supply as described above.

[0026] In summary, this application includes at least one of the following beneficial technical effects: 1. This application achieves full-band noise and ripple interception through a five-stage coordinated process. The first-stage filter circuit directly absorbs MHz-level spikes at the SW switching node, reducing noise at the source; the second-stage filter circuit smooths low- and mid-frequency ripple; the third-stage filter circuit, combining ferrite beads and capacitors, suppresses high-frequency remnants >100kHz; the fourth-stage filter circuit dynamically responds to transient interference; and the fifth-stage filter circuit, using an LDO, achieves final voltage regulation. The output ripple is reduced from 139.43mV ( Figure 1 The voltage dropped to 2.28 mV. 2. The RC damping network of the first-stage filter circuit can effectively suppress high-frequency ringing caused by parasitic inductance and capacitance at the SW node, reduce electromagnetic interference (EMI) and voltage overshoot, and improve system stability. Simultaneously, the damping resistor limits the peak charging and discharging current of the capacitor, reduces stress on the switching transistor, extends device life, and improves dynamic response and noise characteristics, especially under high-frequency switching conditions. 3. The LC filter in the secondary filter circuit effectively attenuates the switching frequency and its harmonic components, smooths the output current, and reduces the output voltage ripple. Attached Figure Description

[0027] Figure 1 This is a data diagram showing the effect of existing synchronous rectification circuits in suppressing high-frequency noise and ripple. Figure 2 It is a typical asynchronous rectification topology in existing technology; Figure 3 It is a typical synchronous rectification topology in existing technology; Figure 4 It is a data measurement graph of high-frequency noise and ripple; Figure 5 This is a circuit diagram of the synchronous rectification circuit for suppressing noise and ripple in a buck switching power supply according to Embodiment 1 of this application; Figure 6 This is an implementation data effect diagram of the synchronous rectification circuit for suppressing noise and ripple in a buck switching power supply according to Embodiment 1 of this application (and...). Figure 1 (Compare the results). Detailed Implementation

[0028] The following is in conjunction with the appendix Figure 1-6 This application will be described in further detail.

[0029] To facilitate a further understanding of the technical solution of this application, the existing technology will be described first: Buck circuit in traditional non-isolated step-down switching power supplies Figure 2 The diagram shows a typical asynchronous rectification topology. Figure 3 Synchronous rectification (SCR) has become one of the most fundamental and core power architectures in modern electronic devices due to its high efficiency, compact size, and mature technology. Its applications are extremely wide-ranging, covering almost all scenarios requiring efficient power management.

[0030] However, the existing technology has the following drawbacks: The buck circuit has two main problems during operation: ① Due to the minority carrier storage effect, traditional silicon-based MOSFETs or diodes cannot immediately turn off when switching from forward bias (conduction state) to reverse bias (blocking state), resulting in a brief but large reverse current pulse. This pulse current oscillates with the circuit's parasitic inductance and capacitance, leading to... Figure 2 and Figure 3 The switch node SW shown will generate high-frequency noise during high-frequency switching (e.g., Figure 4 As shown), the core of the buck circuit is the fast switching of the MOSFET. This process generates extremely high di / dt (current change rate). However, the actual output filter capacitor is not ideal and has ESR (equivalent series resistance) and ESL (parasitic inductance). When high-frequency current flows through ESR, it will generate high-frequency voltage ripple. When it flows through ESL (parasitic inductance), it will resonate and generate high-frequency noise.

[0031] Ripple and noise can interfere with downstream circuits through conduction and radiation. In noise- and ripple-sensitive loads, such as in low-voltage digital systems, the power supply quality requirements of the power supply unit are high. Ripple and noise typically need to be controlled within 50mVpk-pk (peak-to-peak). If ripple and noise are not suppressed, it will lead to logic errors, degraded analog performance, and worsened electromagnetic compatibility (EMI) problems. Logic errors refer to noise superimposed on the signal, which may cause false triggering of clock or data lines. Degraded analog performance refers to the impact on the accuracy of ADC / DAC. Worsened EMI problems refer to the conduction of noise from the source, which can be fed back to the input source through the power supply line, polluting the entire power supply network and potentially causing other modules in the system that share the same power supply to malfunction.

[0032] High-speed switching loops on a PCB (printed circuit board) act like an efficient antenna, radiating noise and interfering with nearby wireless communications (such as Wi-Fi, Bluetooth) or other electronic devices, thus requiring improvement.

[0033] Example 1 To address the shortcomings of the existing technology and resolve its deficiencies, Embodiment 1 of this application discloses a step rectifier circuit for suppressing noise and ripple in a buck switching power supply. It should be emphasized that... Figure 5 Taking synchronous rectification buck circuits as an example, the solution for asynchronous rectification is the same and will not be repeated here. (Refer to...) Figure 5 The synchronous rectification circuit for suppressing noise and ripple in buck switching power supplies includes a synchronous rectification Buck main circuit, a first-stage filter circuit, a second-stage filter circuit, a third-stage filter circuit, a fourth-stage filter circuit, and a fifth-stage filter circuit.

[0034] Reference Figure 5 ,by Figure 5 Taking the circuit diagram shown as an example, the synchronous rectification Buck main circuit includes a first switch Q1, a second switch Q2, a high-side driver sub-circuit, a low-side driver sub-circuit, and an input filter capacitor C1. The drains of the first switch Q1 and the second switch Q2 are connected to the power input terminal VIN, and their sources are connected to the output terminals of the high-side driver sub-circuit and the low-side driver sub-circuit, respectively. Their gates are also connected to the output terminals of the high-side driver sub-circuit and the low-side driver sub-circuit, respectively. The energy storage inductor L1 is connected to the common node of the sources of the first switch Q1 and the second switch Q2. The input filter capacitor C1 is an electrolytic capacitor, a tantalum capacitor, or a ceramic capacitor.

[0035] In this embodiment, the high-side driving sub-circuit is Figure 5 The DRIVER1 (high-side drive) circuit in the diagram drives the high-side MOSFET (first switch Q1), requiring a floating voltage (bootstrap circuit) to overcome the voltage difference between the source and ground of the first switch Q1. The low-side drive sub-circuit is... Figure 5 The DRIVER2 (low-side driver) in this application drives the second low-side switch Q2, which is directly powered by VCC and requires no floating voltage. The high-side and low-side driver sub-circuits of this application employ driver circuits found in conventional synchronous rectifier BUCK circuits; existing publicly available driver circuits can be referenced, but are not shown in the figures and will not be described further here. Reference Figure 5 ,by Figure 5 Taking the circuit diagram shown as an example, the first-stage filter circuit is connected between the common node of the drains of the first and second switching transistors and ground; the common node of the drains of the first and second switching transistors is the SW switch node (SW in the diagram). The first-stage filter circuit includes a first-stage filter capacitor C2, a first damping resistor R1, and a second damping resistor R2; one end of the first-stage filter capacitor C2 is connected to the common node of the drains of the first and second switching transistors Q1 and Q2, and the other end is grounded; the first damping resistor R1 and the second damping resistor R2 are connected in series and then in parallel across the first-stage filter capacitor C2. The resistance values ​​of the first damping resistor R1 and the second damping resistor R2 are equal.

[0036] Reference Figure 5 ,by Figure 5 Taking the circuit diagram shown as an example, the secondary filter circuit is connected between the output terminal of the primary filter circuit and the power output terminal. The secondary filter circuit includes an energy storage inductor L1 and an output filter capacitor C3; one end of the energy storage inductor L1 is connected to the primary filter capacitor C2, one end of the output filter capacitor C3 is connected to one end of the energy storage inductor L1, and the other end is grounded (GND is not shown in the figure).

[0037] Reference Figure 5 ,by Figure 5 Taking the circuit diagram shown as an example, the three-stage filter circuit is connected between the output terminal of the two-stage filter circuit and ground. The three-stage filter circuit includes a first high-frequency filter capacitor C10, a second high-frequency filter capacitor C4, and a ferrite bead FB1; the first high-frequency filter capacitor C10 and the second high-frequency filter capacitor C4 are connected in series and then in parallel between the output terminal of the output filter capacitor C3 and ground; the ferrite bead FB1 is connected in parallel between the series node of the first high-frequency filter capacitor C10 and the second high-frequency filter capacitor C4 and ground.

[0038] Reference Figure 5 ,by Figure 5 Taking the circuit diagram shown as an example, the four-stage filter circuit includes an active transient suppression unit, the input of which is connected between the output of the three-stage filter circuit and ground. The active transient suppression unit includes a third filter capacitor C5, a fourth filter capacitor C6, a first voltage divider resistor R3, a second voltage divider resistor R4, and a Darlington transistor Q3. The Darlington transistor Q3 is an NPN Darlington transistor, and its base bias current is provided by the output voltage of the three-stage filter circuit. The third filter capacitor C5 and the fourth filter capacitor C6 are connected in series and then in parallel between the output of the three-stage filter circuit and ground; the first voltage divider resistor R3 and the second voltage divider resistor R4 are connected in series and then in parallel between the output of the three-stage filter circuit and ground; the collector of the Darlington transistor Q3 is connected to the output of the three-stage filter circuit, the emitter is grounded, and the base is connected to the series node of the first voltage divider resistor R3 and the second voltage divider resistor R4.

[0039] Reference Figure 5 ,by Figure 5Taking the circuit diagram shown as an example, the five-stage filter circuit includes a linear regulator LDO, whose input is connected to the output of the four-stage filter circuit, and whose output serves as the power output VOUT. The five-stage filter circuit also includes a fourth output filter capacitor C7 and a fifth output filter capacitor C9; one end of the fourth output filter capacitor C7 is connected to the output of the four-stage filter circuit, and the other end is grounded; the input of the linear regulator LDO (U2 in the diagram) is connected to the output of the four-stage filter circuit, and its output serves as the power output VOUT, with its grounded end grounded; the output VOUT is used to connect to an external load circuit. One end of the fifth output filter capacitor C9 is connected to the output of the linear regulator LDO, and the other end is grounded. The linear regulator LDO is a low-dropout linear regulator LDO, and its input voltage range covers the output voltage range of the four-stage filter circuit.

[0040] The implementation principle of a synchronous rectification circuit for suppressing noise and ripple in a buck switching power supply according to an embodiment of this application is as follows: when the first switch Q1 and the second switch Q2 are switched on and off at high speed at node SW ( Figure 3 The first-stage filter circuit generates MHz-level voltage spikes. The first-stage filter capacitor C2 and R1 / R2 form an RC absorption network. C2 is directly connected in parallel to the SW switching node. The first damping resistor R1 and the second damping resistor R2 are connected in series to suppress LC resonance. The energy storage inductor L1 and the output capacitor C3 in the second-stage filter circuit form a second-order low-pass filter. The first high-frequency filter capacitor C10, the second high-frequency filter capacitor C4, and the ferrite bead FB1 in the third-stage filter circuit form a π-type filter topology. The first high-frequency filter capacitor C10 and the second high-frequency filter capacitor C4 cover the low-frequency band, while the ferrite bead FB1 exhibits high impedance for high-frequency noise (>1MHz), converting energy into heat. The first voltage divider resistor R3 and the second voltage divider resistor R4 in the fourth-stage filter circuit divide and detect transient voltages. When the spike exceeds the threshold, Q3 instantaneously conducts (response speed on the order of nanoseconds), bypassing the current to ground. The third filter capacitor C5 and the fourth filter capacitor C6 provide transient energy buffering, solving the voltage jump problem caused by sudden load changes. A five-stage filter circuit with a linear regulator LDO ( Figure 5 The U2 module utilizes high PSRR characteristics (60-80dB at low frequencies) for final voltage regulation. The fourth output filter capacitor C7 stabilizes the LDO input voltage and suppresses residual ripple from the preceding stage, while the fifth output filter capacitor C9 filters out the noise inherent in the linear regulator LDO, resulting in an ultra-low ripple output voltage. Experiments have demonstrated that this application achieves a peak-to-peak output of 2.28mV. Figure 6 As shown), compared to the conventional scheme (139.43mV, Figure 1 () decreased by 98.4%.

[0041] Example 2 Synchronous rectification electronic products for suppressing noise and ripple in buck switching power supplies, including a housing and a circuit board, wherein the circuit board is located in the housing and carries synchronous rectification circuitry for suppressing noise and ripple in buck switching power supplies.

[0042] The above are all preferred embodiments of this application, and are not intended to limit the scope of protection of this application. Therefore, all equivalent changes made in accordance with the structure, shape and principle of this application should be covered within the scope of protection of this application.

Claims

1. A synchronous rectification circuit for suppressing noise and ripple in a step-down switching power supply, characterized by, include: The synchronous rectification Buck main circuit includes a first switching transistor, a second switching transistor, a high-side driving sub-circuit, a low-side driving sub-circuit, and an input filter capacitor; the drains of the first and second switching transistors are connected to the power input terminal, the sources are connected to the output terminals of the high-side driving sub-circuit and the low-side driving sub-circuit, respectively, and the gates are connected to the output terminals of the high-side driving sub-circuit and the low-side driving sub-circuit, respectively. A primary filter circuit is connected between the common drain node of the first and second switching transistors and ground; the common drain node of the first and second switching transistors is the SW switch node. A secondary filter circuit is connected between the output terminal of the primary filter circuit and the power output terminal. A third-stage filter circuit is connected between the output terminal of the second-stage filter circuit and ground. The four-stage filter circuit includes an active transient suppression unit, with its input terminal connected between the output terminal of the three-stage filter circuit and ground. The five-stage filter circuit includes a linear regulator, the input of which is connected to the output of the four-stage filter circuit, and the output serves as the power supply output.

2. The synchronous rectification circuit for suppressing noise and ripple of a step-down switching power supply according to claim 1, characterized in that, The primary filter circuit includes a primary filter capacitor, a first damping resistor, and a second damping resistor; one end of the primary filter capacitor is connected to the common drain node of the first and second switching transistors, and the other end is grounded; the first damping resistor and the second damping resistor are connected in series and then in parallel across the primary filter capacitor.

3. The synchronous rectification circuit for suppressing noise and ripple in a buck switching power supply according to claim 2, characterized in that, The secondary filter circuit includes an energy storage inductor and an output filter capacitor; one end of the energy storage inductor is connected to the primary filter capacitor, one end of the output filter capacitor is connected to one end of the energy storage inductor, and the other end is grounded.

4. The synchronous rectification circuit for suppressing noise and ripple in a buck switching power supply according to claim 3, characterized in that, The three-stage filtering circuit includes a first high-frequency filtering capacitor, a second high-frequency filtering capacitor, and a ferrite bead; the first high-frequency filtering capacitor and the second high-frequency filtering capacitor are connected in series and then in parallel between the output terminal of the output filtering capacitor and ground; the ferrite bead is connected in parallel between the series node of the first high-frequency filtering capacitor and the second high-frequency filtering capacitor and ground.

5. The synchronous rectification circuit for suppressing noise and ripple in a buck switching power supply according to claim 2, characterized in that, The four-stage filter circuit includes a third filter capacitor, a fourth filter capacitor, a first voltage divider resistor, a second voltage divider resistor, and a Darlington transistor. The third and fourth filter capacitors are connected in series and then in parallel between the output terminal of the three-stage filter circuit and ground. The first and second voltage divider resistors are connected in series and then in parallel between the output terminal of the three-stage filter circuit and ground. The collector of the Darlington transistor is connected to the output terminal of the three-stage filter circuit, the emitter is grounded, and the base is connected to the series node of the first and second voltage divider resistors.

6. The synchronous rectification circuit for suppressing noise and ripple in a buck switching power supply according to claim 2, characterized in that, The five-stage filtering circuit further includes a fourth output filter capacitor and a fifth output filter capacitor; one end of the fourth output filter capacitor is connected to the output terminal of the four-stage filtering circuit, and the other end is grounded; the input terminal of the linear regulator is connected to the output terminal of the four-stage filtering circuit, the output terminal serves as the power output terminal, and the ground terminal is grounded; one end of the fifth output filter capacitor is connected to the output terminal of the linear regulator, and the other end is grounded.

7. The synchronous rectification circuit for suppressing noise and ripple in a buck switching power supply according to claim 1, characterized in that, The input filter capacitor is an electrolytic capacitor, a tantalum capacitor, or a ceramic capacitor.

8. The synchronous rectification circuit for suppressing noise and ripple in a buck switching power supply according to claim 2, characterized in that, The resistance values ​​of the first damping resistor and the second damping resistor are equal.

9. The synchronous rectification circuit for suppressing noise and ripple in a buck switching power supply according to claim 5, characterized in that, The Darlington transistor is an NPN Darlington transistor, and its base bias current is provided by the output voltage of the three-stage filter circuit; the linear regulator is a low-dropout linear regulator, and the input voltage range of the linear regulator covers the output voltage range of the four-stage filter circuit.

10. A synchronous rectification electronic product for suppressing noise and ripple in a buck switching power supply, characterized in that, The device includes a housing and a circuit board, the circuit board being disposed in the housing, and the circuit board carrying a synchronous rectification circuit for suppressing noise and ripple of a buck switching power supply as described in any one of claims 1-9.

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