Optical fiber trigger plate
Patent Information
- Application Number
- CN202522152429.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-11
- Publication Date
- 2026-09-11
- Estimated Expiration
- 2035-10-11
AI Technical Summary
[0004]本实用新型为解决现有技术中光纤板的光纤头精密,安装维护易磨损,且硅粉易附着端面、振动加剧损伤,易导致断光使信号中断的问题,提供一种光纤触发板
[0018] The beneficial effects of this utility model are as follows: The fiber optic trigger board disclosed in this utility model drives the fiber optic transceiver through the driver chip, so that the control signal output by the main control chip is effectively amplified and shaped, avoiding signal distortion or response delay caused by insufficient signal driving capability, ensuring accurate reception and rapid transmission of trigger commands by the fiber optic trigger module, and improving the signal transmission stability and trigger response efficiency of the entire fiber optic trigger board; by connecting a surge suppressor in series between pins 7 and 8 of the HFBR-1414TZ fiber optic transceiver, transient overvoltages and surge currents that may occur between the pins can be quickly absorbed, preventing surge energy generated by external power grid fluctuations, electromagnetic interference, etc. from damaging the internal circuit of the fiber optic transceiver, enhancing the anti-interference capability of the fiber optic trigger module, and ensuring that there are no fault alarms in 1242 power adjustment cabinets for 3 months.
Smart Images

Figure CN224746556U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of polycrystalline silicon production technology, and in particular to an optical fiber trigger board. Background Technology
[0002] In polysilicon production, the reduction furnace is the core equipment for silicon rod growth. The precise control of its heating power depends on the power control cabinet. The power control cabinet needs to transmit signals through the fiber optic board and the trigger board. The two have long used fiber optic communication, which has become the mainstream solution due to its advantages of strong resistance to electromagnetic interference and adaptability to the high power conditions of the reduction furnace.
[0003] However, polysilicon workshops are characterized by high levels of silicon powder dust and significant equipment vibration. The fiber optic heads on the fiber optic boards are delicate and prone to wear during installation and maintenance. Silicon powder easily adheres to the end faces, and vibration exacerbates the damage, potentially leading to signal interruption. This can cause the power control cabinet to shut down due to signal loss, resulting in temperature fluctuations in the reduction furnace, affecting silicon rod quality, and even disrupting continuous production. Utility Model Content
[0004] This invention addresses the problems in existing optical fiber boards where the fiber optic heads are delicate, prone to wear during installation and maintenance, and susceptible to silicon powder adhesion to the end face, which can lead to increased damage from vibration and signal interruption. The invention provides an optical fiber trigger board.
[0005] The technical solution adopted in this utility model is:
[0006] The fiber optic trigger board disclosed in this utility model includes a main control chip and at least one fiber optic trigger module. Each fiber optic trigger module includes a driver chip and two fiber optic transceivers, namely V1 and V2. Each driver chip is connected to the main control chip and each fiber optic transceiver. The driver chip is used to receive signals from the main control chip to drive each fiber optic transceiver. The driver chip is Texas Instruments' SN75451BP driver chip. The fiber optic transceiver is Broadcom's HFBR-1414TZ fiber optic transceiver. A surge suppressor is connected in series between pins 7 and 8 of the HFBR-1414TZ fiber optic transceiver.
[0007] Furthermore, the surge suppressor is selected from transient voltage suppression diodes (TVS).
[0008] Furthermore, pin 1A of the SN75451BP driver chip is connected to a 5V power supply via pull-up resistor R2;
[0009] The 2A pin of the SN75451BP driver chip is also connected to a 5V power supply through a pull-up resistor R2;
[0010] Pin 1B of the SN75451BP driver chip is connected to the IO pin of the main control chip to receive control signals from the main control chip. At the same time, pin 1B of the SN75451BP driver chip is connected to GND through a pull-down resistor R3.
[0011] Pin 2B of the SN75451BP driver chip is connected to other IO pins of the main control chip to receive control signals from the main control chip. Meanwhile, pin 1B of the SN75451BP driver chip is connected to GND through a pull-down resistor R4.
[0012] The 1Y pin of the SN75451BP driver chip is connected to pins 2, 6, and 7 of the HFBR-1414TZ fiber optic transceiver V1.
[0013] The 2Y pin of the SN75451BP driver chip is connected to pins 2, 6, and 7 of the HFBR-1414TZ fiber optic transceiver V2.
[0014] Pins 1, 3, 4, 5, and 8 of the HFBR-1414TZ fiber optic transceiver V1 are connected to GND.
[0015] Pins 1, 3, 4, 5, and 8 of the HFBR-1414TZ fiber optic transceiver V2 are connected to GND.
[0016] All GNDs are connected to PE through filter capacitor C1 to filter out reflections of high-frequency signals generated between GND and PE, preventing interference with other components.
[0017] Furthermore, an FPGA chip is selected as the main control chip because FPGA chips are suitable for high-speed transmission via optical fiber.
[0018] The beneficial effects of this utility model are as follows: The fiber optic trigger board disclosed in this utility model drives the fiber optic transceiver through the driver chip, so that the control signal output by the main control chip is effectively amplified and shaped, avoiding signal distortion or response delay caused by insufficient signal driving capability, ensuring accurate reception and rapid transmission of trigger commands by the fiber optic trigger module, and improving the signal transmission stability and trigger response efficiency of the entire fiber optic trigger board; by connecting a surge suppressor in series between pins 7 and 8 of the HFBR-1414TZ fiber optic transceiver, transient overvoltages and surge currents that may occur between the pins can be quickly absorbed, preventing surge energy generated by external power grid fluctuations, electromagnetic interference, etc. from damaging the internal circuit of the fiber optic transceiver, enhancing the anti-interference capability of the fiber optic trigger module, and ensuring that there are no fault alarms in 1242 power adjustment cabinets for 3 months. Attached Figure Description
[0019] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0020] Figure 1 This is the circuit diagram of the main control chip and the fiber optic trigger module. Detailed Implementation
[0021] In the description of this utility model, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this utility model and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model.
[0022] The following disclosure provides many different embodiments or examples for implementing various structures of this invention. To simplify the disclosure, specific examples of components and arrangements are described below. Of course, these are merely examples and are not intended to limit the scope of this invention.
[0023] The embodiments of the utility model will now be described in detail with reference to the accompanying drawings.
[0024] As attached Figure 1 As shown, the fiber optic trigger board disclosed in this embodiment includes a main control chip and at least one fiber optic trigger module. Each fiber optic trigger module includes a driver chip and two fiber optic transceivers, namely V1 and V2. Each driver chip is connected to the main control chip and each fiber optic transceiver. The driver chip is used to receive signals from the main control chip to drive each fiber optic transceiver. The driver chip is Texas Instruments' SN75451BP driver chip. The fiber optic transceiver is Broadcom's HFBR-1414TZ fiber optic transceiver. A surge suppressor is connected in series between pins 7 and 8 of the HFBR-1414TZ fiber optic transceiver.
[0025] The beneficial effects of the above technical solution are as follows: By driving the fiber optic transceiver with the driver chip, the control signal output by the main control chip is effectively amplified and shaped, avoiding signal distortion or response delay caused by insufficient signal driving capability, ensuring accurate reception and rapid transmission of trigger commands by the fiber optic trigger module, and improving the signal transmission stability and trigger response efficiency of the entire fiber optic trigger board; by connecting a surge suppressor in series between pins 7 and 8 of the HFBR-1414TZ fiber optic transceiver, transient overvoltages and surge currents that may occur between these pins can be quickly absorbed, preventing surge energy generated by external power grid fluctuations, electromagnetic interference, etc., from damaging the internal circuitry of the fiber optic transceiver, enhancing the anti-interference capability of the fiber optic trigger module, and ensuring that there were no fault alarms in 1242 power adjustment cabinets for 3 months.
[0026] Furthermore, a transient voltage suppressor diode (TVS) is selected as the surge suppressor because TVS has a nanosecond-level fast response characteristic, which can conduct in a very short time to absorb transient surge energy. At the same time, its clamping voltage is stable, which can limit the voltage between pins 7 and 8 to the tolerance range of the fiber optic transceiver. This prevents surge energy from entering the internal circuit due to response delay, and also prevents the normal operation of the transceiver from being affected by excessive clamping voltage. In addition, the surge absorption capacity of TVS is adapted to the energy level of external power grid fluctuations, electromagnetic interference and other scenarios. Moreover, its small size makes it easy to integrate, which can achieve efficient surge protection in a limited module space, further ensuring the stable operation of the fiber optic transceiver.
[0027] Furthermore, pin 1A of the SN75451BP driver chip is connected to a 5V power supply via pull-up resistor R2;
[0028] The 2A pin of the SN75451BP driver chip is also connected to a 5V power supply through a pull-up resistor R2;
[0029] Pin 1B of the SN75451BP driver chip is connected to the IO pin of the main control chip to receive control signals from the main control chip. At the same time, pin 1B of the SN75451BP driver chip is connected to GND through a pull-down resistor R3.
[0030] Pin 2B of the SN75451BP driver chip is connected to other IO pins of the main control chip to receive control signals from the main control chip. Meanwhile, pin 1B of the SN75451BP driver chip is connected to GND through a pull-down resistor R4.
[0031] The 1Y pin of the SN75451BP driver chip is connected to pins 2, 6, and 7 of the HFBR-1414TZ fiber optic transceiver V1.
[0032] The 2Y pin of the SN75451BP driver chip is connected to pins 2, 6, and 7 of the HFBR-1414TZ fiber optic transceiver V2.
[0033] Pins 1, 3, 4, 5, and 8 of the HFBR-1414TZ fiber optic transceiver V1 are connected to GND.
[0034] Pins 1, 3, 4, 5, and 8 of the HFBR-1414TZ fiber optic transceiver V2 are connected to GND.
[0035] All GNDs are connected to PE through filter capacitor C1 to filter out reflections of high-frequency signals generated between GND and PE, preventing interference with other components.
[0036] Furthermore, an FPGA chip is selected as the main control chip because FPGA chips are suitable for high-speed transmission via optical fiber.
Claims
1. An optical fiber trigger plate, characterized by, It includes a main control chip and at least one fiber optic trigger module. Each fiber optic trigger module includes a driver chip and two fiber optic transceivers, namely V1 and V2. Each driver chip is connected to the main control chip and each fiber optic transceiver. The driver chip is used to receive signals from the main control chip to drive each fiber optic transceiver. The driver chip is Texas Instruments' SN75451BP driver chip. The fiber optic transceiver is Broadcom's HFBR-1414TZ fiber optic transceiver. A surge suppressor is connected in series between pins 7 and 8 of the HFBR-1414TZ fiber optic transceiver.
2. The optical fiber trigger plate of claim 1, wherein, The surge suppressor is a transient voltage suppressor diode (TVS).
3. The fiber optic trigger board according to claim 2, characterized in that: The 1A pin of the SN75451BP driver chip is connected to a 5V power supply via a pull-up resistor R2. The 2A pin of the SN75451BP driver chip is also connected to a 5V power supply through a pull-up resistor R2; Pin 1B of the SN75451BP driver chip is connected to the IO pin of the main control chip to receive control signals from the main control chip. At the same time, pin 1B of the SN75451BP driver chip is connected to GND through a pull-down resistor R3. Pin 2B of the SN75451BP driver chip is connected to the remaining IO pins of the main control chip to receive control signals from the main control chip. Meanwhile, pin 1B of the SN75451BP driver chip is connected to GND through a pull-down resistor R4. The 1Y pin of the SN75451BP driver chip is connected to pins 2, 6, and 7 of the HFBR-1414TZ fiber optic transceiver V1. The 2Y pin of the SN75451BP driver chip is connected to pins 2, 6, and 7 of the HFBR-1414TZ fiber optic transceiver V2. Pins 1, 3, 4, 5, and 8 of the HFBR-1414TZ fiber optic transceiver V1 are connected to GND. Pins 1, 3, 4, 5, and 8 of the HFBR-1414TZ fiber optic transceiver V2 are connected to GND. All GNDs are connected to PE through filter capacitor C1 to filter out reflections of high-frequency signals generated between GND and PE, preventing interference with other components.
4. The optical fiber trigger plate of any of claims 1-3, wherein, The main control chip is an FPGA chip because FPGA chips are suitable for high-speed transmission via optical fiber.