Packaging structure with embedded high dielectric layer
Patent Information
- Application Number
- CN202522138006.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Priority Date
- 2025-09-24
- Filing Date
- 2025-10-10
- Publication Date
- 2026-09-11
- Estimated Expiration
- 2035-10-10
AI Technical Summary
[0004]为了解决现有技术电容导致的问题
[0017] As described in the previous embodiments, by placing a dielectric ceramic sheet between the power electrode and the connecting pad, a capacitor structure is directly formed in the package structure, reducing the distance between the RF chip and the capacitor, reducing the equivalent series inductance, and achieving the effect of bypass capacitor filtering directly in the package structure. This can filter out high-frequency noise in the power supply, reduce the interference of high-frequency noise on the RF chip, and further improve the reliability of the product.
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Figure CN224746927U_ABST
Abstract
Description
Technical Field
[0001] This work relates to the field of packaging, specifically a packaging structure with an embedded high-dielectric layer. Background Technology
[0002] Noise interference has a significant impact on the signal transmission and reception of electronic products. Therefore, finding ways to isolate noise is a key task for antenna design departments.
[0003] In the field of radio frequency (RF), high-frequency noise has a significant impact. A portion of this high-frequency noise originates from the power supply; therefore, it's common practice to connect capacitors in series with the power supply terminal of RF chips. However, with advancements in chip technology, capacitors are now thicker than the chip itself, making it difficult to reduce the overall thickness. Furthermore, inconsistent thickness affects layout and can easily lead to poor product reliability. Utility Model Content
[0004] To address the problems caused by capacitance in existing technologies, a package structure with an embedded high-dielectric layer is provided. The package structure includes a package housing, a plurality of first metal pillars, a ground electrode, an RF chip, a plurality of connection pads, two power electrodes, and at least one dielectric ceramic sheet. The package housing is made of a first dielectric material and includes a first surface and a second surface. A groove is formed on the first surface, and a plurality of first vias are provided. The first vias penetrate the package housing. The first metal pillars are filled into the first vias. The ground electrode is located on the second surface and connected to the first metal pillars. The RF chip is located in the groove and includes two power contacts. The connection pads are connected to the first metal pillars and electrically connected to the ground electrode. At least a portion of each power electrode is exposed in the package housing and is connected to one of the two power contacts of the RF chip. At least one dielectric ceramic sheet is made of a second dielectric material and is located between each of the two power electrodes and at least one of the connection pads.
[0005] In some embodiments, at a frequency of 1 kHz, the dielectric constant of the dielectric ceramic sheet is 20 to 100 times that of the dielectric constant of the first dielectric material.
[0006] In some embodiments, the two power electrodes are located on the first surface, and the package structure with an embedded high dielectric layer includes two dielectric ceramic sheets, each dielectric ceramic sheet being located between one of the connection pads and one of the power electrodes, and the two power electrodes being respectively connected to two power contacts of the radio frequency chip via wires.
[0007] In some embodiments, a portion of the two power electrodes is covered by the package housing, while another portion is exposed in the groove. The package structure with an embedded high dielectric layer includes a dielectric ceramic sheet located between the connection pad and the two power electrodes, and the two power electrodes are respectively connected to the two power contacts of the RF chip.
[0008] More specifically, in some embodiments, the package housing further has two second vias, and the package structure with an embedded high dielectric layer further includes two power connection pads and two second metal pillars. The two second vias penetrate the first surface and the second surface of the package housing, the two second metal pillars are filled in the second vias, and the two power connection pads are located on the second surface and electrically connected to the two power electrodes through the second metal pillars.
[0009] In some embodiments, the two power electrodes are located on the first surface, and the package structure with an embedded high dielectric layer includes two dielectric ceramic sheets. Each power electrode includes a separate first wire bonding pad and a second wire bonding pad. Each dielectric ceramic sheet is located between the second wire bonding pad and one of the connection pads, and the second wire bonding pad is connected to the first wire bonding pad and one of the power contacts of the RF chip by wires.
[0010] More specifically, in some embodiments, the package housing further includes two second vias, and the package structure with an embedded high-dielectric layer further includes two power connection pads and two second metal pillars. The two second vias penetrate the first and second surfaces of the package housing, the two second metal pillars are filled in the second vias, the two power connection pads are located on the second surface, and the second wire bonding pads of the two power electrodes are electrically connected through the second metal pillars.
[0011] In some embodiments, the total thickness of the capacitor structure, which consists of one of the power electrodes, at least one dielectric ceramic sheet, and one of the connecting pads, is 3 to 100 μm.
[0012] More specifically, in some embodiments, the capacitance value of the capacitor structure is greater than 5pF.
[0013] In some embodiments, the groove is located in the central region of the first surface.
[0014] In some embodiments, the dielectric constant of the dielectric ceramic sheet is at least 50 times greater than the dielectric constant of the first dielectric material.
[0015] In some embodiments, at a frequency of 1 kHz, the dielectric constant of the first dielectric material is between 5 and 9 F / m.
[0016] In some embodiments, at a frequency of 1 kHz, the dielectric constant of the second dielectric material is greater than 250 F / m.
[0017] As described in the previous embodiments, by placing a dielectric ceramic sheet between the power electrode and the connecting pad, a capacitor structure is directly formed in the package structure, reducing the distance between the RF chip and the capacitor, reducing the equivalent series inductance, and achieving the effect of bypass capacitor filtering directly in the package structure. This can filter out high-frequency noise in the power supply, reduce the interference of high-frequency noise on the RF chip, and further improve the reliability of the product. Attached Figure Description
[0018] Figure 1 This is a perspective view of an embodiment of a packaging structure with an embedded high dielectric layer.
[0019] Figure 2 This is a cross-sectional schematic diagram of the first embodiment of the packaging structure with an embedded high dielectric layer.
[0020] Figure 3 This is a cross-sectional schematic diagram of a second embodiment of a packaging structure with an embedded high dielectric layer.
[0021] Figure 4 This is a cross-sectional schematic diagram of the third embodiment of the packaging structure with an embedded high dielectric layer.
[0022] In the attached figures, the following labels are used:
[0023] 1: Packaging structure with embedded high dielectric layer
[0024] 10: Encapsulation housing
[0025] 11: First Surface
[0026] 13: Second Surface
[0027] 15: Groove
[0028] 151: Bottom
[0029] 17: First through hole
[0030] 19: Second via
[0031] 21: First Metal Pillar
[0032] 23: Second Metal Pillar
[0033] 30: Grounding electrode
[0034] 40: Radio Frequency Chip
[0035] 41: Power Contact
[0036] 50: Connecting pad
[0037] 60: Power supply electrode
[0038] 61: First bonding pad
[0039] 63: Second string pad
[0040] 65: Conductor
[0041] 67: Power Connection Pad
[0042] 70: Dielectric ceramic sheet
[0043] C: Capacitor Structure Detailed Implementation
[0044] Figure 1 This is a perspective view of an embodiment of a packaging structure with an embedded high dielectric layer. Figure 2 This is a cross-sectional schematic diagram of the first embodiment of the packaging structure with an embedded high dielectric layer. Figure 2 For along Figure 1 A schematic diagram of an embodiment of the AA-line cross-section. (See diagram below.) Figure 1 and Figure 2 As shown, the package structure 1 with an embedded high-dielectric layer includes a package housing 10, a plurality of first metal pillars 21, a ground electrode 30, an RF chip 40, a plurality of connection pads 50, two power electrodes 60, and two dielectric ceramic sheets 70. The package housing 10 is made of a first dielectric material, such as ceramic, and includes a first surface 11 and a second surface 13. A groove 15 is formed on the first surface, and a plurality of first through holes 17 are provided, which penetrate the package housing 10. Here, the groove 15 may be located in the central region of the first surface 11 to facilitate symmetrical wiring, but this is only an example and not intended to limit the design.
[0045] In the first embodiment, a portion of the first through-hole 17 penetrates the first surface 11 and the second surface 13, while a portion of the first through-hole 17 penetrates the bottom surface 151 of the groove 15 and the second surface 13. A first metal post 21 is filled into the first through-hole 17. A ground electrode 30 is located on the second surface 13 and connected to the first metal post 21. An RF chip 40 is located in the groove 15 and includes two power contacts 41. A connecting pad 50 is connected to the first metal post 21 and electrically connected to the ground electrode 30. Here, a portion of the connecting pad 50 is located on the first surface 11, while a portion of the connecting pad 50 is located on the bottom surface 151 of the groove 15 and connected to the RF chip 40.
[0046] At least a portion of each power electrode 60 is exposed on the package housing 10. In the first embodiment, the power electrodes 60 are located on the first surface 11, and the two power electrodes 60 are respectively connected to one of the two power contacts 41 of the RF chip 40 via wires 65. Two dielectric ceramic sheets 70 are respectively located between each of the two power electrodes 60 and the connecting pad 50 located on the first surface 11, thereby forming a capacitor structure C consisting of the power electrodes 60, the dielectric ceramic sheets 70, and the connecting pad 50. At a frequency of 1 kHz, the dielectric constant of the dielectric ceramic sheet 70 is 20 to 100 times that of the dielectric constant of the first dielectric material. Thus, the capacitor structure C can provide a bypass effect for filtering high-frequency noise from the power supply.
[0047] Furthermore, the package housing 10 is provided with two second through holes 19, and the package structure 1 with embedded high dielectric layer further includes two power connection pads 67 and two second metal pillars 23. The two second through holes 19 penetrate the first surface 11 and the second surface 13 of the package housing 10. The two second metal pillars 23 are filled in the second through holes 19. The two power connection pads 67 are located on the second surface 13 and are used to connect to the external power supply. They are electrically connected to the two power electrodes 60 through the second metal pillars 23. That is, after the external power supply enters the package structure 1 with embedded high dielectric layer through the power connection pads 67, it is transmitted to the power electrode 60 through the second metal pillars 23, where a shunt is generated. The high-frequency signal is transmitted to the ground electrode 30 after passing through the capacitor structure C and then output. The remaining power signals are supplied to the RF chip 40 through the wires 65.
[0048] Figure 3 This is a cross-sectional schematic diagram of a second embodiment of a packaging structure with an embedded high dielectric layer. Figure 3 For along Figure 1 A schematic diagram of another embodiment of the AA line cross-section. (See diagram below.) Figure 3 As shown, and also refer to Figure 2 The second embodiment differs from the first embodiment in that the power electrode 60 includes a separate first bonding pad 61 and a second bonding pad 63. The first bonding pad 61 is connected to the second metal post 23 and further connected to the power connection pad 67. The second bonding pad 63 is located on the dielectric ceramic sheet 70, and the second bonding pad 63 is connected to the first bonding pad 61 and the power contact 41 of the RF chip 40 by wires 65. The second bonding pad 63, the dielectric ceramic sheet 70, and the connection pad 50 on the first surface 11 constitute a capacitor structure C.
[0049] Figure 4 This is a cross-sectional schematic diagram of the third embodiment of the packaging structure with an embedded high dielectric layer. Figure 4 For along Figure 1 A schematic diagram of another embodiment of the AA line cross-section. (See diagram below.) Figure 4 As shown, and also refer to Figure 2 and Figure 3 The third embodiment differs from the first and second embodiments in that the RF chip 40 is in a flip-chip package. Parts of the two power electrodes 60 are covered by the package housing 10, while the other parts are exposed in the recess 15. The package structure 1 with an embedded high-dielectric layer includes a dielectric ceramic sheet 70 located on the connection pad 50 on the bottom surface 151 of the recess 15. Parts of the power electrodes 60 are located on a portion of the dielectric ceramic sheet 70, and the two power electrodes 60 are directly connected to the two power contacts 41 of the RF chip 40, without being connected via wires 65. Thus, a portion of the power electrodes 60, a portion of the dielectric ceramic sheet 70, and a portion of the connection pad 50 constitute a capacitor structure C.
[0050] In the above embodiments, regardless of the method, the total thickness of the capacitor structure C is 3 to 100 μm, preferably between 5 and 60 μm. The second dielectric material used to fabricate the dielectric ceramic sheet 70 has a dielectric constant much greater than that of the first dielectric material used to fabricate the package housing 10, resulting in a capacitance value greater than 5 pF for the capacitor structure C. Here, the overall technology can be implemented using semiconductor packaging technology, thereby reducing the external circuit layout area and height. Furthermore, by directly placing the capacitor in the package structure 1 with an embedded high-dielectric layer, the distance between the RF chip 40 and the capacitor structure C is reduced.
[0051] More specifically, in some embodiments, the dielectric constant of the dielectric ceramic sheet 70 is at least 50 times greater than the dielectric constant of the first dielectric material. For example, in some embodiments, at a frequency of 1 kHz, the dielectric constant of the first dielectric material is between 5 and 9 F / m, while the dielectric constant of the second dielectric material is greater than 250 F / m, for example, 480 F / m.
[0052] In summary, by using semiconductor packaging processes, a dielectric ceramic sheet 70 is placed between the power electrode 60 and the connecting pad 50, directly forming a capacitor structure C within the package structure 1 with an embedded high dielectric layer. This reduces the distance between the RF chip 40 and the capacitor structure C, lowers the equivalent series inductance, and achieves the effect of bypass capacitor filtering directly within the package structure 1 with an embedded high dielectric layer. This can filter out high-frequency noise in the power supply, reduce the interference of high-frequency noise on the RF chip 40, further improve the reliability of the product, and increase the margin of the product in circuit layout.
[0053] Of course, there may be other embodiments of this utility model. Without departing from the spirit and essence of this utility model, those skilled in the art can make various corresponding changes and modifications based on this utility model, but these corresponding changes and modifications should all fall within the protection scope of the claims of this utility model.
Claims
1. A packaging structure with an embedded high-dielectric layer, characterized in that, Include: A package housing is made of a first dielectric material and includes a first surface and a second surface. A groove is formed on the first surface and a plurality of first through holes are provided, wherein the first through holes penetrate the package housing. Multiple first metal pillars are filled into these first through holes; A grounding electrode is disposed on the second surface and connected to the first metal pillars; An RF chip is located in the recess and includes two power contacts; Multiple connecting pads are connected to the first metal post and electrically connected to the grounding electrode; Two power electrodes, each of which has at least a portion exposed outside the package housing and is connected to one of the two power contacts of the RF chip; and At least one dielectric ceramic sheet, made of a second dielectric material, is located between each of the two power electrodes and at least one of the connection pads.
2. The encapsulated high dielectric layer structure of claim 1, wherein, At a frequency of 1 kHz, the dielectric constant of the dielectric ceramic sheet is 20 to 100 times that of the first dielectric material.
3. The packaging structure with an embedded high-dielectric layer as described in claim 2, characterized in that, The two power electrodes are located on the first surface, and the package structure with an embedded high dielectric layer includes two dielectric ceramic sheets, each of which is located between one of the connection pads and one of the power electrodes, and the two power electrodes are respectively connected to the two power contacts of the RF chip through a wire.
4. The packaging structure with an embedded high-dielectric layer as described in claim 2, characterized in that, A portion of the two power electrodes is covered by the package housing, while the other portion is exposed in the groove. The package structure with an embedded high dielectric layer includes a dielectric ceramic sheet located between the connecting pads and the two power electrodes, and the two power electrodes are respectively connected to the two power contacts of the RF chip.
5. The packaging structure with an embedded high-dielectric layer as described in any one of claims 3 to 4, characterized in that, The package housing is further provided with two second through holes, and the package structure with embedded high dielectric layer further includes two power connection pads and two second metal pillars. The two second through holes penetrate the first surface and the second surface of the package housing. The two second metal pillars are filled in the second through holes. The two power connection pads are located on the second surface and are electrically connected to the two power electrodes through the second metal pillars.
6. The packaging structure with an embedded high-dielectric layer as described in claim 1, characterized in that, The two power electrodes are located on the first surface, and the package structure with an embedded high dielectric layer includes two dielectric ceramic sheets. Each power electrode includes a separate first bonding pad and a second bonding pad. Each dielectric ceramic sheet is located between the second bonding pad and one of the connection pads, and each second bonding pad is connected to the first bonding pad and one of the power contacts of the RF chip by a wire.
7. The packaging structure with an embedded high-dielectric layer as described in claim 6, characterized in that, The package housing is further provided with two second through holes, and the package structure with embedded high dielectric layer further includes two power connection pads and two second metal pillars. The two second through holes penetrate the first surface and the second surface of the package housing. The two second metal pillars are filled in the second through holes. The two power connection pads are located on the second surface and are electrically connected to the first bonding pads of the two power electrodes through the second metal pillars.
8. The packaging structure with an embedded high-dielectric layer as described in claim 1, characterized in that, The total thickness of a capacitor structure consisting of one of the power electrodes, at least one dielectric ceramic sheet, and one of the connecting pads is 3 to 100 μm.
9. The packaging structure with an embedded high-dielectric layer as described in claim 8, characterized in that, The capacitance value of this capacitor structure is greater than 5pF.
10. The packaging structure with an embedded high-dielectric layer as described in claim 1, characterized in that, The groove is located in the central region of the first surface.
11. The packaging structure with an embedded high-dielectric layer as described in claim 1, characterized in that, The dielectric constant of the dielectric ceramic sheet is at least 50 times greater than the dielectric constant of the first dielectric material.
12. The packaging structure with an embedded high-dielectric layer as described in claim 1, characterized in that, At a frequency of 1 kHz, the dielectric constant of the first dielectric material is between 5 and 9 F / m.
13. The packaging structure with an embedded high-dielectric layer as described in claim 12, characterized in that, At a frequency of 1 kHz, the dielectric constant of the second dielectric material is greater than 250 F / m.