A new packaging structure of IGBT product

Abstract

The utility model discloses a new packaging structure of IGBT product, including wafer, the wafer top is placed with IGBT epoxy resin and diode, the IGBT is insulated gate bipolar transistor, set up the PSV epoxy resin between IGBT and diode, the PSV is vertical via structure layer, set up RDL layer on IGBT and diode, RDL layer includes Pi1 layer and Pi2 layer, including tin lead bump epoxy resin. The utility model belongs to the new packaging structure field of IGBT product, and specifically refers to IGBT product, the utility model discloses through using advanced packaging copper column and flip chip packaging's mode to replace traditional aluminum wire's mode, in addition still use BGBM to grind thin wafer thickness, and the crystal back also evaporates and deposits such as Ti, Ni, Ag and Sn compound metal material, reduces thickness geometry volume, and also increases interface adhesion and reduces peeling phenomenon, increases the thermoelectric transmission efficiency of original whole.

Description

Technical Field

[0001] This utility model belongs to the technical field of new packaging structure for IGBT products, specifically referring to a new packaging structure for IGBT products. Background Technology

[0002] IGBT, or Insulated Gate Bipolar Transistor, is a composite, fully controllable, voltage-driven power semiconductor composed of a bipolar junction transistor (BJT) and a metal-oxide-semiconductor (MOS). It combines the advantages of the high input impedance of a metal-oxide-semiconductor MOSFET and the low on-state voltage drop of a giant transistor (GTR). GTRs have low saturation voltage and high current density, but require a large drive current; MOSFETs have very low drive power and fast switching speed, but high on-state voltage drop and low current density. IGBTs combine the advantages of both devices, offering low drive power and low saturation voltage. IGBT modules are currently widely used in industrial control and power supplies, new energy power generation, and new energy vehicles. With the development of these industries, IGBT modules require high switching frequency, high power density, and high reliability.

[0003] Traditional IGBT packaging uses aluminum wire bonding to connect the chip and the substrate. However, this method has significant drawbacks: aluminum's thermoelectric efficiency, mechanical strength, and bonding ability are far lower than materials such as copper, tin, and gold, easily leading to problems such as wire bonding peeling and solder layer breakage, which can cause device failure. Furthermore, traditional packaging relies on thick wafers and aluminum wire bonding, resulting in a large package size and limited heat dissipation efficiency. Although existing technologies attempt to improve packaging materials and processes, they have not yet effectively overcome the inherent defects of aluminum wire bonding. Therefore, there is an urgent need to develop a new packaging structure to improve the reliability and performance of IGBTs. Utility Model Content

[0004] In response to the above situation and to overcome the shortcomings of the existing technology, this utility model provides a new packaging structure for IGBT products, which effectively solves the common problems of bonding wire peeling and solder layer breakage in the packaging structure of IGBT products on the market using the traditional aluminum wire bonding method. The main reason is that aluminum is far inferior to copper in terms of both thermoelectric efficiency and mechanical strength, and its bonding ability is also inferior to tin, copper and gold, which affects the performance of IGBT devices.

[0005] The technical solution adopted by this utility model is as follows: This utility model proposes a new packaging structure for IGBT products.

[0006] Furthermore, this includes: wafers; An IGBT and a diode are placed on top of the wafer. The IGBT is an insulated gate bipolar transistor. A PSV is disposed between the IGBT and the diode. The PSV is a vertical via structure layer. The IGBT and diode are provided with an RDL layer, which includes a Pi1 layer and a Pi2 layer. It includes tin-lead bumps; the tin-lead bumps are provided in two sets and placed at both ends of the IGBT, and copper pillar bumps are provided between the two sets of tin-lead bumps.

[0007] Furthermore, after the wafer undergoes back-side grinding, it is then back-side metallized for mounting the DBC ceramic copper foil substrate.

[0008] Furthermore, the tin-lead bumps and copper pillar bumps are cut and divided into two groups. The tin-lead bumps on the left side are in one group with the diode, while the copper pillar bumps and the tin-lead bumps on the right side are in another group with the IGBT.

[0009] Furthermore, the DBC ceramic copper foil substrate undergoes photoresist coating, exposure, and development. The DBC ceramic copper foil substrate includes copper foil, which is arranged in two sets, with a ceramic substrate disposed between the two sets of copper foil.

[0010] Furthermore, the DBC ceramic copper foil substrate undergoes copper etching and photoresist removal.

[0011] Furthermore, solder paste is applied to both the top and bottom of the DBC ceramic copper foil substrate. The DBC ceramic copper foil substrate is disposed on top of a copper substrate, and two sets of contact pins are symmetrically arranged at both ends of the copper foil substrate.

[0012] Furthermore, the tin-lead bump on the right is flip-chip mounted on the tin-lead bump on the left, and the copper pillar bump is connected to the ceramic DBC ceramic copper foil substrate by solder paste and then reflow soldered.

[0013] Furthermore, an epoxy resin is disposed on the copper substrate, the epoxy resin surrounds the DBC ceramic copper foil substrate and the outer ring of the contact pins, and silicone is poured inward.

[0014] Furthermore, a thermally conductive adhesive is disposed beneath the copper substrate, and a heat sink is disposed beneath the thermally conductive adhesive.

[0015] The beneficial effects of this utility model using the above structure are as follows: This utility model avoids the use of traditional surface mount aluminum wire bonding in the old IGBT packaging structure, avoids phenomena such as bonding wire peeling and solder layer breakage, improves cost, quality and yield, and this utility model has the existing advantages of advanced packaging, such as being thin and small, having a short production cycle, a large number of package inputs and outputs (I / O), and good electrothermal efficiency. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of a diode, IGBT, PSV, and wafer, representing a new packaging structure for an IGBT product proposed in this utility model.

[0017] Figure 2 This is a schematic diagram of the building RDL layer and ball-planting structure of a new packaging structure for an IGBT product proposed in this utility model;

[0018] Figure 3 This is a schematic diagram of the back grinding and cutting of a new packaging structure for an IGBT product proposed in this utility model;

[0019] Figure 4 This is a schematic diagram of a DBC ceramic copper foil substrate for a new packaging structure of an IGBT product proposed in this utility model;

[0020] Figure 5 This is a schematic diagram of the photoresist coating for a new packaging structure of an IGBT product proposed in this utility model.

[0021] Figure 6 A schematic diagram of copper etching and photoresist removal for a novel packaging structure of an IGBT product proposed in this utility model;

[0022] Figure 7 This is a schematic diagram of a new packaging structure for an IGBT product proposed in this utility model.

[0023] Figure 8 This is a schematic diagram of a flip-chip mounting structure for a new IGBT product proposed in this utility model;

[0024] Figure 9 This is a schematic diagram of the irrigation molding process for a new packaging structure of an IGBT product proposed in this utility model.

[0025] Figure 10 This is a schematic diagram of a surface-mount heat sink with a new packaging structure for an IGBT product proposed in this utility model.

[0026] Among them, 1. Diode; 2. Wafer; 3. Tin-lead bump; 4. Copper pillar bump; 5. RDL; 6. DBC ceramic copper foil substrate; 61. Copper foil; 62. Ceramic substrate; 7. Solder paste; 8. Contact lead; 9. Copper substrate; 10. Silicone; 11. Epoxy resin; 12. Thermal adhesive; 13. Heat sink.

[0027] The accompanying drawings are provided to further understand the present invention and form part of the specification. They are used together with the embodiments of the present invention to explain the present invention and do not constitute a limitation thereof. Detailed Implementation

[0028] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present utility model. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present utility model without creative effort are within the protection scope of the present utility model.

[0029] In the description of this utility model, it should be understood that the terms "upper", "lower", "front", "rear", "left", "right", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0030] like Figures 1-10 As shown, this utility model proposes a new packaging structure for IGBT products and its usage method, including:

[0031] IGBTs and diodes 1 are placed on top of wafer 2, with a PSV (protective structure via layer) between them. Vertical via structures are formed through photolithography and etching, and conductive material is filled into the vias to achieve electrical connection. RDL 5 (redistribution layer) is constructed using a 2P2M (two metal layers, two via layers) operation. Tin balls are then placed on the RDL layer to achieve efficient and reliable connection between the internal circuitry of the chip and external pins.

[0032] Two sets of tin-lead bumps 3 are positioned on both sides of the IGBT, with copper pillar bumps 4 positioned between the two sets of tin-lead bumps 3. After completing 2P2M and ball-mounting, wafer 2 undergoes BGBM (back-side grinding and back-side metallization) to reduce its thickness. Using techniques such as physical vapor deposition, a specific metal material is uniformly deposited on the bottom of wafer 2. This metal layer not only improves the heat dissipation performance of wafer 2, efficiently dissipating heat generated during operation, but also further optimizes electrical performance and enhances the reliability of its electrical connection with subsequent assembled components. The tin-lead bumps 3 and copper pillar bumps 4 are cut and divided into two groups: the tin-lead bumps 3 on the left are paired with diode 1, while the copper pillar bumps 4 and the tin-lead bumps 3 on the right are paired with the IGBT. The cutting process employs high-precision laser cutting technology to ensure the flatness and accuracy of the cutting edges, avoiding any damage to the internal structure and performance of the bumps, and providing a good foundation for subsequent assembly and circuit connection.

[0033] The DBC ceramic copper foil substrate undergoes photoresist coating, exposure, and development. The DBC ceramic copper foil substrate 6 includes copper foil 61, which is arranged in two sets. A ceramic substrate 62 is disposed between the two sets of copper foil 61. Due to its excellent insulation properties, high thermal conductivity, and good thermal expansion coefficient matching with the copper foil 61, the ceramic substrate 62 can ensure the electrical isolation and stable operation of the circuit. During the photoresist operation, by controlling the thickness and uniformity of the photoresist coating, the designed circuit pattern is transferred to the substrate surface using photolithography technology, preparing for subsequent copper etching and other processes.

[0034] The DBC ceramic copper foil substrate 6 undergoes copper etching and photoresist removal. The copper etching process uses specific etching solutions and etching process parameters based on the pattern formed by photolithography to precisely remove unwanted copper foil 61, thereby forming accurate circuit traces. The photoresist removal process uses a special photoresist remover and process steps to completely remove the photoresist that has played a guiding role in etching, ensuring that the substrate surface is clean and tidy, providing good conditions for subsequent soldering and assembly processes.

[0035] Solder paste 7 is applied to both the top and bottom of the DBC ceramic copper foil substrate 6. The DBC ceramic copper foil substrate 6 is placed on top of a copper substrate, and two sets of contact pins are symmetrically arranged at both ends of the top of the DBC ceramic copper foil substrate 6. A set of cut tin-lead bumps 3 is arranged between the two sets of contact pins. The tin-lead bumps 3 are arranged on top of the DBC ceramic copper foil substrate 6. The contact pins are soldered to the DBC ceramic copper foil substrate 6 by solder paste 7. During the soldering process, the solder paste 7 is melted by heating to achieve a firm electrical and mechanical connection between the components.

[0036] The left-side tin-lead bump 3 is flip-mounted onto the right-side tin-lead bump 3. The copper pillar bump 4 is connected to the DBC ceramic copper foil substrate 6 via solder paste 7 and then reflow soldered. The reflow process is carried out in a specialized reflow soldering equipment. By precisely controlling the heating curve, the solder in the tin-lead bump 3 undergoes processes such as melting, flowing, and wetting. Finally, after cooling, a reliable connection is achieved between the solder and components such as the copper pillar bump 4, forming a stable electrical path.

[0037] An epoxy resin 11 is disposed on top of the copper substrate, which surrounds the DBC ceramic copper foil substrate 6 and the contact pins 8. Silicone 10 is also poured inward. The epoxy resin 11 has good insulation and mechanical protection properties, which can effectively prevent the influence of external environmental factors on the internal circuit, such as moisture corrosion and mechanical impact. The silicone 10, due to its excellent flexibility and shock resistance, further enhances the stability and reliability of the entire packaging structure, and absorbs and buffers possible vibrations and impacts.

[0038] A thermally conductive adhesive 12 is disposed below the copper substrate 9, and a heat sink 13 is disposed below the thermally conductive adhesive 12. The thermally conductive adhesive 12 can efficiently transfer the heat conducted from the copper substrate 9 to the heat sink 13. The heat sink 13 is usually made of a metal material with high thermal conductivity and is designed with a special heat dissipation fin structure. By increasing the heat dissipation area, heat is quickly dissipated to the surrounding environment by means of natural convection or forced air cooling, ensuring that the IGBT can be kept within a suitable temperature range during operation, thereby maintaining its good performance and reliability.

[0039] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.

[0040] Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the present invention, the scope of which is defined by the appended claims and their equivalents.

[0041] The present invention and its embodiments have been described above. This description is not restrictive, and the accompanying drawings are only one embodiment of the present invention; the actual structure is not limited thereto. In conclusion, if those skilled in the art are inspired by this description and design similar structures and embodiments without departing from the inventive spirit of the present invention, such designs should fall within the protection scope of the present invention.

Claims

1. A new packaging structure of IGBT product, characterized in that: include: Wafer (2); An IGBT and a diode are placed on top of the wafer (2). The IGBT is an insulated gate bipolar transistor. A PSV is provided between the IGBT and the diode. The PSV is a vertical via structure layer. The IGBT and diode are provided with an RDL layer, which includes a Pi1 layer and a Pi2 layer. It includes tin-lead bumps (3); the tin-lead bumps (3) are provided in two sets and placed at both ends of the IGBT, and copper pillar bumps (4) are provided between the two sets of tin-lead bumps (3).

2. The novel packaging structure for an IGBT product according to claim 1, characterized in that: After the wafer (2) is back-side ground, it is back-side metallized for mounting the DBC ceramic copper foil substrate (6).

3. The new packaging structure of IGBT product according to claim 1, characterized in that: The tin-lead bump (3) and copper pillar bump (4) are cut and divided into two groups. The tin-lead bump (3) on the left side is in one group with the diode (1), and the copper pillar bump (4), the tin-lead bump (3) on the right side and the IGBT are in another group.

4. The novel packaging structure of an IGBT product according to claim 2, characterized in that: The DBC ceramic copper foil substrate (6) is subjected to photoresist coating, exposure and development. The DBC ceramic copper foil substrate (6) includes copper foil (61), and two sets of copper foil (61) are provided, with a ceramic substrate (62) provided between the two sets of copper foil (61).

5. The novel packaging structure of an IGBT product according to claim 4, characterized in that: The DBC ceramic copper foil substrate (6) is subjected to copper etching and photoresist removal.

6. The novel packaging structure of an IGBT product according to claim 5, characterized in that: Solder paste (7) is applied to both the top and bottom of the DBC ceramic copper foil substrate (6). The DBC ceramic copper foil substrate (6) is placed on top of the copper substrate (9), and two sets of contact pins (8) are symmetrically arranged at both ends of the copper foil substrate (6).

7. A novel packaging structure for an IGBT product according to claim 6, characterized in that: The tin-lead bump (3) on the right side is flip-chip mounted on the tin-lead bump (3) on the left side. The copper pillar bump (4) is connected to the ceramic DBC ceramic copper foil substrate (6) through solder paste (7) and is reflow soldered.

8. The new packaging structure of an IGBT product according to claim 7, characterized in that: An epoxy resin (11) is disposed on the copper substrate (9), the epoxy resin (11) surrounds the outer ring of the DBC ceramic copper foil substrate (6) and the contact pin (8), and is infused with silicone (10).

9. A novel packaging structure for an IGBT product according to claim 8, characterized in that: A thermally conductive adhesive (12) is disposed below the copper substrate (9), and a heat sink (13) is disposed below the thermally conductive adhesive (12).

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