Alternating current voltage dividing test capacitor circuit

CN224758621UActive Publication Date: 2026-09-15ZHUHAI KEZHENG INTELLIGENT TECH CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202521280489.2
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-06-20
Publication Date
2026-09-15
Estimated Expiration
2035-06-20

AI Technical Summary

Technical Problem

充放电法虽然简单,但存在充放电斜率非线性的问题,且测量精度不高

Benefits of technology

本实用新型采用交流分压法进行测量,结合开尔文连接技术,能够提供精确的电压采集和信号处理,测试精度高,特别适合小电容的测量。

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN224758621U_ABST
    Figure CN224758621U_ABST
Patent Text Reader

Abstract

The utility model relates to an alternating current partial pressure test capacitor circuit, the circuit includes DDS circuit, standard electric group R and measures electric capacity C, DDS circuit, standard electric group R and measure electric capacity C connect gradually and form the circuit loop, the utility model adopts alternating current partial pressure method to measure, combines kelvin connection technology, can provide accurate voltage collection and signal processing, and the test precision is high, especially suitable for small electric capacity measurement.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This utility model relates to the field of capacitance testing technology, and in particular to an AC voltage divider test capacitor circuit. Background Technology

[0002] Existing capacitance testing methods include the charge-discharge method and the bridge method. While the charge-discharge method is simple, it suffers from nonlinearity in the charge-discharge slope and low measurement accuracy. The bridge method is complex to operate, has limited accuracy, and requires expensive equipment. To improve the accuracy and efficiency of capacitance measurement, this invention proposes a capacitance testing circuit based on the AC voltage divider principle. This circuit overcomes the shortcomings of existing technologies and enables high-precision measurement of capacitors at different frequencies, making it particularly suitable for non-destructive testing of small capacitors and high-value components. Utility Model Content

[0003] The purpose of this invention is to provide an AC voltage divider capacitor test circuit that can accurately measure the capacitance value of a capacitor using an AC signal source and a high-precision voltage acquisition system, and has the advantages of high precision, wide frequency range, low cost, and non-destructive operation.

[0004] To achieve the above objectives, the present invention provides the following technical solution.

[0005] An AC voltage divider capacitor test circuit, the capacitor circuit includes a DDS circuit, a standard capacitor bank R and a measuring capacitor C; the DDS circuit, the standard capacitor bank R and the measuring capacitor C are connected in sequence to form a circuit loop; The DDS circuit includes a waveform generator, an amplifier circuit, and a relay; The waveform generator is connected in sequence to an amplifier circuit and a relay, and the relay is equipped with different reference resistors. The DDS circuit is also equipped with an RMS to DC acquisition circuit. The RMS to DC acquisition circuit includes an instrumentation amplifier and an ADC; The instrumentation amplifier is connected to an ADC, which is connected to the MCU via an I2C interface; The ADC is connected to the DDS circuit and is used to acquire the voltage signal across the reference resistor and / or the capacitor C under test.

[0006] Preferably, the circuit further includes a power supply and an isolation chip. The power supply is connected to the resistance and capacitance sampling circuit of the DDS circuit via the isolation chip to supply power to the capacitance test circuit.

[0007] Preferably, the circuit further includes an interface circuit, which includes a connector. The connector is connected to the MCU to achieve communication and power interconnection with the main control board.

[0008] Preferably, the interface circuit is further provided with an EEPROM for storing relevant information and calibration parameters.

[0009] Technical advantages: This invention uses the AC voltage divider method for measurement, combined with Kelvin connection technology, which can provide accurate voltage acquisition and signal processing, and has high testing accuracy, making it particularly suitable for measuring small capacitors.

[0010] This invention generates an adjustable frequency sine wave signal through a DDS circuit, enabling capacitor testing at different frequencies and adapting to testing needs under different working conditions.

[0011] Because this invention uses AC signals for measurement, it will not cause charging and discharging damage to the capacitor under test, thus having the advantage of non-destructive testing. It is particularly suitable for testing high-value and sensitive components.

[0012] This invention adopts a modular design, which facilitates integration into automated testing systems, improves testing efficiency, and reduces human error. It can be widely used in FCT, ICT, and other test fixtures.

[0013] The components used in this invention are low-cost, the circuit structure is simple, it is suitable for mass production, and it has a high cost-performance ratio.

[0014] This invention can be used to measure various types of capacitors, such as electrolytic capacitors, ceramic capacitors, and film capacitors, and has strong adaptability. Attached Figure Description

[0015] Figure 1 This is the overall circuit block diagram of this embodiment.

[0016] Figure 2 This is a simulation diagram of the AC voltage divider capacitor test circuit in this embodiment.

[0017] Figure 3 This is a schematic diagram of the simulation results of the AC voltage divider capacitor test circuit in this embodiment.

[0018] Figure 4 This is a schematic diagram of the excitation power supply circuit in this embodiment.

[0019] Figure 5 This is a schematic diagram of the DDS circuit in this embodiment.

[0020] Figure 6 This is a schematic diagram of the RMS to DC circuit in this embodiment.

[0021] Figure 7 This is a schematic diagram of the interface circuit in this embodiment. Detailed Implementation

[0022] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0023] Please see Figure 1-7 This embodiment provides an AC voltage divider test capacitor circuit, which includes a DDS circuit, a standard capacitor bank R, and a measuring capacitor C; the DDS circuit, the standard capacitor bank R, and the measuring capacitor C are connected in sequence to form a circuit loop. The DDS circuit includes a waveform generator, an amplifier circuit, and a relay; The waveform generator is connected in sequence to an amplifier circuit and a relay, and the relay is equipped with different reference resistors. The RMS to DC acquisition circuit includes an instrumentation amplifier; The DDS circuit is also equipped with an RMS to DC acquisition circuit. The RMS to DC acquisition circuit includes an instrumentation amplifier and an ADC; The instrumentation amplifier is connected to an ADC, which is connected to the MCU via an I2C interface; The ADC is connected to the DDS circuit and is used to acquire the voltage signal across the reference resistor and / or the capacitor C under test.

[0024] Preferably, the circuit further includes a power supply and an isolation chip. The power supply is connected to the resistance and capacitance sampling circuit of the DDS circuit via the isolation chip to supply power to the capacitance test circuit.

[0025] Preferably, the circuit further includes an interface circuit, which includes a connector. The connector is connected to the MCU to achieve communication and power interconnection with the main control board.

[0026] Preferably, the port circuit is further provided with an EEPROM for storing relevant information and calibration parameters.

[0027] In this embodiment, the circuit includes a power supply, a DDS circuit, an RMS to DC acquisition circuit, and an interface circuit. It works by providing an AC excitation signal source (DDS) to a standard resistor R, which, together with the capacitor under test (C), forms a complete circuit loop. The voltage signal across the standard resistor is acquired by an instrumentation amplifier, and the RMS value Vr at the amplifier's output is calculated. Similarly, the voltage signal across the capacitor under test (Cx) is acquired by the instrumentation amplifier, and the RMS value Vc at its output is calculated. According to the principle of series circuits, the current flowing through the standard resistor is equal to the current flowing through the capacitor under test (Cx). Therefore, according to the capacitance formula, Cx = Vr / Rref / 2 / π / F / Vc can be calculated. The power supply of this circuit is connected to the DDS circuit and the resistor-capacitor sampling circuit through an isolation chip, and is used to power the capacitor test circuit. The DDS circuit uses the AD9833 due to its excellent parameters, low power consumption, wide frequency range, and high resolution. Utilizing these characteristics, the signal is filtered by both low-pass and high-pass filters, then amplified to generate a + / - 1V AC excitation source. This AC signal is then divided by a relay using different reference resistors (50R / 500R) and the capacitor under test. The voltage signal across the standard resistor is then acquired by an instrumentation amplifier. Switching the relay again triggers the instrumentation amplifier to acquire the voltage signal across the capacitor under test (Cx). For the RMS to DC circuit, the AD8436 is selected, which has the characteristics of cross-linearity, low power consumption, and RMS to DC conversion. It can save a lot of computing power of the ADC. The 16-bit ADS1115 can be selected. The conversion chip converts the AC signal collected by the instrumentation amplifier into DC power, and then the DC voltage is collected by the ADC chip. The interface circuit communicates and connects to the main control board via a connector. The circuit also includes an EEPROM to store relevant information and calibration parameters of the module, and provides isolation between SPI / I2C signals.

[0028] Right now: 1. Capacitor circuit structure The capacitor circuit includes a DDS circuit, a standard capacitor group R, and a measuring capacitor C, which are connected in sequence to form a circuit loop.

[0029] 2. DDS circuit The DDS circuit includes a waveform generator (AD9833), an amplifier circuit, and a relay. The waveform generator is connected in sequence to the amplifier circuit and the relay, and the relay is equipped with different reference resistors to achieve different resistance values.

[0030] 3. RMS to DC acquisition circuit The RMS to DC acquisition circuit includes an instrumentation amplifier (AD8436) and an ADC (analog-to-digital converter). The instrumentation amplifier is connected to the ADC to acquire the voltage signal across the reference resistor and / or the capacitor under test, and converts the signal into digital data via the ADC. The ADC exchanges data with the main control unit (MCU) via an I2C interface.

[0031] 4. Power supply and isolation circuits The circuit also includes a power supply and an isolation chip. The power supply is connected to the resistance and capacitance sampling circuit of the DDS circuit through the isolation chip, providing power to the capacitance testing circuit and ensuring the stability and safety of the circuit.

[0032] 5. Interface circuit The circuit includes an interface circuit that communicates and connects to the main control board via a connector. The interface circuit also includes an EEPROM for storing relevant information and calibration parameters.

[0033] The working principle is as follows: 1. AC signal source The DDS circuit (AD9833) generates a sinusoidal signal of a certain frequency, which is then filtered by low-pass and high-pass filters before being output to a relay. The relay uses different reference resistors (e.g., 50Ω or 500Ω) and together with the capacitor C being measured, forms a circuit loop.

[0034] 2. Voltage Acquisition The voltage signals across the standard resistor R and the capacitor C under test are acquired using an instrumentation amplifier (AD8436), and their RMS values ​​are calculated. According to the principle of series circuits, the ratio of the voltage signals across the standard resistor and the capacitor is proportional to the capacitance value. The capacitance value is then calculated using a known formula.

[0035] 3. RMS to DC conversion The AC signal acquired by the instrumentation amplifier is converted into a corresponding DC voltage signal through an RMS to DC conversion circuit. This signal is then converted from analog to digital by an ADC chip and transmitted to the main control unit (MCU).

[0036] 4. Data Processing and Display The main control unit calculates the capacitance value based on the data acquired by the ADC and displays or transmits the result to an external device through the interface circuit. The EEPROM is used to store test parameters and calibration data, ensuring the stability and repeatability of the circuit.

[0037] The above is a detailed description of the present invention in conjunction with specific embodiments, and it should not be construed that the specific embodiments of the present invention are limited to these descriptions. For those skilled in the art, any equivalent substitutions or obvious modifications made without departing from the concept of the present invention, and which have the same performance or use, should be considered as falling within the patent protection scope defined by the submitted claims.

Claims

1. An AC voltage divider test capacitor circuit, characterized in that: The capacitor circuit includes a DDS circuit, a standard capacitor bank R, and a measuring capacitor C; the DDS circuit, the standard capacitor bank R, and the measuring capacitor C are connected in sequence to form a circuit loop; The DDS circuit includes a waveform generator, an amplifier circuit, and a relay; The waveform generator is connected in sequence to an amplifier circuit and a relay, and the relay is equipped with different reference resistors. The DDS circuit is also equipped with an RMS to DC acquisition circuit. The RMS to DC acquisition circuit includes an instrumentation amplifier and an ADC; The instrumentation amplifier is connected to an ADC, which is connected to the MCU via an I2C interface; The ADC is connected to the DDS circuit and is used to acquire the voltage signal across the reference resistor and / or the capacitor C under test.

2. The AC voltage divider test capacitor circuit according to claim 1, characterized in that: The circuit also includes a power supply and an isolation chip. The power supply is connected to the resistance and capacitance sampling circuit of the DDS circuit through the isolation chip to power the capacitance test circuit.

3. The AC voltage divider test capacitor circuit according to claim 1, characterized in that: The circuit also includes an interface circuit, which includes a connector that connects to the MCU and enables communication and power interconnection with the main control board.

4. The AC voltage divider test capacitor circuit according to claim 3, characterized in that: The interface circuit is also equipped with an EEPROM for storing relevant information and calibration parameters.