A cockpit control module and digital cockpit control host

Abstract

The application provides a cockpit control module and a digital cockpit control host. The cockpit control module comprises a micro control unit, a latch circuit and a system level chip. A power supply end of the latch circuit is connected with a power supply end of the cockpit control module. A control signal end of the latch circuit is connected with the micro control unit. An output signal end of the latch circuit is connected with a power supply enable signal end of the system level chip. When the micro control unit receives a signal that the cockpit control module enters a suspended memory STR state, the micro control unit sends a control signal to the control signal end of the latch circuit, so that the latch circuit enters a latch state to latch an STR holding signal output to the power supply enable signal end of the system level chip through the output signal end, and the system level chip enters an STR state. The micro control unit is powered off. Therefore, the cockpit control module no longer depends on the IO holding function of the MCU in the STR state, and the MCU no longer needs to continue to work in the STR state.

Description

Technical Field

[0001] This application relates to the field of cockpit control module technology, specifically to a cockpit control module and a digital cockpit control host. Background Technology

[0002] Currently, when the cockpit control module enters or exits the STR (Suspend to RAM) state, its MCU (Microcontroller Unit) needs to perform relevant control. Specifically, the host or system where the cockpit control module resides can be referred to as the complete machine. When the complete machine enters the STR state, the MCU first controls the SOC (System On Chip) to enter the STR state. After confirming that the SOC has switched from the normal state to the STR state, the MCU then enters the STR state. When the complete machine exits the STR state, the MCU first exits the STR state, and then the MCU wakes up the SOC, causing the SOC to exit the STR state.

[0003] Furthermore, in STR state, the entire device is in a hibernation state, with its operating state (including memory contents) stored in RAM. Most other devices in the device (including the CPU core, peripherals, storage, etc.) are powered off or enter low-power mode. Upon wake-up, the device can quickly return to its state before hibernation. However, even in low-power mode, the MCU still needs to perform some tasks (such as I / O hold functionality) and maintain wake-up monitoring capabilities to wake up the SOC. Therefore, in STR state, the MCU still consumes some power. This places high demands on the MCU: firstly, the MCU needs to support I / O hold functionality in STR state; secondly, the MCU needs to have extremely low power consumption in STR state. These high requirements undoubtedly increase the design difficulty and cost of the MCU.

[0004] In view of the above, this application is hereby submitted. Utility Model Content

[0005] This application aims to provide a cockpit control module and a digital cockpit control host, so that when the cockpit control module enters the STR state, it no longer relies on the IO hold function that the MCU must have, and the MCU no longer needs to continue to work in the STR state, thereby reducing the requirements of the MCU and thus reducing the design difficulty and cost of the MCU.

[0006] In a first aspect, embodiments of this application provide a cockpit control module, including:

[0007] Microcontroller units, latch circuits, and system-on-a-chip (SoC);

[0008] The power supply terminal of the latch circuit is connected to the power supply terminal of the cockpit control module;

[0009] The control signal terminal of the latch circuit is connected to the microcontroller unit;

[0010] The output signal terminal of the latch circuit is connected to the power enable signal terminal of the system-on-a-chip.

[0011] When the microcontroller receives a signal that the cockpit control module has entered the suspended to memory STR state, it sends a control signal to the control signal terminal of the latch circuit, so that the latch circuit enters the latch state to latch the STR hold signal output through the output signal terminal to the power enable signal terminal of the system chip, so that the system chip enters the STR state.

[0012] The microcontroller unit is powered off.

[0013] According to the technical solution provided in the embodiments of this application, optionally, before sending the control signal to the control signal terminal of the latch circuit, the method further includes:

[0014] The microcontroller unit is connected to the system-on-a-chip (SoC). The microcontroller unit sends a notification signal to the SoC. When the SoC receives the notification signal and is ready to enter the STR state, the SoC sends a signal to the microcontroller unit to enter the suspended to memory STR state.

[0015] According to the technical solution provided in the embodiments of this application, optionally, it also includes: a real-time clock module;

[0016] The power supply terminal of the real-time clock module is connected to the power supply terminal of the cockpit control module;

[0017] The real-time clock module is connected to the microcontroller unit and is used to start timing when the microcontroller unit is powered off and send an interrupt signal to the microcontroller unit when the timing time is reached, so as to activate the microcontroller unit from the power-off state and power on the system-on-a-chip, so that the system-on-a-chip enters the normal working mode from the STR state.

[0018] Optionally, the technical solution provided in the embodiments of this application may also include: a microcontroller self-holding circuit;

[0019] The power supply terminal of the self-holding circuit of the microcontroller is connected to the power supply terminal of the cockpit control module;

[0020] The output terminal of the self-holding circuit of the microcontroller is connected to the power input terminal of the microcontroller.

[0021] The holding terminal of the self-holding circuit is connected to the self-holding power enable terminal of the microcontroller unit;

[0022] When the microcontroller receives a signal that the cockpit control module has entered the suspended to memory STR state, the microcontroller outputs a low-level signal through the self-holding power enable terminal to control the holding terminal of the microcontroller's self-holding circuit to pull low, so that the output terminal of the microcontroller's self-holding circuit pulls low the power input terminal of the microcontroller, thereby powering off the microcontroller.

[0023] According to the technical solution provided in the embodiments of this application, optionally, the microcontroller self-holding circuit further includes one or more transceiver interfaces for connecting to an external bus transceiver;

[0024] When a wake-up signal is received through one or more transceiver interfaces, the hold terminal of the microcontroller's self-holding circuit is pulled high, and the output terminal of the microcontroller's self-holding circuit pulls high the power input terminal of the microcontroller to restore power supply to the microcontroller. The microcontroller is activated from the power-off state and resumes power supply to the system-on-a-chip, enabling the system-on-a-chip to enter normal working mode from the STR state.

[0025] According to the technical solution provided in the embodiments of this application, optionally, the transceiver interface includes one or more of the following:

[0026] CAN interface, LIN interface, and Flexray interface.

[0027] According to the technical solution provided in the embodiments of this application, optionally, the microcontroller self-holding circuit further includes a control terminal, which is connected to the output terminal of the real-time clock module. When the timing time of the real-time clock module reaches the set time, the real-time clock module sends a wake-up signal to the control terminal of the microcontroller self-holding circuit through its output terminal. The holding terminal of the microcontroller self-holding circuit is pulled high, and the output terminal of the microcontroller self-holding circuit pulls high the power input terminal of the microcontroller to supply power to the microcontroller. The microcontroller is activated from the power-off state to power on the system-on-a-chip, so that the system-on-a-chip enters the normal working mode from the STR state.

[0028] According to the technical solution provided in the embodiments of this application, optionally, when the microcontroller sends a control signal to the control signal terminal of the latch circuit, the microcontroller controls the external bus transceiver connected to it to enter sleep mode.

[0029] According to the technical solution provided in the embodiments of this application, optionally, after the microcontroller unit is activated from the power-off state to power on the system-on-a-chip, the microcontroller unit controls the peripheral devices to turn on.

[0030] Secondly, this application also provides a digital cockpit control host, which includes the cockpit control module as described above.

[0031] In summary, this application proposes a cockpit control module, comprising: a microcontroller unit, a latch circuit, and a system-on-a-chip (SoC); the power supply terminal of the latch circuit is connected to the power supply terminal of the cockpit control module; the control signal terminal of the latch circuit is connected to the microcontroller unit; the output signal terminal of the latch circuit is connected to the power enable signal terminal of the SoC; when the microcontroller unit receives a signal indicating that the cockpit control module has entered a suspended to memory (STR) state, it sends a control signal to the control signal terminal of the latch circuit, causing the latch circuit to enter a latching state to latch the STR hold signal output from the output signal terminal to the power enable signal terminal of the SoC, thereby causing the SoC to enter the STR state; the microcontroller unit is powered off. When entering the STR state, the latching circuit latches and continuously outputs a high level to the power enable signal terminal of the system chip. This means that when the cockpit control module enters the STR state, it no longer relies on the IO hold function that the MCU must have. In other words, the MCU no longer needs to have the IO hold function, and it no longer needs to continue working in the STR state. This reduces the requirements for the MCU, thereby reducing the design difficulty and cost of the MCU. Attached Figure Description

[0032] Figure 1 This is a schematic diagram of the structure of a cockpit control module provided in an embodiment of this application. Figure 1 ;

[0033] Figure 2 This is a schematic diagram of the structure of a cockpit control module provided in an embodiment of this application. Figure 2 ;

[0034] Figure 3 This is a schematic diagram of the structure of a cockpit control module provided in an embodiment of this application. Figure 3 ;

[0035] Figure 4 This is a timing flowchart of the entire machine entering the STR state provided in an embodiment of this application;

[0036] Figure 5 This is a timing flowchart of the whole machine exiting the STR state provided in an embodiment of this application. Detailed Implementation

[0037] The present application will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the relevant utility model and not intended to limit the scope of the utility model. Furthermore, it should be noted that, for ease of description, only the parts relevant to the utility model are shown in the accompanying drawings.

[0038] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. This application will now be described in detail with reference to the accompanying drawings and embodiments.

[0039] Figure 1 This is a structural schematic diagram of a cockpit control module provided in an embodiment of this application. See also... Figure 1 The cockpit control module includes: a microcontroller unit 110 (MCU), a latch circuit 120, and a system-on-a-chip 130 (SOC).

[0040] The power supply terminal of the latch circuit 120 is connected to the power supply terminal 100 of the cockpit control module. The power supply terminal 100 of the cockpit control module is a continuous, uninterrupted 3.3V power supply for the entire system. It serves as the constant power supply for the cockpit control module or its host computer or system. Regardless of whether the device is powered on, powered off, or in STR mode, the power supply terminal 100 can stably output voltage, providing basic power to critical hardware. By connecting the power supply terminal of the latch circuit 120 to the power supply terminal 100 of the cockpit control module, a continuous and stable power supply to the latch circuit 120 can be ensured.

[0041] The control signal terminal of the latch circuit 120 is connected to the microcontroller unit 110. The output signal terminal of the latch circuit 120 is connected to the power enable signal terminal of the system-on-a-chip 130.

[0042] The control signal terminals of the latch circuit 120 may further include a latch enable terminal LE, an output enable terminal OE, and a data input terminal Datainput. The data input terminal Datainput transmits the "target state to be latched." The microcontroller unit (MCU) sends specific "output instructions" (e.g., a high level indicates power-on, and a low level indicates power-off) to the latch circuit through the data input terminal Datainput. The function of the latch enable terminal LE is: when the MCU sends a trigger signal (e.g., rising edge or high level) to the latch enable terminal LE, the latch circuit immediately locks the state transmitted by the current data input. Afterward, even if the data input signal changes, the output of the latch circuit remains unchanged. The function of the output enable terminal OE is: to control whether the output of the latch circuit is valid. For example, when the output enable terminal OE is high, the output of the latch circuit is valid; when the output enable terminal OE is low, the output of the latch circuit is invalid, i.e., there is no output. During state switching, the MCU can temporarily disable the output by controlling the output enable terminal OE to avoid signal conflicts. For example, when waking up from the STR state, that is, when exiting the STR state, the microcontroller unit (MCU) first turns off the output of the latch circuit by controlling the output enable terminal OE, then updates the signal transmitted by the Data input, and finally controls the output enable terminal OE to turn on the output of the latch circuit again, thus achieving a smooth state transition.

[0043] Specifically, when the microcontroller unit 110 receives a signal that the cockpit control module has entered the suspended to memory STR state, it sends a control signal to the control signal terminal of the latch circuit 120, so that the latch circuit 120 enters the latch state to latch the STR hold signal output through the output signal terminal to the power enable signal terminal of the system-on-a-chip 130 (this power enable signal terminal varies depending on different application scenarios, and its essence is an I / O interface that cannot be powered off, generally some I / O interfaces responsible for critical functions, such as I / O interfaces responsible for detecting whether the power button is pressed), so that the system-on-a-chip 130 enters the STR state; the microcontroller unit 110 is powered off.

[0044] Thus, during the STR state, the SOC enters deep sleep mode, and the CPU core of the SOC shuts down, for example, only maintaining power to the RAM. At this time, the output signal terminal of the latch circuit 120 can stably and continuously output the STR hold signal (e.g., high level) to the power enable signal terminal of the system-on-a-chip 130, realizing the IO hold function. After sending the control signal to the control signal terminal of the latch circuit 120, the microcontroller unit 110 no longer needs to perform any operation, so the microcontroller unit 110 can be completely powered off. This realizes that when the cockpit control module enters the STR state, it no longer relies on the IO hold function that the MCU must have, or in other words, the MCU no longer needs to have the IO hold function, and the MCU no longer needs to continue working in the STR state, reducing the requirements for the MCU, and thus reducing the design difficulty and cost of the MCU.

[0045] Furthermore, the microcontroller unit 110 is also connected to the system-on-a-chip 130. Before sending a control signal to the control signal terminal of the latch circuit 120, the microcontroller unit 110 sends a notification signal to the system-on-a-chip 130. When the system-on-a-chip 130 receives the notification signal and is ready to enter the STR state, the system-on-a-chip 130 sends a signal to the microcontroller unit 110 to enter the suspended to memory STR state.

[0046] Furthermore, in some implementations, see [link to implementation details]. Figure 2 The diagram shows a structural schematic of a cockpit control module. Based on the above embodiment, this embodiment further adds a real-time clock module 210. The power supply terminal of the real-time clock module 210 is connected to the power supply terminal 100 of the cockpit control module.

[0047] The real-time clock module 210 is connected to the microcontroller unit 110 and is used to start timing when the microcontroller unit 110 is powered off. Upon reaching the set time, it sends an interrupt signal to the microcontroller unit 110 to activate it from the power-off state and power on the system-on-a-chip (SoC) 130, allowing the SoC 130 to enter normal operating mode from the STR state. In other words, after the microcontroller unit 110 is activated from the power-off state, it can further control the SoC 130 to wake up. Specifically, the microcontroller unit 110 powers on the SoC 130, thereby waking it up.

[0048] The functions of the real-time clock module 210 include: independent timing, providing a time base, and triggering timed tasks. A real-time clock (RTC) module can be, for example, a real-time clock circuit or a real-time clock chip.

[0049] The alarm clock output terminal RTC_INT of the real-time clock module 210 is connected to the external interrupt terminal of the microcontroller unit 110. When the timing time is reached, a level transition signal is sent from the alarm clock output terminal of the real-time clock module 210 to the external interrupt terminal of the microcontroller unit 110 to activate the microcontroller unit 110 from the power-off state. The interrupt signal includes the level transition signal.

[0050] This embodiment, by adding a real-time clock module, implements a switching scheme for the STR state using a combination of latching and timing circuits. Before entering the STR state, the microcontroller unit (MCU) sends an STR entry signal to the system-on-a-chip (SOC). Once the SOC is ready, it returns a handshake signal to the MCU confirming readiness to enter the STR state. At this time, the MCU controls the latching circuit to enter latching mode, latching and holding the signal indicated by the SOC. Simultaneously, the MCU configures the real-time clock module to start timing. Since the MCU no longer needs to perform any operations, it is completely powered off, and the entire machine containing the cockpit control module (e.g., the digital cockpit head unit, DHU) enters the STR state. If the timing expires, the real-time clock module outputs an interrupt signal to the MCU, thereby activating the MCU from the power-off state. The MCU is then powered back on, and subsequently powers the SOC, causing the entire machine to exit the STR state and enter normal operation. When the cockpit control module enters the STR state, it no longer relies on the IO hold function that the microcontroller unit (MCU) must have. In other words, the MCU no longer needs to have the IO hold function, and it no longer needs to continue working in the STR state. This reduces the requirements for the MCU, thereby reducing the design difficulty and cost of the MCU.

[0051] Furthermore, in some implementations, see [link to implementation details]. Figure 3 The diagram shows a structural schematic of a cockpit control module. Based on the above embodiment, this embodiment further adds a microcontroller self-holding circuit 310. The power supply terminal of the microcontroller self-holding circuit 310 is connected to the power supply terminal 100 of the cockpit control module; the output terminal MCU_STB_3V3 of the microcontroller self-holding circuit 310 is connected to the power input terminal of the microcontroller 110.

[0052] The hold terminal MCU_3V3_HOLD of the microcontroller self-holding circuit 310 is connected to the self-holding power enable terminal of the microcontroller.

[0053] When the microcontroller unit 110 receives a signal indicating that the cockpit control module has entered the STR (Suspended to Memory) state, it outputs a low-level signal through its self-holding power enable terminal. This signal controls the holding terminal MCU_3V3_HOLD of the self-holding circuit 310 to pull low, causing the output terminal MCU_STB_3V3 of the self-holding circuit 310 to pull low the power input terminal of the microcontroller unit 110, thus powering off the microcontroller unit 110. Pulling the output terminal MCU_STB_3V3 of the self-holding circuit 310 low means that the output terminal MCU_STB_3V3 of the self-holding circuit 310 outputs a low-level signal. Similarly, "pull high" as mentioned below means outputting a high-level signal.

[0054] The microcontroller self-holding circuit 310 also includes one or more transceiver interfaces for connecting to an external bus transceiver. When a wake-up signal is received through the one or more transceiver interfaces, the holding terminal of the microcontroller self-holding circuit 310 is pulled high (i.e., the holding terminal outputs a high-level signal), and the output terminal MCU_STB_3V3 of the microcontroller self-holding circuit 310 is pulled high (i.e., the output terminal MCU_STB_3V3 outputs a high-level signal). The power input terminal of the microcontroller unit 110 resumes power supply to the microcontroller unit, and the microcontroller unit 110 is activated from the power-off state to power on the system-on-a-chip 130, enabling the system-on-a-chip 130 to enter the normal working mode from the STR state.

[0055] The transceiver interface includes one or more of the following: CAN interface, LIN interface, and Flexray interface.

[0056] In some embodiments, the microcontroller self-holding circuit 310 further includes a control terminal, which is connected to the output terminal of the real-time clock module 210. When the timing time of the real-time clock module 210 reaches the set time, the real-time clock module 210 sends a wake-up signal to the control terminal of the microcontroller self-holding circuit 310 through its output terminal. The holding terminal of the microcontroller self-holding circuit 310 is pulled high, and the output terminal of the microcontroller self-holding circuit 310 pulls high the power input terminal of the microcontroller unit 110 to restore power supply to the microcontroller unit 110. The microcontroller unit 110 is activated from the power-off state to power on the system-on-a-chip 130, so that the system-on-a-chip 130 enters the normal working mode from the STR state.

[0057] When entering the STR state, the microcontroller unit 110 sends a control signal to the control signal terminal of the latch circuit 130, and the microcontroller unit 110 controls the external bus transceiver connected to it to enter sleep mode.

[0058] Specifically, before entering the STR state, the microcontroller unit (MCU) sends an STR entry signal to the system-on-a-chip (SOC). Once the SOC is ready, it returns a handshake signal to the MCU confirming readiness to enter the STR state. At this time, the MCU controls the latch circuit to enter latch mode, latching the signals that need to be held. Simultaneously, the MCU switches the external bus transceiver (e.g., CAN, LIN, Flexray controllers) into sleep mode, meaning the corresponding transceiver interface (e.g., CAN_INH, LIN_INH, Flexray_INH) is pulled low. The MCU also configures the real-time clock module (RTC) to start timing and simultaneously pulls the hold signal MCU_3V3_HOLD low. Pulling the hold signal MCU_3V3_HOLD low prevents the MCU self-hold circuit from opening, thus preventing power supply to the MCU. The MCU is then completely powered off, and the entire device enters the STR state. If an external bus transceiver (e.g., CAN, LIN, Flexray) receives a wake-up signal, or if the real-time clock module (RTC) reaches a set value and generates an interrupt, the microcontroller unit's (MCU) self-hold circuit is activated to power the MCU, thereby activating it. The MCU then powers the system-on-a-chip (SoC), and the entire system exits the STR state and enters normal operation. This eliminates the reliance on the IO hold function required by the MCU when the cockpit control module enters the STR state. In other words, the MCU no longer needs to have IO hold functionality, and it no longer needs to continue operating in the STR state, reducing the requirements on the MCU and consequently lowering its design complexity and cost.

[0059] Correspondingly, see reference as follows Figure 4 The diagram shows the timing flow chart for the entire machine entering the STR state, and as shown below... Figure 5 The following is a timing flowchart of the entire machine exiting the STR state:

[0060] S1. The machine is in normal working condition.

[0061] S2. Determine whether to enter the STR state. If yes, proceed to step S3; otherwise, continue in normal working state.

[0062] S3. The microcontroller unit (MCU) notifies the system-on-a-chip (SOC) to enter the STR state.

[0063] S4. The system-on-a-chip (SOC) confirms whether it has entered the STR state. If so, proceed to step S5; otherwise, continue in normal working state.

[0064] S5. The System-on-Chip (SOC) sends a signal to the Microcontroller Unit (MCU) indicating that it is ready to enter the STR state.

[0065] S6. The microcontroller unit (MCU) controls the latch circuit to enter latch mode.

[0066] S7, the latch circuit pulls up the corresponding power enable pin.

[0067] S8. Determine whether the system-on-a-chip (SOC) has successfully entered the STR state. If yes, proceed to step S9; otherwise, return to step S3.

[0068] S9: The microcontroller unit (MCU) shuts down peripheral devices such as the SOC, controls the external bus transceiver to enter sleep mode, and configures the real-time clock module to start timing.

[0069] External bus transceivers include, for example, CAN, LIN, Flexray, etc.

[0070] Real-time clock modules, external bus transceivers, and SOCs are all peripheral devices of microcontroller units (MCUs). Besides these, MCU peripherals typically include BT / wifi modules, built-in power amplifier chips, and A2B chips. Here, except for specially handled peripherals (such as real-time clock modules and external bus transceivers), all other peripherals are disabled. BT / wifi modules are modular components integrating Bluetooth and wireless network functions; A2B chips are dedicated chips based on Automotive Audio Bus technology, used to achieve high-speed audio data transmission and control signal interaction between multiple devices. S10: Determine whether the peripheral devices have been successfully disabled and whether the external bus transceiver has successfully entered sleep mode. If yes, proceed to step S11; otherwise, return to step S3.

[0071] S11, the microcontroller unit (MCU) pulls its hold signal low.

[0072] S12, Microcontroller Unit (MCU) power off.

[0073] S13, The entire machine enters STR state.

[0074] When exiting the STR state, such as Figure 5 As shown:

[0075] S51, the entire machine is in STR state.

[0076] S52. Determine whether the real-time clock module has generated an interrupt or whether the external bus transceiver has been woken up. If so, proceed to step S53; otherwise, remain in the STR state.

[0077] S53. Turn on the self-holding circuit of the microcontroller unit (MCU) to supply power to the MCU.

[0078] S54, Microcontroller Unit (MCU) starts.

[0079] The latching circuit is disabled by default.

[0080] The S55 microcontroller unit (MCU) powers on the system-on-a-chip (SOC) and turns on peripheral devices.

[0081] In other words, in addition to powering on the system-on-a-chip (SoC), it also includes powering on other peripheral devices outside the SoC.

[0082] S56, The machine enters normal working mode.

[0083] Based on the same inventive concept, this application also provides a digital cockpithead unit (DHU), which includes the cockpit control module as described above.

[0084] In addition to the cockpit control module and digital cockpit control host described above, embodiments of this application also provide a computer program product, which includes computer program instructions that, when executed by a processor, cause the processor to perform the method steps involved in the embodiments of this application.

[0085] The computer program product can be written in any combination of one or more programming languages ​​to perform the operations of the embodiments of this application. The programming languages ​​include object-oriented programming languages ​​such as Java and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on the user's computing device, partially on the user's computing device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0086] Furthermore, embodiments of this application also provide a computer-readable storage medium having computer program instructions stored thereon, which, when executed by a processor, cause the processor to perform the method steps provided in any embodiment of this application.

[0087] The computer-readable storage medium may be any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may, for example, include, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: electrical connections having one or more wires, portable disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0088] It should be noted that the terminology used in this application is for the purpose of describing specific embodiments only and is not intended to limit the scope of this application. As shown in the specification and claims of this application, unless the context clearly indicates otherwise, words such as "a," "an," "an," and / or "the" do not specifically refer to the singular and may also include the plural. The terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, or apparatus. Without further limitations, an element defined by the phrase "comprising an..." does not exclude the presence of other identical elements in the process, method, or apparatus that includes said element.

[0089] It should also be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. Unless otherwise expressly specified and limited, the terms "installed," "connected," "linked," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two elements. For those skilled in the art, the specific meaning of the above terms in this application can be understood according to the specific circumstances.

[0090] This document uses specific examples to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of this application. The above descriptions are only preferred embodiments of this application. It should be noted that due to the limitations of textual expression, while there are objectively infinite specific structures, those skilled in the art can make several improvements, modifications, or changes without departing from the principles of this utility model, and can also combine the above technical features in an appropriate manner. These improvements, modifications, changes, or combinations, or the direct application of the concept and technical solution of the utility model to other occasions without modification, should all be considered within the scope of protection of this application.

Claims

1. A cockpit control module, characterized in that, include: Microcontroller units, latch circuits, and system-on-a-chip (SoC); The power supply terminal of the latch circuit is connected to the power supply terminal of the cockpit control module; The control signal terminal of the latch circuit is connected to the microcontroller unit; The output signal terminal of the latch circuit is connected to the power enable signal terminal of the system-on-a-chip. When the microcontroller receives a signal that the cockpit control module has entered the suspended to memory STR state, it sends a control signal to the control signal terminal of the latch circuit, so that the latch circuit enters the latch state to latch the STR hold signal output through the output signal terminal to the power enable signal terminal of the system chip, so that the system chip enters the STR state. The microcontroller unit is powered off.

2. The cockpit control module according to claim 1, characterized in that, Before sending the control signal to the control signal terminal of the latch circuit, the method further includes: The microcontroller unit is connected to the system-on-a-chip (SoC). The microcontroller unit sends a notification signal to the SoC. When the SoC receives the notification signal and is ready to enter the STR state, the SoC sends a signal to the microcontroller unit to enter the suspended to memory STR state.

3. The cockpit control module according to claim 1, characterized in that, Also includes: Real-time clock module; The power supply terminal of the real-time clock module is connected to the power supply terminal of the cockpit control module; The real-time clock module is connected to the microcontroller unit and is used to start timing when the microcontroller unit is powered off and send an interrupt signal to the microcontroller unit when the timing time is reached, so as to activate the microcontroller unit from the power-off state and power on the system-on-a-chip, so that the system-on-a-chip enters the normal working mode from the STR state.

4. The cockpit control module according to claim 1, characterized in that, Also includes: Microcontroller self-holding circuit; The power supply terminal of the self-holding circuit of the microcontroller is connected to the power supply terminal of the cockpit control module; The output terminal of the self-holding circuit of the microcontroller is connected to the power input terminal of the microcontroller. The holding terminal of the self-holding circuit is connected to the self-holding power enable terminal of the microcontroller unit; When the microcontroller receives a signal that the cockpit control module has entered the suspended to memory STR state, the microcontroller outputs a low-level signal through the self-holding power enable terminal to control the holding terminal of the microcontroller's self-holding circuit to pull low, so that the output terminal of the microcontroller's self-holding circuit pulls low the power input terminal of the microcontroller, thereby powering off the microcontroller.

5. The cockpit control module according to claim 4, characterized in that, The microcontroller self-holding circuit also includes one or more transceiver interfaces for connecting to an external bus transceiver; When a wake-up signal is received through one or more transceiver interfaces, the hold terminal of the microcontroller self-holding circuit is pulled high, and the output terminal of the microcontroller self-holding circuit pulls high the power input terminal of the microcontroller to restore power supply to the microcontroller. The microcontroller is activated from the power-off state and resumes power supply to the system-on-a-chip, so that the system-on-a-chip enters the normal working mode from the STR state.

6. The cockpit control module according to claim 5, characterized in that, The transceiver interface includes one or more of the following: CAN interface, LIN interface, and Flexray interface.

7. The cockpit control module of claim 5, wherein, The microcontroller self-holding circuit also includes a control terminal, which is connected to the output terminal of the real-time clock module. When the timing time of the real-time clock module reaches the set time, the real-time clock module sends a wake-up signal to the control terminal of the microcontroller self-holding circuit through its output terminal. The holding terminal of the microcontroller self-holding circuit is pulled high, and the output terminal of the microcontroller self-holding circuit pulls high the power input terminal of the microcontroller to supply power to the microcontroller. The microcontroller is activated from the power-off state, powering on the system-on-a-chip and enabling the system-on-a-chip to enter the normal working mode from the STR state.

8. The cockpit control module of claim 1, wherein, When the microcontroller sends a control signal to the control signal terminal of the latch circuit, the microcontroller controls the external bus transceiver connected to it to enter sleep mode.

9. The cockpit control module of claim 1, wherein, When the microcontroller unit is activated from a power-off state and the system-on-a-chip is powered on, the microcontroller unit controls the peripheral devices to turn on.

10. A digital cockpit control host, characterized by, The digital cockpit control host includes the cockpit control module as described in any one of claims 1 to 9.

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