A novel BUCK power supply bootstrap circuit

Abstract

The utility model relates to BUCK pipe self -boosting power supply technical field especially relates to a novel BUCK power supply self -boosting circuit, including power output and self -boosting control circuit, VCC circuit and MCU, VCC circuit is connected with MCU, MCU is connected with power output and self -boosting control circuit, power output and self -boosting control circuit include switch tube Q1, freewheeling diode D1, power inductance L1, isolation drive chip U1, self -boosting capacitor C3, self -boosting capacitor C4, isolation diode D2, isolation diode D3, switch triode Q2, switch triode Q3, switch triode Q4, current -limiting resistance R1, current -limiting resistance R2 and current -limiting resistance R3 compared with prior art, the novel BUCK power supply self -boosting circuit of the utility model acts on BUCK pipe self -boosting power supply, solved the problem of the freewheeling tube opening time being too short, and self -boosting capacitor charging deficiency.

Description

[Technical Field] This utility model relates to the field of BUCK tube bootstrap power supply technology, and in particular to a novel BUCK power supply bootstrap circuit. [Background Technology] Most existing BUCK power supplies use bootstrap power supply, which has problems such as short freewheeling diode turn-on time and insufficient charging of bootstrap capacitor. [Utility Model Content] To overcome the above problems, this utility model proposes a novel BUCK power bootstrap circuit that can effectively solve the above problems.

[0004] The present invention provides a technical solution to the above-mentioned technical problems by providing a novel BUCK power supply bootstrap circuit, including a power output and bootstrap control circuit, a VCC circuit, and an MCU. The VCC circuit is connected to the MCU, and the MCU is connected to the power output and bootstrap control circuit. The power output and bootstrap control circuit includes a switching transistor Q1, a freewheeling diode D1, a power inductor L1, an isolation driver chip U1, a bootstrap capacitor C3, a bootstrap capacitor C4, an isolation diode D2, an isolation diode D3, a switching transistor Q2, a switching transistor Q3, a switching transistor Q4, current-limiting resistors R1, R2, and R3. The switching transistor Q1 is connected to the isolation driver chip U1. The switching transistor Q1 is connected to the freewheeling diode D1, the power inductor L1, the switching transistor Q2, and the bootstrap capacitor C3. The isolation diode D2 is connected to the isolation diode D3 and the bootstrap capacitor C4. The isolation diode D3 is connected to the isolation driver chip U1, the bootstrap capacitor C3, and the current-limiting resistor R1. The current-limiting resistor R1 is connected to the switching transistors Q2 and Q3. The switching transistor Q2 is connected to the switching transistor Q4 and the bootstrap capacitor C4. The switching transistor Q3 is connected to the current-limiting resistor R2. The switching transistor Q4 is connected to the current-limiting resistor R3. The current-limiting resistors R2 and R3 are connected to the MCU. The isolation driver chip U1 is connected to the MCU. Preferably, the power output and bootstrap control circuit includes a filter capacitor C2, and the DC+ input voltage is connected to pin 1 of the filter capacitor C2 and the drain of the switching transistor Q1.

[0005] Preferably, the power output and bootstrap control circuit includes an output filter capacitor C1, the G pin of the switching transistor Q1 is connected to the 7HO pin of the isolation driver chip U1, the S pin of the switching transistor Q1 is connected to the K pin of the freewheeling diode D1, the 1 pin of the power inductor L1, the 6VS pin of the isolation driver chip U1, the C pin of the switching transistor Q2, and the 2 pin of the bootstrap capacitor C3, respectively, and the 2 pin of the power inductor L1 and the 1 pin of the output filter capacitor C1 are connected to the output VOUT.

[0006] Preferably, the A terminal of the freewheeling diode D1 is connected to SGND, and the 2nd pin of the output filter capacitor C1 is connected to SGND; the K terminal of the isolation diode D2 is connected to the A terminal of the isolation diode D3 and the 1st pin of the bootstrap capacitor C4, respectively.

[0007] Preferably, the K terminal of the isolation diode D3 is connected to pin 8VB of the isolation driver chip U1, pin 1 of the bootstrap capacitor C3, and pin 1 of the current limiting resistor R1; the 2 terminal of the current limiting resistor R1 is connected to the B terminal of the switching transistor Q2 and the C terminal of the switching transistor Q3.

[0008] Preferably, the emitter (E) of the switching transistor Q2, the collector (C) of the switching transistor Q4, and pin 2 of the bootstrap capacitor C4 are connected together.

[0009] Preferably, the emitter (E) of the switching transistor Q3 and the emitter (E) of the switching transistor Q4 are connected together with SGND.

[0010] Preferably, the base (B) of the switching transistor Q3 and pin 2 of the current-limiting resistor R2 are connected together; the base (B) of the switching transistor Q4 and pin 2 of the current-limiting resistor R3 are connected together.

[0011] Preferably, pin 1 of the current-limiting resistor R2 and pin 1 of the current-limiting resistor R3 are connected to the MCU.

[0012] Preferably, pin 2HIN of the isolation driver chip U1 is connected to the PWM pin of the MCU, and pin 4GND of the isolation driver chip U1 is connected to SGND.

[0013] Compared with existing technologies, the novel bootstrap circuit of this invention operates on the bootstrap power supply of the BUCK transistor, solving the problems of insufficient charging of the bootstrap capacitor due to the short turn-on time of the freewheeling transistor. Currently, most BUCK power supplies on the market use traditional isolated power supplies. Compared with isolated power supplies on the market, the novel bootstrap circuit of this invention not only saves costs but also solves the problem of insufficient charging of the bootstrap capacitor. [Attached Image Description] Figure 1 This is a schematic diagram of the novel BUCK power supply bootstrap circuit of this utility model.

Detailed Implementation Methods

[0016] It should be noted that in this embodiment of the invention, all directional indications (such as up, down, left, right, front, back, etc.) are limited to relative positions on the specified view, rather than absolute positions.

[0017] Furthermore, in this utility model, the use of terms such as "first," "second," etc., is for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this utility model, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0018] Please see Figure 1 The novel BUCK power supply bootstrap circuit of this utility model includes a power output and bootstrap control circuit, a VCC circuit and an MCU. The VCC circuit is connected to the MCU, and the MCU is connected to the power output and bootstrap control circuit.

[0019] The power output and bootstrap control circuit includes a switching transistor Q1, a freewheeling diode D1, a power inductor L1, an isolation driver chip U1, a bootstrap capacitor C3, a bootstrap capacitor C4, an isolation diode D2, an isolation diode D3, a switching transistor Q2, a switching transistor Q3, a switching transistor Q4, a current-limiting resistor R1, a current-limiting resistor R2, and a current-limiting resistor R3.

[0020] The switching transistor Q1 is connected to the isolation driver chip U1, and the switching transistor Q1 is connected to the freewheeling diode D1, the power inductor L1, the switching transistor Q2, and the bootstrap capacitor C3 respectively. The isolation diode D2 is connected to the isolation diode D3 and the bootstrap capacitor C4 respectively; The isolation diode D3 is connected to the isolation driver chip U1, the bootstrap capacitor C3, and the current limiting resistor R1, respectively. The current-limiting resistor R1 is connected to the switching transistors Q2 and Q3 respectively; The switching transistor Q2 is connected to the switching transistor Q4 and the bootstrap capacitor C4 respectively; The switching transistor Q3 is connected to the current-limiting resistor R2; The switching transistor Q4 is connected to the current-limiting resistor R3; The current-limiting resistors R2 and R3 are respectively connected to the MCU; The isolation driver chip U1 is connected to the MCU.

[0021] Specifically, the power output and bootstrap control circuit includes a filter capacitor C2, and the DC+ input voltage is connected to pin 1 of the filter capacitor C2 and the drain of the switching transistor Q1.

[0022] Pin 2 of the filter capacitor C2 is connected to SGND.

[0023] The power output and bootstrap control circuit includes an output filter capacitor C1. The gate (G) of the switching transistor Q1 is connected to the 7HO gate of the isolation driver chip U1. The source (S) of the switching transistor Q1 is connected to the gate (K) of the freewheeling diode D1, the gate (1) of the power inductor L1, the 6VS gate of the isolation driver chip U1, the collector (C) of the switching transistor Q2, and the gate (2) of the bootstrap capacitor C3. The gate (2) of the power inductor L1 and the gate (1) of the output filter capacitor C1 are connected to the output VOUT.

[0024] The A terminal of the freewheeling diode D1 is connected to SGND, and pin 2 of the output filter capacitor C1 is connected to SGND.

[0025] VCC is connected to the A terminal of isolation diode D2, and the K terminal of isolation diode D2 is connected to the A terminal of isolation diode D3 and pin 1 of bootstrap capacitor C4.

[0026] The K terminal of the isolation diode D3 is connected to pin 8VB of the isolation driver chip U1, pin 1 of the bootstrap capacitor C3, and pin 1 of the current limiting resistor R1.

[0027] Pin 2 of the current-limiting resistor R1 is connected to the base (B) of the switching transistor Q2 and the collector (C) of the switching transistor Q3.

[0028] The emitter (E) of the switching transistor Q2, the collector (C) of the switching transistor Q4, and pin 2 of the bootstrap capacitor C4 are connected together.

[0029] The emitter (E) of switching transistor Q3 and the emitter (E) of switching transistor Q4 are connected together with SGND.

[0030] The base (B) of the switching transistor Q3 and pin 2 of the current-limiting resistor R2 are connected together.

[0031] The base (B) of the switching transistor Q4 and pin 2 of the current-limiting resistor R3 are connected together.

[0032] Pin 1 of the current-limiting resistor R2 and pin 1 of the current-limiting resistor R3 are connected to the MCU.

[0033] The isolation driver chip U1 has its 1VCC and VCC connected together.

[0034] The 2HIN pin of the isolation driver chip U1 is connected to the PWM pin of the MCU, and the 4GND pin of the isolation driver chip U1 is connected to the SGND pin.

[0035] One I / O port of the MCU is connected to pin 2HIN of the isolation driver chip U1, and another I / O port is connected to pin 1 of current limiting resistor R3 and pin 1 of current limiting resistor R2. The MCU power supply is connected to the VCC circuit.

[0036] The VCC circuit is a power supply circuit that reduces the DC+ input voltage to 3.3V to power the MCU and to 12V (VCC) to power the bootstrap circuit and isolation chip.

[0037] The MCU section consists of a single-chip microcomputer control unit circuit.

[0038] Explanation of the principle: 1. When the PWM of the MCU connected to R2 and R3 is in a high-level state: transistors Q3 and Q4 are in a saturated state. Q4 is saturated and conducting, and the VCC current flows through pins 1 and 2 of D2 and C4, the CE terminal of Q4 to SGND to form a loop. Capacitor C4 is charged, with the charging polarity being positive at pin 1 and negative at pin 2. The charging voltage is VCC-0.7V. Since Q3 is saturated and conducting, the base of Q2 is 0.3V, and Q2 is in a cutoff state. Capacitors C4 and C3 do not form a loop, and there is no charging current for capacitor C3.

[0039] 2. When the PWM signal connected to R2 and R3 of the MCU is low: transistors Q3 and Q4 are cut off. Q4 is cut off, and C4 stops charging. After Q3 is cut off, the voltage across capacitor C4 is applied to the BE terminals of R1 and Q2 and the CE terminals of C3 and Q2 respectively through D3, causing Q2 to saturate and conduct. Since the voltage across C4 is applied to C3 through D3 after Q2 is saturated and conducting, C3 is charged. The polarity is pin 1 positive and pin 2 negative. The voltage across capacitor C3 is the voltage across capacitor C4 - 0.7V, which is VCC - 1.4V.

[0040] 3. When the BUCK is active: When the input of the U1 driver chip is high, the voltage across C3 is applied to the gate-source (GS) of Q1 through the internal drive of U1, turning Q1 on. When the input of the U1 driver chip is low, the internal drive of U1 is turned off, and C3 maintains its current voltage. Since the MCU is connected to R2 and R3 via PWM, the voltages of capacitors C4 and C3 are constantly charging and discharging. The driving current of Q1 is much smaller than the charging current of C3, so C3 maintains a constant voltage to power Q1.

[0041] Compared with existing technologies, the novel bootstrap circuit of this invention operates on the bootstrap power supply of the BUCK transistor, solving the problems of insufficient charging of the bootstrap capacitor due to the short turn-on time of the freewheeling transistor. Currently, most BUCK power supplies on the market use traditional isolated power supplies. Compared with isolated power supplies on the market, the novel bootstrap circuit of this invention not only saves costs but also solves the problem of insufficient charging of the bootstrap capacitor.

[0042] The above description is only a preferred embodiment of the present utility model and does not limit the patent scope of the present utility model. Any modifications, equivalent substitutions and improvements made within the concept of the present utility model should be included within the patent protection scope of the present utility model.

Claims

1. A novel BUCK power bootstrap circuit, characterized in that, It includes a power output and bootstrap control circuit, a VCC circuit, and an MCU, wherein the VCC circuit is connected to the MCU, and the MCU is connected to the power output and bootstrap control circuit; The power output and bootstrap control circuit includes a switching transistor Q1, a freewheeling diode D1, a power inductor L1, an isolation driver chip U1, bootstrap capacitors C3 and C4, isolation diodes D2 and D3, switching transistors Q2, Q3, and Q4, and current-limiting resistors R1, R2, and R3. The switching transistor Q1 is connected to the isolation driver chip U1, and is also connected to the freewheeling diode D1, power inductor L1, switching transistor Q2, and bootstrap capacitor C3. The isolation diode D2 is connected to... Isolation diode D3 and bootstrap capacitor C4 are connected; isolation diode D3 is connected to isolation driver chip U1, bootstrap capacitor C3, and current-limiting resistor R1; current-limiting resistor R1 is connected to switching transistor Q2 and switching transistor Q3; switching transistor Q2 is connected to switching transistor Q4 and bootstrap capacitor C4; switching transistor Q3 is connected to current-limiting resistor R2; switching transistor Q4 is connected to current-limiting resistor R3; current-limiting resistors R2 and R3 are connected to the MCU; isolation driver chip U1 is connected to the MCU.

2. The novel BUCK power bootstrap circuit as described in claim 1, characterized in that, The power output and bootstrap control circuit includes a filter capacitor C2, and the DC+ input voltage is connected to pin 1 of the filter capacitor C2 and the drain of the switching transistor Q1.

3. The novel BUCK power bootstrap circuit as described in claim 1, characterized in that, The power output and bootstrap control circuit includes an output filter capacitor C1. The gate (G) of the switching transistor Q1 is connected to the 7HO gate of the isolation driver chip U1. The source (S) of the switching transistor Q1 is connected to the gate (K) of the freewheeling diode D1, the gate (1) of the power inductor L1, the 6VS gate of the isolation driver chip U1, the collector (C) of the switching transistor Q2, and the gate (2) of the bootstrap capacitor C3. The gate (2) of the power inductor L1 and the gate (1) of the output filter capacitor C1 are connected to the output VOUT.

4. The novel BUCK power bootstrap circuit as described in claim 1, characterized in that, The A terminal of the freewheeling diode D1 is connected to SGND, and the 2nd pin of the output filter capacitor C1 is connected to SGND. The K terminal of the isolation diode D2 is connected to the A terminal of the isolation diode D3 and the 1st pin of the bootstrap capacitor C4.

5. The novel BUCK power bootstrap circuit as described in claim 1, characterized in that, The K terminal of the isolation diode D3 is connected to pin 8VB of the isolation driver chip U1, pin 1 of the bootstrap capacitor C3, and pin 1 of the current limiting resistor R1; the 2nd pin of the current limiting resistor R1 is connected to the B terminal of the switching transistor Q2 and the C terminal of the switching transistor Q3.

6. The novel BUCK power bootstrap circuit as described in claim 5, characterized in that, The emitter (E) of the switching transistor Q2, the collector (C) of the switching transistor Q4, and pin 2 of the bootstrap capacitor C4 are connected together.

7. The novel BUCK power bootstrap circuit as described in claim 1, characterized in that, The emitter (E) of switching transistor Q3 and the emitter (E) of switching transistor Q4 are connected together with SGND.

8. The novel BUCK power bootstrap circuit as described in claim 1, characterized in that, The base (B) of the switching transistor Q3 and pin 2 of the current-limiting resistor R2 are connected together; the base (B) of the switching transistor Q4 and pin 2 of the current-limiting resistor R3 are connected together.

9. The novel BUCK power bootstrap circuit as described in claim 1, characterized in that, Pin 1 of the current-limiting resistor R2 and pin 1 of the current-limiting resistor R3 are connected to the MCU.

10. The novel BUCK power bootstrap circuit as described in claim 1, characterized in that, The 2HIN pin of the isolation driver chip U1 is connected to the PWM pin of the MCU, and the 4GND pin of the isolation driver chip U1 is connected to the SGND pin.

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