A sic-mos negative voltage driving circuit and device

Abstract

The utility model discloses a kind of sic-mos negative pressure drive circuit and equipment, sic-mos negative pressure drive circuit includes isolation drive chip and drive circuit, the drive circuit includes voltage stabilizing circuit and filter circuit, the voltage stabilizing circuit and the filter circuit are connected between the VCC input end and GND output end of the isolation drive chip.In the present application, the sic_mos tube turn-off speed is accelerated by the negative pressure drive circuit, the loss is reduced, the misdirecting on phenomenon of SIC MOS tube in turn-off process is effectively prevented, so as to improve the stability and efficiency of system.

Description

Technical Field

[0001] This utility model relates to a SiC-MOS negative pressure drive circuit and device. Background Technology

[0002] Existing SIC_MOS transistor driver circuits, such as Figure 1 As shown, when pin 15 of the driver chip outputs a high level, VCC1 charges the gate-source capacitor (GS capacitor) of the SIC_MOS transistor through R1, with an amplitude of VCC1. When pin 15 of the driver chip outputs a low level, the gate (G) of the SIC_MOS transistor is pulled to GND1 through pin 15 of the driver chip. Therefore, the drive signal for the SIC_MOS transistor is a high level (VCC1) and a low level (GND1). Thus, when the driver chip outputs a low level, that is, when pin 15 is connected to pin 14 internally, the gate potential of the SIC_MOS transistor is pulled to GND1. However, in actual operation, interference may cause drive oscillation during turn-off, which can easily lead to false turn-on and damage the SIC_MOS transistor. Utility Model Content

[0003] The main purpose of this invention is to provide a SiC-MOS negative pressure drive circuit and device to solve the above-mentioned technical problems.

[0004] To achieve the above objectives, the present invention proposes a SiC-MOS negative voltage driving circuit, which includes an isolation driving chip and a driving circuit. The driving circuit includes a voltage regulator circuit and a filter circuit, and the voltage regulator circuit and the filter circuit are connected between the VCC input terminal and the GND output terminal of the isolation driving chip.

[0005] In one embodiment, the voltage regulator circuit includes a current-limiting resistor and a Zener diode connected in series. The current-limiting resistor is connected to the VCC input terminal, and the Zener diode is connected to the GND output terminal.

[0006] In one embodiment, the filter circuit includes a first capacitor and a second capacitor, which are connected in series. The first capacitor is connected to the VCC input terminal, and the second capacitor is connected to the GND output terminal.

[0007] In one embodiment, the series connection point of the current-limiting resistor and the Zener diode, as well as the series connection point of the first capacitor and the second capacitor, are connected through the S-terminus of the si-mos transistor.

[0008] In one embodiment, the sic-mos negative voltage driving circuit further includes a third capacitor, which is connected in parallel to the voltage regulator circuit.

[0009] In one embodiment, the sic-mos negative voltage drive circuit further includes a fourth capacitor, which is connected in parallel to the filter circuit.

[0010] In addition, this utility model also provides a SiC-MOS negative pressure driving device, which includes the SiC-MOS negative pressure driving circuit as described above.

[0011] In the technical solution of this utility model, the negative voltage drive circuit accelerates the turn-off speed of the SiC MOS transistor, reduces losses, and effectively prevents the SiC MOS transistor from being mis-turned on during the turn-off process, thereby improving the stability and efficiency of the system. Attached Figure Description

[0012] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0013] Figure 1 The circuit diagram for an existing SiC-MOS driver circuit; Figure 2 This is a circuit diagram of the si-mos negative voltage drive circuit according to an embodiment of the present invention.

[0014] The realization of the purpose, functional features and advantages of this utility model will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0015] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0016] It should be noted that all directional indicators (such as up, down, left, right, front, back, etc.) in this utility model embodiment are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicator will also change accordingly.

[0017] Furthermore, in this utility model, the use of terms such as "first," "second," etc., is for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this utility model, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0018] Furthermore, the technical solutions of the various embodiments of this utility model can be combined with each other, but only if they are based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such combination of technical solutions does not exist and is not within the scope of protection claimed by this utility model.

[0019] This invention provides a SiC-MOS negative voltage drive circuit.

[0020] like Figure 2 As shown, the SIC-MOS negative voltage driving circuit provided in this embodiment of the present invention includes an isolation driving chip and a driving circuit. The driving circuit includes a voltage regulator circuit and a filter circuit. The voltage regulator circuit and the filter circuit are connected between the VCC input terminal and the GND output terminal of the isolation driving chip.

[0021] In this embodiment, the isolation driver chip is the NSI6602B-QISWR, a dual-channel digital isolator manufactured using CMOS technology, integrating two independent high-speed optocoupler channels. Its pin functions are as follows: Input side: Pins 2 and 6 are signal input terminals; Pin 4 is input side ground; Pin 5 is input side power supply (requires external power supply).

[0022] Output side: Pins 10 and 9 are signal output terminals; pin 14 is the output ground; pin 15 is the output power supply (requires external power supply).

[0023] The voltage regulator circuit includes a current-limiting resistor R4 and a Zener diode D2 connected in series. The current-limiting resistor R4 is connected to the VCC input terminal, and the Zener diode D2 is connected to the GND output terminal. The filter circuit includes a first capacitor C3 and a second capacitor C4, which are connected in series. The first capacitor C3 is connected to the VCC input terminal, and the second capacitor C4 is connected to the GND output terminal. Furthermore, the series connection point of the current-limiting resistor R4 and the Zener diode D2, as well as the series connection point of the first capacitor C3 and the second capacitor C4, are connected through the source (S) terminal of a SiC_MOS transistor.

[0024] The SiC-MOS negative voltage drive circuit also includes a third capacitor C2, which is connected in parallel to the voltage regulator circuit. The SiC-MOS negative voltage drive circuit also includes a fourth capacitor C5, which is connected in parallel to the filter circuit. The first capacitor C3, the second capacitor C4, and the fourth capacitor C5 form a parallel filter capacitor combination: the large capacitor (C5) filters out low-frequency ripple, and the small capacitors (C3 and C4) filter out high-frequency noise, ensuring the stability of the VCC1 voltage.

[0025] In this application, when the driver chip outputs a low level, pin 15 of the driver chip is internally connected to pin 14, meaning the gate potential of the sic_mos transistor is pulled to the pin 14 potential GND1, while the source potential of the sic_mos transistor is... Figure 2 The diagram shows the connection between the current-limiting resistor R4 and the Zener diode D2 via series at the midpoint. Since the voltage level of VCC1 to GND1 is generally around 20V, the Zener diode D2 will conduct after the current is limited by the current-limiting resistor R4, stabilizing the voltage across it within a certain range. Therefore, the potential of S1H will be higher than GND1 and the amplitude will be the same as the Zener diode's amplitude. As a result, the gate-source voltage (GS) of the SIC_MOS transistor will generate a negative voltage with the same amplitude as the Zener diode, thus producing a negative voltage.

[0026] Furthermore, this utility model also provides a SiC-MOS negative pressure driving device, which includes the SiC-MOS negative pressure driving circuit described above. Since this SiC-MOS negative pressure driving device adopts all the technical solutions of all the above embodiments, it possesses at least all the beneficial effects brought about by the technical solutions of the above embodiments, which will not be elaborated further here.

[0027] The above description is only a preferred embodiment of the present utility model and does not limit the patent scope of the present utility model. All equivalent structural transformations made under the concept of the present utility model and using the contents of the present utility model specification and drawings, or direct / indirect applications in other related technical fields, are included in the patent protection scope of the present utility model.

Claims

1. A sic-mos negative voltage drive circuit, characterized by, The SiC-MOS negative voltage driving circuit includes an isolation driving chip and a driving circuit. The driving circuit includes a voltage regulator circuit and a filter circuit. The voltage regulator circuit and the filter circuit are connected between the VCC input terminal and the GND output terminal of the isolation driving chip.

2. The sic-mos negative voltage drive circuit according to claim 1, wherein The voltage regulator circuit includes a current-limiting resistor and a Zener diode connected in series. The current-limiting resistor is connected to the VCC input terminal, and the Zener diode is connected to the GND output terminal.

3. The SiC-MOS negative voltage drive circuit according to claim 2, characterized in that, The filter circuit includes a first capacitor and a second capacitor, which are connected in series. The first capacitor is connected to the VCC input terminal, and the second capacitor is connected to the GND output terminal.

4. The SiC-MOS negative voltage drive circuit according to claim 3, characterized in that, The series connection point of the current-limiting resistor and the Zener diode, as well as the series connection point of the first capacitor and the second capacitor, are connected through the S-terminus of the si-mos transistor.

5. The SiC-MOS negative voltage drive circuit according to claim 1, characterized in that, The SiC-MOS negative voltage driving circuit also includes a third capacitor, which is connected in parallel to the voltage regulator circuit.

6. The SiC-MOS negative voltage drive circuit according to claim 1, characterized in that, The sic-mos negative voltage drive circuit also includes a fourth capacitor, which is connected in parallel to the filter circuit.

7. A SiC-MOS negative pressure drive device, characterized in that, The sic-mos negative pressure drive device includes the sic-mos negative pressure drive circuit as described in any one of claims 1-6.

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