A wideband measurement terminal synchronous clock circuit based on a mixed signal processing architecture

Abstract

The utility model relates to power system measurement and control technical field, concretely relates to a kind of wideband measurement terminal synchronous clock circuit based on mixed signal processing framework;Including microcontroller unit, temperature sensing unit, clock generation unit, communication interface unit and analog compensation unit being set on PCB board, through analog front end compensation, the delay of temperature drift compensation is reduced from millisecond level to microsecond level, the adaptability of fast temperature change scene is stronger, through independent super-clean power supply and ground screen shielding design, the phase noise of clock signal is reduced 3-6dB, time jitter is significantly reduced, using the framework of "ordinary TCXO+innovation circuit", the performance close to OCXO is realized, the direct compensation mode of hardware circuit, more robust without relying on software thread scheduling system, and then can solve the problem of crystal oscillator temperature drift and noise interference in physics, and through a kind of innovative mixed signal processing framework, under the premise of not using OCXO, realize low cost, high-precision localization time synchronization comparable with the performance of OCXO.

Description

Technical Field

[0001] This utility model relates to the field of power system measurement and control technology, and in particular to a broadband measurement terminal synchronization clock circuit based on a hybrid signal processing architecture. Background Technology

[0002] Existing time synchronization modules in power IoT terminals mostly employ pure digital circuits or an "MCU + ordinary crystal oscillator" architecture, which suffers from the following inherent hardware defects: 1. Lagging temperature drift mitigation: Traditional solutions use software to query temperature sensors and calculate compensation, resulting in slow response and an inability to handle rapid temperature changes. 2. Severe noise interference: Digital power supply noise is easily coupled into the power supply loop of the clock circuit, leading to increased clock jitter. 3. Separate architecture: Temperature sensing, clock generation, and data processing units are physically separate, resulting in poor coordination, long signal transmission paths, and the introduction of additional delays and errors. 4. Cost-performance conflict: Achieving high timekeeping accuracy requires the use of expensive oven-controlled crystal oscillators (OCXOs), leading to high hardware costs. Utility Model Content

[0003] The purpose of this invention is to provide a broadband measurement terminal synchronization clock circuit based on a hybrid signal processing architecture, which aims to physically solve the problems of crystal oscillator temperature drift and noise interference. Through an innovative hybrid signal processing architecture, it achieves low-cost, high-precision local time synchronization comparable to that of an OCXO without using an OCXO.

[0004] To achieve the above objectives, this utility model provides a broadband measurement terminal synchronization clock circuit based on a hybrid signal processing architecture, including a microcontroller unit, a temperature sensing unit, a clock generation unit, and a communication interface unit mounted on a PCB board, and also includes an analog compensation unit.

[0005] The output terminal of the temperature sensing unit is electrically connected to the ADC input terminal of the microcontroller unit;

[0006] The DAC output or PWM output of the microcontroller unit is electrically connected to the control input of the analog compensation unit;

[0007] The analog compensation unit is implemented by an analog adder circuit consisting of an operational amplifier and its peripheral resistor network. It is used to superimpose the compensation voltage signal output by the microcontroller unit with the reference tuning voltage of the clock generation unit. The output terminal of the analog compensation unit is electrically connected to the voltage tuning terminal of the clock generation unit.

[0008] The clock output terminal of the clock generation unit is electrically connected to the external clock input pin of the microcontroller unit;

[0009] The communication interface of the microcontroller unit is electrically connected to the corresponding interface of the external main control CPU;

[0010] The PCB board adopts a 4-layer board design, providing independent ground planes for the analog power layer and digital power layer. All layers below the clock circuit area are hollowed out and isolated and shielded with via walls.

[0011] The clock generation unit and the analog compensation unit are powered by an independent ultra-low noise linear regulated power supply, and a ferrite bead is connected in series in the power supply path to isolate it from the digital power supply.

[0012] The clock generation unit, the temperature sensing unit, and the analog compensation unit are located in the same independent area on the PCB board. This area is surrounded by grounded shielding copper foil and via walls, and is physically isolated from the digital circuit area.

[0013] The temperature sensing unit is an analog temperature sensor, and its output is directly connected to the high-precision ADC sampling channel of the microcontroller unit.

[0014] Specifically, the microcontroller unit is an ARM Cortex-M7 core microcontroller with a built-in hardware floating-point arithmetic unit and digital signal processing instruction set.

[0015] This invention discloses a broadband measurement terminal synchronization clock circuit based on a hybrid signal processing architecture. Through analog front-end compensation, the delay of temperature drift compensation is reduced from milliseconds to microseconds, making it more adaptable to rapid temperature change scenarios and improving overall timekeeping accuracy by over 50%. Through independent ultra-clean power supply and ground shield design, the phase noise of the clock signal is reduced by 3-6dB, significantly reducing time jitter. Adopting an architecture of "ordinary TCXO + innovative circuit," it achieves performance close to that of an OCXO, reducing hardware costs by over 60%. The direct compensation method of the hardware circuit does not rely on software thread scheduling, ensuring effective basic compensation even under extremely high MCU loads, resulting in stronger system robustness. This physically solves the problems of crystal oscillator temperature drift and noise interference. Furthermore, through an innovative hybrid signal processing architecture, it achieves low-cost, high-precision localized time synchronization comparable to OCXO performance without using an OCXO. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below.

[0017] Figure 1 This is a block diagram of the overall hardware circuit architecture of this utility model.

[0018] Figure 2This is a schematic diagram of the analog compensation front-end circuit of this utility model (showing the connection of the operational amplifier and resistor network).

[0019] Figure 3 This is a schematic diagram of the ultra-low noise power supply circuit of this utility model.

[0020] Figure 4 This is a schematic diagram of the PCB layout of this utility model.

[0021] Figure 5 This is a flowchart of the process of this utility model.

[0022] In the diagram: 101-PCB board, 102-microcontroller unit, 103-temperature sensing unit, 104-clock generation unit, 105-communication interface unit, 106-analog compensation unit. Detailed Implementation

[0023] The embodiments of the present invention are described in detail below. Examples of the embodiments are shown in the accompanying drawings. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present invention, but should not be construed as limiting the present invention.

[0024] like Figures 1 to 5 As shown, where Figure 1 This is a block diagram of the overall hardware circuit architecture of this utility model. Figure 2 This is a schematic diagram of the analog compensation front-end circuit (showing the connections of the operational amplifier and resistor network). Figure 3 This is the schematic diagram of an ultra-low noise power supply circuit. Figure 4 This is a layout diagram of the PCB board. Figure 5 This is a flowchart of the operation of this utility model, which provides a broadband measurement terminal synchronization clock circuit based on a hybrid signal processing architecture. The circuit includes a microcontroller unit 102, a temperature sensing unit 103, a clock generation unit 104, a communication interface unit 105, and an analog compensation unit 106, all mounted on a PCB board 101. This solution physically solves the problems of crystal oscillator temperature drift and noise interference. Furthermore, through an innovative hybrid signal processing architecture, it achieves low-cost, high-precision localized time synchronization comparable to that of an OCXO without using an OCXO. It is understood that this solution can be used in scenarios requiring protection during the transport of jacks.

[0025] In this embodiment, the microcontroller unit 102, the temperature sensing unit 103, the clock generation unit 104, and the communication interface unit 105 are respectively disposed on the PCB board 101. The microcontroller unit 102 is the MCU commonly referred to in a circuit system.

[0026] The output of the temperature sensing unit 103 is electrically connected to the ADC input of the microcontroller unit 102. The analog output or digital interface of the temperature sensing unit 103 is directly connected to the high-precision 16-bit ADC pin of the microcontroller unit 102 to achieve synchronous and high-speed sampling of temperature data. The microcontroller unit 102 internally runs a Kalman filter algorithm to calculate a more refined long-term compensation amount based on historical temperature data and frequency deviation. Through the DAC output, a closed-loop negative feedback control loop is formed. This architecture combines fast analog open-loop compensation with refined digital closed-loop compensation, thus possessing both response speed and calibration accuracy.

[0027] The DAC output or PWM output of the microcontroller unit 102 is electrically connected to the control input of the analog compensation unit 106; this configuration enables control coordination with the analog compensation unit 106.

[0028] The analog compensation unit 106 is implemented by an analog adder circuit consisting of an operational amplifier and its peripheral resistor network. It is used to superimpose the compensation voltage signal output by the microcontroller unit 102 with the reference tuning voltage of the clock generation unit 104. The output terminal of the analog compensation unit 106 is electrically connected to the voltage tuning terminal of the clock generation unit 104. This application adds an analog compensation circuit before digital compensation. This circuit is implemented by an analog adder composed of a high-precision operational amplifier. Its first input is the inherent voltage-controlled tuning voltage of the TCXO (typically a 1.65V reference), and its second input is the compensation voltage signal V_comp output by the DAC (or PWM after low-pass filtering) of the microcontroller unit 102. The adder outputs a superimposed tuning voltage V_tune to the TCXO, directly and quickly fine-tuning its output frequency to achieve coarse front-end compensation for temperature changes. This process is completed in the analog domain, with a response speed in the microsecond range.

[0029] The clock output terminal of the clock generation unit 104 is electrically connected to the external clock input pin of the microcontroller unit 102.

[0030] The communication interface of the microcontroller unit 102 is electrically connected to the corresponding interface of the external main control CPU;

[0031] The PCB board 101 adopts a 4-layer board design, providing independent ground planes for the analog power layer and digital power layer. All layers below the clock circuit area are hollowed out and isolated and shielded with via walls.

[0032] Secondly, the clock generation unit 104 and the analog compensation unit 106 are powered by an independent ultra-low noise linear regulated power supply, and a ferrite bead is connected in series in the power supply path to isolate it from the digital power supply. In this application, the TCXO and the analog compensation operational amplifier are provided with an independent analog power supply generated by a dedicated ultra-low noise LDO (such as TPS7A2025). This analog power supply is isolated from the digital power supply at the input through a ferrite bead, which greatly suppresses the interference of digital circuit switching noise on the clock signal.

[0033] Then, the clock generation unit 104, the temperature sensing unit 103, and the analog compensation unit 106 are located in the same independent area on the PCB board 101. This area is surrounded by grounded shielding copper and via walls, and is physically isolated from the digital circuit area. In the layout of the PCB board 101, the entire clock and analog compensation circuit is surrounded by a complete grounded copper layer, forming a "moat" to further block external noise.

[0034] Furthermore, the temperature sensing unit 103 is an analog temperature sensor, and its output is directly connected to the high-precision ADC sampling channel of the microcontroller unit 102.

[0035] Finally, the microcontroller unit 102 is specifically an ARM Cortex-M7 core microcontroller with a built-in hardware floating-point unit and digital signal processing instruction set. In this application, the microcontroller unit 102 uses an STM32 series microcontroller, and its workflow is as follows:

[0036] Phase 1: System Initialization and Precise Synchronization

[0037] 1. Hardware initialization: STM32H743 starts up, initializes TCXO, temperature sensor, analog front-end circuit, OPA1280 is powered on, establishes a stable bias operating point, and communication interfaces (SPI, Ethernet) are ready.

[0038] 2. PTP Precision Time Synchronization: Master Clock → Sync Message → Slave Device Records t1 Master Clock → Follow_Up Message (t1 Precision Time) → Slave Device → Delay_Req Message → Records t2 Master Clock → Delay_Resp Message (t2 Precision Time) → Slave Device Transmission Delay = [(t2-t1)+(t4-t3)] / 2 Time Offset = t1-t0-Transmission Delay. Through multiple message exchanges, the impact of network asymmetry is eliminated, achieving microsecond-level time synchronization accuracy.

[0039] Phase Two: Establishment of Temperature Drift Compensation Model

[0040] 1. Data acquisition stage: The DS18B20 acquires the temperature near the TCXO at a frequency of 1Hz, and records the time deviation value calculated by PTP to establish a database of temperature-time deviation correspondence.

[0041] 2. Model training phase: The temperature drift equation is fitted using the least squares method: Δf / f0=a·(T-T0)+b·(T-T0) 2 +c·Δt generates temperature compensation parameters (a,b,c), which are stored in the Flash memory of the STM32H743.

[0042] Phase 3: Local High-Precision Timekeeping

[0043] 1. Real-time temperature monitoring: DS18B20 → Digital temperature value → STM32H743.

[0044] 2. Digital compensation calculation: The MCU reads the current temperature T_current → calculates the temperature change: ΔT=T_current-T_ref → calls the compensation model to calculate the frequency deviation: Δf=f(ΔT) → converts it to compensation voltage: V_comp=k·Δf.

[0045] 3. Precise tuning of analog front end: STM32H743 → V_comp → OPA1280 analog front end → V_tune → TCXOVC pin.

[0046] OPA1280 Operation: Pin 2 (Inverting Input): Receives reference voltage V_ref (1.65V), Pin 3 (Non-Inverting Input): Receives compensation voltage V_comp, Pin 6 (Output): Generates tuning voltage, V_tune = V_ref + G·V_comp, where G is the circuit gain, determined by the feedback resistor network.

[0047] 4. TCXO Frequency Adjustment: The TCXO fine-tunes the output frequency according to the V_tune voltage → typical voltage-controlled sensitivity: ±0.1ppm / V to ±0.5ppm / V → achieving real-time, continuous frequency calibration.

[0048] Phase Four: Time Baseline Maintenance and Distribution

[0049] 1. Master Node Working Mode: The terminal elected as the master node → broadcasts an LTS-Pro frame (containing timestamp + drift parameters) every 10 seconds → continuously runs the local timekeeping algorithm.

[0050] 2. Slave node working mode: Receive LTS-Pro frames from the master node → perform secondary compensation by combining its own temperature data → maintain time synchronization with the master node.

[0051] Phase 5: Network Recovery and Fast Convergence

[0052] 1. Time reference selection: Each node reports its local time and confidence weight → Calculates confidence based on the covariance of the Kalman filter → Selects the time of the node with the highest confidence as the reference.

[0053] 2. Smooth Convergence Algorithm: Calculate the time deviation: Δ_error = T_benchmark - T_local → Input Δ_error as the observation value into the local Kalman filter → The filter guides the local time to smoothly converge to the reference time.

[0054] This invention addresses the issues of crystal oscillator temperature drift and noise interference, achieving low-cost, high-precision local time synchronization comparable to OCXO performance without using an OCXO. Through analog front-end compensation, the delay of temperature drift compensation is reduced from milliseconds to microseconds, enhancing adaptability to rapid temperature changes and improving overall timekeeping accuracy by over 50%. Independent ultra-clean power supply and ground shielding design reduce clock signal phase noise by 3-6 dB, significantly reducing time jitter. Employing a "common TCXO + innovative circuit" architecture, it achieves near-OCXO performance while reducing hardware costs by over 60%. The direct hardware circuit compensation method does not rely on software thread scheduling, ensuring effective basic compensation even under extremely high loads on the microcontroller unit 102, resulting in stronger system robustness. This physically solves the crystal oscillator temperature drift and noise interference problems. Furthermore, through an innovative mixed-signal processing architecture, it achieves low-cost, high-precision local time synchronization comparable to OCXO performance without using an OCXO.

[0055] The above-disclosed embodiments are merely one or more preferred embodiments of this application and should not be construed as limiting the scope of this application. Those skilled in the art can understand that all or part of the processes for implementing the above embodiments and equivalent changes made in accordance with the claims of this application still fall within the scope of this application.

Claims

1. A synchronous clock circuit for a broadband measurement terminal based on a hybrid signal processing architecture, comprising a microcontroller unit, a temperature sensing unit, a clock generation unit, and a communication interface unit mounted on a PCB board, characterized in that, It also includes a simulation compensation unit; The output terminal of the temperature sensing unit is electrically connected to the ADC input terminal of the microcontroller unit; The DAC output or PWM output of the microcontroller unit is electrically connected to the control input of the analog compensation unit; The analog compensation unit is implemented by an analog adder circuit consisting of an operational amplifier and its peripheral resistor network. It is used to superimpose the compensation voltage signal output by the microcontroller unit with the reference tuning voltage of the clock generation unit. The output terminal of the analog compensation unit is electrically connected to the voltage tuning terminal of the clock generation unit. The clock output terminal of the clock generation unit is electrically connected to the external clock input pin of the microcontroller unit; The communication interface of the microcontroller unit is electrically connected to the corresponding interface of the external main control CPU; The PCB board adopts a 4-layer board design, providing independent ground planes for the analog power layer and digital power layer. All layers below the clock circuit area are hollowed out and isolated and shielded with via walls.

2. The broadband measurement terminal synchronization clock circuit based on a hybrid signal processing architecture as described in claim 1, characterized in that, The clock generation unit and the analog compensation unit are powered by an independent ultra-low noise linear regulated power supply, and a ferrite bead is connected in series in the power supply path to isolate it from the digital power supply.

3. The broadband measurement terminal synchronization clock circuit based on a hybrid signal processing architecture as described in claim 1, characterized in that, The clock generation unit, the temperature sensing unit, and the analog compensation unit are located in the same independent area on the PCB board. This area is surrounded by grounded shielded copper foil and via walls, and is physically isolated from the digital circuit area.

4. The broadband measurement terminal synchronization clock circuit based on a hybrid signal processing architecture as described in claim 1, characterized in that, The temperature sensing unit is an analog temperature sensor, and its output is directly connected to the high-precision ADC sampling channel of the microcontroller unit.

5. The broadband measurement terminal synchronization clock circuit based on a hybrid signal processing architecture as described in claim 1, characterized in that, The microcontroller unit is specifically an ARM Cortex-M7 core microcontroller with a built-in hardware floating-point arithmetic unit and digital signal processing instruction set.

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