A solar cell, a cell assembly, and a photovoltaic system

Abstract

The utility model discloses a solar cell, battery assembly and photovoltaic system. Solar cell includes: first busbar line includes first connecting conductor and fine grid line, and first connecting conductor sets up at the side of fine grid line far away from the base, second busbar line includes second connecting conductor, along the second direction, first doped layer and second doped layer are in turn and alternate arrangement, the doped type of first doped layer and second doped layer is different, and first direction and second direction cross each other, fine grid line sets up at the side of first connecting conductor adjacent first doped layer, and fine grid line and first doped layer physical contact, and first connecting conductor and first doped layer non -physical contact, second connecting conductor sets up at the side of second doped layer, and second connecting conductor and second doped layer non -physical contact, and second connecting conductor and second doped layer between not including fine grid line. The utility model can improve photoelectric conversion efficiency.

Description

Technical Field

[0001] This utility model relates to the field of solar energy technology, and in particular to a solar cell, a battery module and a photovoltaic system. Background Technology

[0002] Solar cells, as a highly efficient and clean energy conversion device, are widely used in various photovoltaic power generation systems. A solar cell consists of a silicon substrate and electrodes disposed on the silicon substrate. The electrodes and the silicon substrate are in ohmic contact, responsible for effectively collecting electrons and holes (charge carriers) generated by the silicon material under sunlight, and then converting them into usable electrical energy.

[0003] However, existing solar cells have relatively low photoelectric conversion efficiency. Utility Model Content

[0004] This invention provides a solar cell, a battery module, and a photovoltaic system to improve the photoelectric conversion efficiency of solar cells.

[0005] According to one aspect of the present invention, a solar cell is provided, comprising:

[0006] The substrate and the first and second busbars disposed on the same side of the substrate;

[0007] Both the first busbar and the second busbar extend along a first direction. The first busbar includes a first connecting conductor and a fine grid line that are electrically connected to each other. The first connecting conductor is disposed on the side of the fine grid line away from the substrate. The second busbar includes a second connecting conductor.

[0008] The substrate includes a first doped layer and a second doped layer; along a second direction, the first doped layer and the second doped layer are arranged alternately in sequence; wherein, the first doped layer and the second doped layer have different doping types, and the first direction and the second direction intersect each other;

[0009] The fine gate line is disposed on the side of the first connecting conductor adjacent to the first doped layer. The fine gate line is in physical contact with the first doped layer, while the first connecting conductor is not in physical contact with the first doped layer.

[0010] The second connecting conductor is disposed on one side of the second doped layer. The second connecting conductor is not in physical contact with the second doped layer, and there is no fine gate line between the second connecting conductor and the second doped layer.

[0011] Optionally, an antireflection layer and / or a passivation layer are disposed between the second connecting conductor and the second doped layer.

[0012] Optionally, an antireflection layer and / or passivation layer are disposed between the first doped layer and the first connecting conductor. The antireflection layer and / or passivation layer includes an opening, and the fine gate line is disposed in the opening and in physical contact with the first doped layer.

[0013] Optionally, in the same first busbar, along the first direction, the ratio of the total length of the fine grid lines to the length of the first connecting conductor is greater than 0 and less than or equal to 95%.

[0014] Optionally, along the second direction, the ratio of the width of the fine grid line to the width of the first connecting conductor is greater than or equal to 5% and less than or equal to 90%.

[0015] Optionally, the vertical projection of the first connecting conductor on the substrate overlaps the vertical projection of the fine grid line on the substrate.

[0016] Optionally, the first busbar includes at least two fine grid lines arranged at intervals along the first direction.

[0017] Optionally, along the first direction, at least two of the fine gate lines in the same first busbar are collinear; or, along the first direction, at least some of the fine gate lines in the same first busbar are not collinear with other fine gate lines.

[0018] Optionally, along the first direction, the distance between at least partially adjacent fine grid lines is equal; and / or,

[0019] Along the first direction, the distances between at least some of the adjacent fine grid lines are unequal.

[0020] Optionally, the first connecting conductor and the second connecting conductor are disposed in the same layer;

[0021] The first connecting conductor and the second connecting conductor are made of the same material.

[0022] Optionally, the solar cell further includes:

[0023] First current collector wire and second current collector wire;

[0024] The first collector wire and the second collector wire are disposed on the same side of the substrate as the first busbar, and the first collector wire and the second collector wire extend along the second direction;

[0025] At least one end of the first connecting conductor is connected to the first current collector wire, and the first current collector wire is not in physical contact with the first doped layer; at least one end of the second connecting conductor is electrically connected to the second current collector wire, and the second current collector wire is not in physical contact with the second doped layer.

[0026] Optionally, the first current collector includes a first edge bus, which is disposed at the edge of the substrate; the second current collector includes a second edge bus, which is disposed at the edge of the substrate.

[0027] The surface of the substrate on which the first busbar is disposed is a backlight surface;

[0028] The backlight surface has opposing first edges and second edges along a first direction. The backlight surface has a plurality of first connecting areas and a plurality of second connecting areas. The first connecting area includes a first edge connecting area closest to the first edge, and there is no second connecting area between the first edge connecting area and the first edge. The second connecting area includes a second edge connecting area closest to the second edge, and there is no first connecting area between the second edge connecting area and the second edge.

[0029] The backlight surface of the substrate is also provided with a plurality of first electrodes and a plurality of second electrodes, wherein the first electrodes and the second electrodes are arranged intersectingly with the first series connection area and the second series connection area.

[0030] The first electrodes include a plurality of first collection gate lines and at least one first bus gate line, wherein the first collection gate lines are discontinuous at the first series connection region and continuous at the second series connection region, and the first bus gate line is continuous at the first edge series connection region; the first collection gate lines are disposed on one side of the first doped layer and are in physical contact with the first doped layer.

[0031] The second electrodes include a plurality of second collection gate lines and at least one second bus gate line; the second collection gate lines are discontinuous at the second series connection region and continuous at the first series connection region, and the second bus gate line is continuous at the second edge series connection region; the second collection gate lines are disposed on one side of the second doped layer and are in physical contact with the second doped layer;

[0032] The first edge bus is closer to the first edge than the first edge concatenation region, and the first edge bus is electrically connected to at least a portion of the first collection grid line and to the first bus grid line.

[0033] The second edge bus is closer to the second edge than the second edge serial region, and the second edge bus is electrically connected to at least a portion of the second collection grid and to the second bus grid.

[0034] Optionally, the fine grid lines are disposed in the same layer as the first collecting grid lines and are made of the same material.

[0035] Optionally, the plurality of first series-connected regions include a first edge series-connected region closest to the second edge, and the solar cell further includes a first auxiliary connection line disposed within the first edge series-connected region. In the second direction, the first auxiliary connection line connects at least one second busbar and at least one second collection grid located on one side of the second busbar.

[0036] The second series connection area includes a second edge series connection area closest to the first edge, and the solar cell also includes a second auxiliary connection line disposed in the second edge series connection area. In the second direction, the second auxiliary connection line connects the first bus grid line and at least one of the first collection grid lines located on one side of the first bus grid line.

[0037] The solar cell further includes a first auxiliary connection line disposed within the first edge series connection area. In the second direction, the first auxiliary connection line is provided on at least one side of the first busbar. The first auxiliary connection line connects at least two second collection grid lines located on the same side of the first busbar.

[0038] The solar cell further includes a second auxiliary connection line disposed within the second edge series connection area. In the second direction, at least one side of the second busbar is provided with the second auxiliary connection line, and the second auxiliary connection line connects at least two first collection grid lines located on the same side of the second busbar.

[0039] Optionally, the first edge busbar is electrically connected to all the first collection grid lines; or, the first edge busbar is electrically connected to a portion of the first collection grid lines, and the number of first collection grid lines not electrically connected to the first edge busbar is less than or equal to 4.

[0040] The second edge bus is electrically connected to all the second collection grid lines; or the second edge bus is electrically connected to a portion of the second collection grid lines, and the number of second collection grid lines not electrically connected to the second edge bus is less than or equal to 4.

[0041] Optionally, the solar cell satisfies at least one of the following conditions:

[0042] The width of the first busbar is greater than the width of the portion of the first collection busbar located outside the second cascading area;

[0043] The width of the first edge busbar is greater than the width of the portion of the first collection grid line located outside the second serial area;

[0044] The widths of the first auxiliary connection line and the first auxiliary connection line are both greater than the width of the portion of the second collection grid line located outside the first serial connection area;

[0045] The width of the second busbar is greater than the width of the portion of the second collection busbar located outside the first cascading area;

[0046] The width of the second edge busbar is greater than the width of the portion of the second collection grid line located outside the first serial area;

[0047] The widths of the second auxiliary connecting line and the second auxiliary connecting line are both greater than the width of the portion of the first collecting grid line located outside the second serial connection area.

[0048] Optionally, the first doped layer is an n-type doped layer, and the second doped layer is a p-type doped layer.

[0049] According to another aspect of the present invention, a battery assembly is provided, including the solar cell described in any embodiment of the present invention.

[0050] According to another aspect of the present invention, a photovoltaic system is provided, including the battery module described in any embodiment of the present invention.

[0051] In this embodiment of the invention, the paste used to fabricate the fine grid lines can damage the doped layer, affecting its performance. However, the fine grid lines also improve the carrier collection efficiency. The first doped layer has a high carrier mobility, and the improvement in carrier collection efficiency from the fine grid lines outweighs the carrier loss caused by the damage to the first doped layer from the fine grid line paste. Therefore, this embodiment improves the carrier collection efficiency of the first busbar by including fine grid lines and a first connecting conductor. The second doped layer has a relatively low carrier mobility, and the carrier loss caused by the damage to the second doped layer after adding fine grid lines outweighs the improvement in carrier collection efficiency. Therefore, this embodiment ensures a high carrier collection efficiency for the second busbar by including a second connecting conductor in the second busbar, without fine grid lines between the second connecting conductor and the second doped layer. Thus, this embodiment of the invention can improve the carrier collection efficiency of the first busbar and the second return grid, thereby improving the photoelectric conversion efficiency of the solar cell.

[0052] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this utility model, nor is it intended to limit the scope of this utility model. Other features of this utility model will become readily apparent from the following description. Attached Figure Description

[0053] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0054] Figure 1 This is a schematic diagram of a solar cell provided by this utility model.

[0055] Figure 2 This is a partial schematic diagram of a solar cell provided in an embodiment of the present invention.

[0056] Figure 3 yes Figure 2 A cross-sectional view of the solar cell along section line AA.

[0057] Figure 4 This is a partial schematic diagram of another type of solar cell provided in this embodiment of the present invention.

[0058] Figure 5 yes Figure 4 A cross-sectional view of the solar cell along section line BB.

[0059] Figure 6 This is an enlarged view of a first busbar provided in an embodiment of this utility model. Detailed Implementation

[0060] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of the present invention.

[0061] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this utility model are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the utility model described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0062] This utility model embodiment provides a solar cell. Figure 1 This is a schematic diagram of a solar cell provided by this utility model. Figure 2 This is a partial schematic diagram of a solar cell provided in an embodiment of the present invention. Figure 3 yes Figure 2 A cross-sectional view of the solar cell along section line AA. Figure 4 This is a partial schematic diagram of another type of solar cell provided in this embodiment of the present invention. Figure 5 yes Figure 4 Cross-sectional view of the solar cell along section line BB (reference) Figures 1-5 The solar cells include:

[0063] The substrate 10 and the first busbar 21 and the second busbar 22 disposed on the same side of the substrate 10;

[0064] Both the first busbar 21 and the second busbar 22 extend along the first direction X. The first busbar 21 includes a first connecting conductor 211 and a fine grid line 212 that are electrically connected to each other. The first connecting conductor 211 is disposed on the side of the fine grid line 212 away from the substrate 10. The second busbar 22 includes a second connecting conductor 221.

[0065] The substrate 10 includes a first doped layer 11 and a second doped layer 12; along the second direction Y, the first doped layer 11 and the second doped layer 12 are arranged alternately in sequence; wherein, the first doped layer 11 and the second doped layer 12 have different doping types, and the first direction X and the second direction Y intersect each other;

[0066] The fine gate line 212 is disposed on the side of the first connecting conductor 211 adjacent to the first doped layer 11. The fine gate line 212 is in physical contact with the first doped layer 11, while the first connecting conductor 211 is not in physical contact with the first doped layer 11.

[0067] The second connecting conductor 221 is disposed on one side of the second doped layer 12. The second connecting conductor 221 is not in physical contact with the second doped layer 12, and there is no fine gate line between the second connecting conductor 221 and the second doped layer 12.

[0068] The substrate 10 is the foundation of the solar cell. The substrate 10 may include a silicon substrate 101 and various functional layers stacked on the silicon substrate 101. That is, the substrate 10 is the part of the solar cell excluding the metallized electrode pattern. The functional layers include a first doped layer 11 and a second doped layer 12. In addition, the functional layers may also include tunneling layers and other films. The first doped layer 11 can be an n-type doped layer, and the second doped layer 12 can be a p-type doped layer. The carrier migration rate of the first doped layer 11 is greater than that of the second doped layer 12. The silicon substrate 101 can be an n-type silicon substrate or a p-type silicon substrate. The silicon substrate 101 forms a pn junction with the p-type or n-type doped layer, generating a photovoltaic effect. When light shines on the solar cell, photons can excite electrons to jump from the valence band to the conduction band, forming electron-hole pairs. These carriers separate at the pn junction due to the electric field, generating current.

[0069] Electrodes are disposed on the substrate 10 for collecting charge carriers (electrons or holes) generated by the substrate 10. The electrodes include a first bus gate 21 and a second bus gate 22. The electrodes may also include a first collection gate 41 and a second collection gate 42. The first collection gate 41 is disposed on one side of the first doped layer 11 and is in contact with the first doped layer 11, collecting charge carriers from the first doped layer 11. The second collection gate 42 is disposed on one side of the second doped layer 12 and is in contact with the second doped layer, collecting charge carriers from the second doped layer 12. The first bus gate 21 is connected to at least a portion of the first collection gate 41 for collecting charge carriers on the first collection gate 41, and the second bus gate 21 is connected to at least a portion of the second collection gate 42 for collecting charge carriers on the second collection gate 42. The solar cell also includes a first connection structure and a second connection structure connected to a solder strip. For example, both the first connection structure and the second connection structure can be solder pads. The solder strip is used to collect charge carriers generated by the substrate 10. The first busbar 21 is connected to at least one first connection structure, and the second busbar 22 is connected to at least one second connection structure.

[0070] The first connecting conductor 211 is not in physical contact with the first doped layer 11; that is, the first connecting conductor 211 and the first doped layer 11 do not contact each other. Specifically, an insulating medium can be provided at the non-physical contact location. The first connecting conductor 211 is disposed on the substrate 10, and has a surface facing the substrate 10. The fine gate line 212 is disposed on the surface of the first connecting conductor 211 facing the substrate 10, and is in physical contact with the first doped layer 11, collecting charge carriers generated by the substrate 10. Since both the first connecting conductor 211 and the fine gate line 212 are conductors, they are electrically connected, and the first connecting conductor 211 can conduct the charge carriers collected by the fine gate line 212. The first connecting conductor 211 extends along a first direction X, and different conductor structures can be connected at both ends of the extension direction of the first connecting conductor 211. The second bus gate line 22 includes a second connecting conductor 221. The second connecting conductor 221 is not in physical contact with the second doped layer 12, that is, the second connecting conductor 221 and the second doped layer 12 do not contact each other. There is no fine gate line between the second connecting conductor 221 and the second doped layer 12. For example, an insulating layer 90 may be provided between the second connecting conductor 221 and the second doped layer 12. For example, a passivation layer 91 and an anti-reflection layer 92 may be provided.

[0071] Understandably, physical contact refers to direct material contact between two or more objects. When conductors make physical contact, the circuit is completed. Non-physical contact refers to the absence of direct material contact between objects; there is a gap between them, but this does not preclude the objects from interacting through some physical field or medium. For example, two spaced conductors can be connected through other dielectrics.

[0072] Since the paste used to fabricate the fine gate line 212 can damage the doped layer and affect its performance, but the fine gate line 212 can also improve the carrier collection efficiency, the carrier mobility of the first doped layer 11 is relatively high. Therefore, the improvement in carrier collection efficiency caused by the fine gate line 212 outweighs the carrier loss due to damage to the first doped layer 11 caused by the fine gate line 212 paste. Thus, in this embodiment, by including the fine gate line 212 and the first connecting conductor 211 in the first bus gate 21, the carrier collection efficiency of the first bus gate 21 can be improved. Conversely, the carrier mobility of the second doped layer 12 is relatively low. The carrier loss caused by damage to the second doped layer 12 after the fine gate line is set out is greater than the improvement in carrier collection efficiency. Therefore, in this embodiment, by including the second connecting conductor 221 in the second bus gate 22, and excluding the fine gate line between the second connecting conductor 221 and the second doped layer, the high carrier collection efficiency of the second bus gate is ensured. Therefore, the present invention can improve the carrier collection efficiency of the first busbar and the second return busbar, thereby improving the photoelectric conversion efficiency of the solar cell.

[0073] For example, the first doped layer is an n-type doped layer, and the second doped layer is a p-type doped layer. The n-type doped layer has a higher electron velocity, and the contact resistance between the n-type doped layer and the fine gate line 212 is lower. Therefore, the improvement in electron collection efficiency brought about by the fine gate line 212 is greater than the carrier loss caused by damage to the n-type doped layer from the fine gate line 212 paste. By including the fine gate line 212 and the first connecting conductor 211 in the first bus gate 21, the electron collection efficiency of the first bus gate 21 can be improved. Conversely, the hole mobility of the p-type doped layer is relatively low. The hole loss caused by damage to the p-type doped layer after the fine gate line is set is greater than the improvement in hole collection efficiency after setting the fine gate line. By including the second connecting conductor 221 in the second bus gate 22, and excluding the fine gate line between the second connecting conductor 221 and the p-type doped layer, the second bus gate 22 can be guaranteed to have a higher hole collection efficiency.

[0074] Based on the above embodiments, optionally, an antireflection layer 92 and / or a passivation layer 91 are disposed between the second connecting conductor 221 and the second doped layer 12.

[0075] Specifically, since the second connecting conductor 221 serves as a current collector, its width and / or height are relatively large to achieve a better current collector function. If the second connecting conductor 221 is positioned in contact with the second doped layer 12, and if a burn-through paste is used to burn through the antireflection layer 92 before contacting the second doped layer 12, the burn-through paste would cause excessive damage to the second doped layer 12, affecting battery efficiency. If a non-burn-through paste is used, openings need to be made in the antireflection layer 92 and / or passivation layer 91, increasing process steps and costs. Therefore, this embodiment places the second connecting conductor 221 on the surface of the antireflection layer 92 and / or passivation layer 91 away from the second doped layer 12, avoiding the second connecting conductor 221 affecting the quality of the second doped layer 12 and reducing process costs.

[0076] Based on the above embodiments, optionally, an antireflection layer 92 and / or a passivation layer 91 are provided between the first doped layer 11 and the first connecting conductor 211. The antireflection layer 92 and / or the passivation layer 91 includes an opening 901, and a fine gate line 212 is disposed in the opening 901 and in physical contact with the first doped layer 11.

[0077] Specifically, when an antireflection layer 92 and a passivation layer 91 are disposed between the first doped layer 11 and the first connecting conductor 211, the opening 901 penetrates through the antireflection layer 92 and the passivation layer 91. When an antireflection layer 92 is disposed between the first doped layer 11 and the first connecting conductor 211, the opening 901 penetrates through the antireflection layer 92. When a passivation layer 91 is disposed between the first doped layer 11 and the first connecting conductor 211, the opening 901 penetrates through the passivation layer 91.

[0078] After fabricating the antireflection layer 92 and / or passivation layer 91, an opening 901 can be fabricated using other processes such as etching or laser engraving. The first doped layer 11 is exposed at the opening 901, and the shape of the opening 901 is consistent with the shape of the fine gate line 212. Alternatively, the fine gate line 212 can also be fabricated using a burn-through paste. When fabricating the fine gate line 212, the paste directly burns through the antireflection layer 92 and / or passivation layer 91, making the fine gate line 212 contact the first doped layer 11.

[0079] Specifically, the passivation layer 91 can be a film layer with passivation function, such as an aluminum oxide layer. For example, the passivation layer 91 includes a stacked aluminum oxide layer and a silicon nitride layer. Of course, it can also include one or more combinations of silicon oxynitride layer, intrinsic silicon carbide layer, intrinsic amorphous silicon layer, and silicon oxide layer, without limitation. The antireflection layer 92 is used to reduce sunlight reflection, allowing more sunlight to be absorbed inside the solar cell. The antireflection layer 92 can be a film layer such as a silicon nitride layer.

[0080] Figure 6 This is an enlarged view of a first busbar provided in an embodiment of this utility model, with reference to... Figure 6 Based on the above embodiments, optionally, in the same first busbar 21, along the first direction X, the ratio of the total length of the fine grid line 212 to the length L2 of the first connecting conductor 211 is greater than 0 and less than or equal to 95%.

[0081] Specifically, the length L1 of the fine gate line 212 is the length of the vertical projection of the fine gate line 212 onto a straight line parallel to the first direction X. If a first bus gate line 21 includes one fine gate line 212, the total length of the fine gate line 212 is the length L1 of that single fine gate line 212. If a first bus gate line 21 includes two or more fine gate lines 212, the total length of the fine gate lines 212 is the sum of the lengths L1 of all the fine gate lines 212. Understandably, when multiple fine gate lines 212 are provided, if the vertical projections of multiple fine gate lines 212 onto a straight line parallel to the first direction X overlap, the length of the overlapping portion is calculated only once.

[0082] Specifically, in the same first busbar 21, along the first direction X, the ratio of the total length of the fine grid line 212 to the total length of the first connecting conductor 211 can be 5%, 10%, 15%, 20%, 30%, 40%, 45%, 50%, 60%, 65%, 70%, 80%, 85%, 90%, or other ratios, which are not limited here.

[0083] By setting the ratio of the total length of the fine gate line 212 to the length L2 of the first connecting conductor 211 in the first direction X of the same first bus gate line 21 to be greater than 0 and less than or equal to 95%, it is ensured that the fine gate line 212 can effectively transmit current and reduce the contact area between the fine gate line 212 and the first doped layer 11, thereby reducing the damage of the fine gate line 212 paste to the first doped layer 11 and further improving the carrier collection efficiency.

[0084] Based on the above embodiments, optionally, along the second direction Y, the ratio of the width W1 of the fine grid line 212 to the width W2 of the first connecting conductor 211 is greater than or equal to 5% and less than or equal to 90%.

[0085] Specifically, the first connecting conductor 211 mainly serves the function of current collection and transmission. The relatively wide width W2 of the first connecting conductor 211 reduces transmission losses during the current collection process and improves efficiency. The fine gate line 212 collects the charge carriers of the first doped layer 11 it contacts. If the width of the fine gate line 212 is too small, it will affect the carrier collection efficiency; if the width of the fine gate line 212 is too wide, it will cause significant damage to the first doped layer 11. By setting the ratio of the width W1 of the fine gate line 212 to the width W2 of the first connecting conductor 211 to be greater than or equal to 5% and less than or equal to 90%, the damage of the fine gate line 212 paste to the doped layer is reduced, ensuring the quality of the fine gate line 212.

[0086] For example, the ratio of the width W1 of the fine grid line 212 to the width W2 of the first connecting conductor 211 can be 10%, 15%, 20%, 30%, 40%, 45%, 50%, 60%, 65%, 70%, 80%, 85%, etc.

[0087] Based on the above embodiments, optionally, the vertical projection of the first connecting conductor 211 on the substrate 10 covers the vertical projection of the fine grid line 212 on the substrate 10.

[0088] This configuration, where the entire surface of the fine grid line 212 away from the substrate 10 is in contact with the first connecting conductor 211, can increase the contact area between the first connecting conductor 211 and the fine grid line 212, reduce the contact resistance between them, and improve the carrier collection efficiency.

[0089] Based on the above embodiments, optionally, the first bus gate line 21 includes at least two fine gate lines 2112 arranged sequentially at intervals along the first direction X.

[0090] Specifically, two or more fine gate lines 212 are provided along the first direction X, and there is a certain distance between any two adjacent fine gate lines 220. The fine gate lines 212 are spaced apart along the first direction X, which can effectively collect carriers along the extension direction of the fine gate lines 212. At the intervals, no fine gate lines 212 are provided, which reduces the contact area between the fine gate lines 212 and the first doped layer, and can reduce the damage to the first doped layer caused by the paste.

[0091] Based on the above embodiments, optionally, along the first direction X, at least two fine gate lines 212 in the same first bus gate line 21 are collinear; or, along the first direction X, at least some fine gate lines 212 in the same first bus gate line 21 are not collinear with other fine gate lines 212.

[0092] Specifically, at least two fine grid lines 212 are collinear, meaning multiple fine grid lines 212 are distributed along the same straight line. The distance between any two adjacent fine grid lines can be completely equal, partially equal, or completely unequal; no limitation is made here. Collinear arrangement can concentrate the collection of charge carriers, reducing the impact of dispersion on battery performance. At the same time, collinear arrangement of fine grid lines 212 can simplify the design and manufacturing process and improve production efficiency.

[0093] At least some of the fine gate lines 212 are not collinear with other fine gate lines 212. This can mean that some of the fine gate lines 212 are not distributed along the same straight line as other fine gate lines 212, or that all the fine gate lines 212 are not distributed along the same straight line, that is, all the fine gate lines 212 are not collinear.

[0094] Based on the above embodiments, optionally, in the same first busbar 21, along the first direction X, the distance difference between at least one fine grid line 212 and the two ends of the first connecting conductor 211 is less than or equal to a set difference value; and / or,

[0095] In the same first busbar 21, along the first direction X, at least one fine grid line 212 is at a distance greater than a preset difference from the two ends of the first connecting conductor 211.

[0096] The set difference can be 0 or a value close to 0. Along the first direction X, the distance difference between at least one fine grid line 212 and the two ends of the first connecting conductor 211 is less than or equal to the set difference. That is, along the first direction X, at least one fine grid line 212 is positioned in the center of the first connecting conductor 211, ensuring that the fine grid lines 212 are evenly distributed on the first connecting conductor 211 and avoiding localized overheating. Along the first direction, the distance between at least one fine grid line 220 and the edges of the connecting conductors 210 on both sides is greater than the preset difference. That is, at least one fine grid line 212 is positioned off-center from the center of the connecting conductor 210, at a certain distance from the center. The distribution position of the fine grid lines 212 can be optimized according to the light intensity and battery design requirements, so that the fine grid lines 212 can better collect charge carriers.

[0097] Based on the above embodiments, optionally, along the first direction X, the distance between at least some adjacent fine grid lines 212 is equal; and / or, along the first direction X, the distance between at least some adjacent fine grid lines 212 is unequal.

[0098] The distance between the two adjacent ends of two adjacent fine grid lines 212 is the distance between the two fine grid lines 212. The equal spacing ensures that the fine grid lines 212 are uniformly distributed on the first connecting conductor 212, improving the uniformity of carrier collection.

[0099] Along the first direction X, the unequal spacing between at least some adjacent fine grid lines 212 can mean that the spacing between all fine grid lines 212 is unequal, or that the spacing between some adjacent fine grid lines 212 is unequal. The unequal spacing design can optimize the distribution of the fine grid lines 212 according to the requirements of light intensity and battery design, so that the fine grid lines 212 can better collect charge carriers.

[0100] Based on the above embodiments, optionally, refer to Figure 5 and Figure 6 The first connecting conductor 211 and the second connecting conductor 221 are arranged in the same layer; the first connecting conductor 211 and the second connecting conductor 221 are made of the same material.

[0101] With this configuration, the first connecting conductor 211 and the second connecting conductor 221 can be fabricated in the same process, reducing process costs.

[0102] Based on the above embodiments, optionally, refer to Figure 1 -,5, Solar cells also include:

[0103] First current collector wire 31 and second current collector wire 32;

[0104] The first collector wire 31 and the second collector wire 32 are disposed on the same side of the substrate 10 as the first busbar 21, and the first collector wire 31 and the second collector wire 32 extend along the second direction Y.

[0105] At least one end of the first connecting conductor 211 is connected to the first current collector wire 31, and the first current collector wire 31 is not in physical contact with the first doped layer 11; at least one end of the second connecting conductor 221 is electrically connected to the second current collector wire 32, and the second current collector wire 32 is not in physical contact with the second doped layer 12.

[0106] Specifically, the first current collector wire 31 and the second current collector wire 32 can extend along the longitudinal direction of the substrate 10, and the first connecting conductor 211 and the second connecting conductor 221 can extend along the transverse direction of the substrate 10. That is, the second direction Y can be the longitudinal direction of the solar cell, and the first direction X can be the transverse direction of the solar cell, and the two are perpendicular to each other. Of course, in other embodiments, the first direction X and the second direction Y can also be other directions, for example, they can be the diagonal directions of the substrate 10, and there is no specific limitation here.

[0107] The first current collector wire 31 and the second current collector wire 32 are made of conductive material and are not in physical contact with the doped layer. That is, spatially, the first current collector wire 31 is spaced apart from the first doped layer 11, and the second current collector wire 32 is spaced apart from the second doped layer 12. Specifically, an insulating medium may be provided between the first current collector wire 31 and the first doped layer 11, and between the second current collector wire 32 and the second doped layer 12.

[0108] The collector wire is used to transport charge carriers. At least one end of the first connecting conductor 211 is connected to the first collector wire 31. The first connecting conductor 211 transports the charge carriers collected by the fine grid line 212 to the first collector wire. The other end of the first connecting conductor 211 can be connected to the first collector wire 31 or other conductive structures, such as pads, other connecting wires, etc., without limitation. At least one end of the second connecting conductor 221 is connected to the second collector wire 32. The second connecting conductor 221 transports the collected charge carriers to the second collector wire 32. The other end of the second connecting conductor 221 can be connected to the second collector wire 32 or other conductive structures, such as pads, other connecting wires, etc., without limitation.

[0109] Based on the above embodiments, optionally, the first current collector 31 includes a first edge bus 311, which is disposed at the edge of the substrate 10; the second current collector 32 includes a second edge bus 321, which is disposed at the edge of the substrate 10.

[0110] The surface of the substrate 10 on which the first busbar 21 is disposed is a backlight surface;

[0111] The backlight surface has a first edge 51 and a second edge 52 opposite to each other along the first direction X. The backlight surface has a plurality of first connecting areas 61 and a plurality of second connecting areas 62. The first connecting area 61 includes a first edge connecting area 611 closest to the first edge 51, and there is no second connecting area 62 between the first edge connecting area 611 and the first edge 51. The second connecting area 62 includes a second edge connecting area 621 closest to the second edge 52, and there is no first connecting area 61 between the second edge connecting area 621 and the second edge 52.

[0112] The backlight surface of the substrate 10 is also provided with a plurality of first electrodes 81 and a plurality of second electrodes 82, and the first electrodes 81 and the second electrodes 82 are both arranged intersecting with the first series connection area 61 and the second series connection area 62.

[0113] The plurality of first electrodes 81 include a plurality of first collection gate lines 41 and at least one first bus gate line 21. The first collection gate lines 41 are discontinuous at the first series connection region 61 and continuous at the second series connection region 62. The first bus gate line 21 is continuous at the first edge series connection region 611. The first collection gate lines 41 are disposed on one side of the first doped layer and are in physical contact with the first doped layer 11.

[0114] The plurality of second electrodes 82 include a plurality of second collection gate lines 42 and at least one second bus gate line 22; the second collection gate lines 42 are discontinuous at the second series connection region 62 and continuous at the first series connection region 61, and the second bus gate line 22 is continuous at the second edge series connection region 621; the second collection gate lines 42 are disposed on one side of the second doped layer 12 and are in physical contact with the second doped layer 12;

[0115] The first edge bus 311 is closer to the first edge 51 than the first edge serial region 611. The first edge bus 311 is electrically connected to at least a portion of the first collection grid line 41 and to the first bus grid line 21.

[0116] The second edge bus 321 is closer to the second edge 52 than the second edge serial region 621. The second edge bus 321 is electrically connected to at least a portion of the second collection grid line 42 and to the second bus grid line 22.

[0117] Specifically, the substrate 10 has a light-facing surface and a back-light-receiving surface, with the light-facing surface being the light-receiving surface of the substrate 10. The first electrode 81 and the second electrode 82 are respectively disposed corresponding to the first doped layer 11 and the second doped layer 12, thus the first electrode 81 and the second electrode 82 are disposed on the back-light-receiving surface of the substrate 10. Since the light-facing surface of the substrate 10 is not blocked by electrodes, the light absorption area can be maximized, shading loss reduced, and the photoelectric conversion efficiency of the battery can be significantly improved. The first collection grid line 41 is in ohmic contact with the first doped layer 11, collecting carriers generated in the region where the first doped layer 11 is located. The second collection grid line 42 is in ohmic contact with the second doped layer 12, collecting carriers generated in the region where the second doped layer 12 is located. The first electrode 81 is disposed on one side of the first doped layer 11, and the second electrode 82 is disposed on one side of the second doped layer 12. The alternating arrangement of the first doped layer 11 and the second doped layer 12 ensures a uniform distribution of the first electrode 81 and the second electrode 82 on the substrate 10, improving the uniformity of carrier collection.

[0118] The first series connection area 61 and the second series connection area 62 are used to set the positive electrode solder strip and the negative electrode solder strip, respectively. That is, one of the first series connection area 61 and the second series connection area 62 is the positive electrode series connection area, and the other is the negative electrode soldering area. The first electrode 81 and all the second electrodes 82 are arranged intersecting with the first series connection area 61 and the second series connection area 62. That is, the first series connection area 61 and the second series connection area 62 both extend along the second direction Y.

[0119] The first collecting grid line 41 is discontinuous at the first serial connection area 61 and continuous at the second serial connection area 62. The first bus grid line 22 is continuous at both the first edge serial connection area 611 and the second serial connection area 62. The solder strip in the first serial connection area 61 (including the first edge serial connection area 611) is used to connect with the second electrode 82 to realize the bus output of the second electrode 82. The solder strip in the second serial connection area 62 is used to weld and connect with the first electrode 81 to realize the bus output of the first electrode 81.

[0120] To avoid microcracks in the battery caused by welding at the edge of the first edge 51, the first edge bus 311 is not used for welding. Instead, it collects the current in the portion of the first collection grid 41 located between the first edge series connection area 611 and the first edge 51, and then flows through the first bus grid 21 to the second series connection area 62 adjacent to the first edge series connection area 611 (i.e., Figure 1 and Figure 2The same polarity solder strip in the second series area 62 on the rightmost side is used to collect the current of the electrode in the edge region of the first electrode 81 located at the first edge 51, thereby improving the efficiency of the solar cell. If the first edge bus line 311 and the first bus grid line 21 are not provided, the part of the first electrode 41 located between the first edge series area 611 and the first edge 51 will form an isolated electrode, and the current in that part cannot be collected.

[0121] To avoid microcracks in the battery caused by welding at the edge of the second edge 52, the second edge bus 321 is not used for welding. Instead, it collects the current in the portion of the second collection grid 42 located between the second edge series connection region 621 and the second edge 52, and then flows through the second bus grid 22 to the first series connection region 61 adjacent to the second edge series connection region 621 (i.e.,...). Figure 1 and Figure 3 The same polarity solder strip in the first series area 61 on the leftmost side is used to collect the current of the electrode in the edge region of the second electrode 81 located at the second edge 52, thereby improving the efficiency of the solar cell. If the second edge bus line 321 and the second bus grid line 22 are not provided, the part of the second electrode 42 located between the second edge series area 621 and the second edge 52 will form an isolated electrode, and the current in that part cannot be collected.

[0122] Based on the above embodiments, optionally, the fine grid line 212 is disposed in the same layer as the first collecting grid line 41 and is made of the same material.

[0123] With this configuration, the fine grid line 212 and the first collection grid line 41 can be fabricated in the same process, reducing process costs.

[0124] Based on the above embodiments, optionally, a plurality of first series regions 61 include a first edge series region 612 closest to the second edge 52, and the solar cell also includes a first auxiliary connection line 73. The first auxiliary connection line 73 is disposed in the first edge series region 612. In the second direction Y, the first auxiliary connection line 73 connects at least one second busbar line 22 and at least one second collection grid line 42 located on one side of the second busbar line 22.

[0125] The second series connection area 62 includes a second edge series connection area 622 closest to the first edge 51. The solar cell also includes a second auxiliary connection line 74 disposed in the second edge series connection area 622. In the second direction Y, the second auxiliary connection line 74 connects the first bus grid line 21 and at least one first collection grid line 41 located on one side of the first bus grid line 21.

[0126] The solar cell also includes a first auxiliary connection line 71 disposed in the first edge series area 611. In the second direction Y, at least one side of the first busbar 21 is provided with the first auxiliary connection line 71, and the first auxiliary connection line 71 connects at least two second collection grid lines 42 located on the same side of the first busbar 21.

[0127] The solar cell also includes a second auxiliary connection line 72 disposed in the second edge series region 621. In the second direction Y, at least one side of the second busbar 22 is provided with the second auxiliary connection line 72, and the second auxiliary connection line 72 connects at least two first collection grid lines 41 located on the same side of the second busbar 22.

[0128] Specifically, one end of the first connecting conductor 211 is connected to the first edge busbar 311, and the other end is connected to the second auxiliary connecting line 74. One end of the second connecting conductor 221 is connected to the second edge busbar 321, and the other end is connected to the first auxiliary connecting line 73. The first auxiliary connecting line 71, the second auxiliary connecting line 72, the first auxiliary connecting line 73, and the second auxiliary connecting line 74 serve to transmit and combine current when a poor solder joint occurs in the solder strip.

[0129] The number of first busbars 21 can be a single wire. In this case, the first auxiliary connection line 71 can be provided only on one side of the first busbar 21, or the first auxiliary connection line 71 can be provided on both sides of the first busbar 21; the specific method is not limited here. When the second electrode 81 is provided on both sides of the first busbar 21, it is preferable to provide the first auxiliary connection line 71 on both sides. In addition, it should be noted that in this application, when the number of first busbars 21 is multiple, the first auxiliary connection line 71 can be provided only on one or both sides of some of the first busbars 21, while the first auxiliary connection line 71 can be omitted on both sides of the remaining first busbars 21. In this case, it can also solve the problem of cold solder joints in some locations. In this application, it is preferable that the first auxiliary connection line 71 is provided on both sides of each first busbar 21.

[0130] Of course, such as Figure 1 and Figure 2 As shown, in some embodiments, there may be multiple first bus gate lines 21. Using multiple first bus gate lines 21 can shorten the current confluence path, effectively reduce current transmission losses, and improve efficiency. In such cases, a first auxiliary connection line 71 is provided between each pair of adjacent first bus gate lines 21, and the first auxiliary connection line 71 between adjacent first bus gate lines 21 connects all the second electrodes 81 located between adjacent first bus gate lines 21.

[0131] In this way, by connecting all the second electrodes 81 between two adjacent first busbars 31 with the first auxiliary connection line 71, the effects of poor soldering can be almost completely eliminated, maximizing the efficiency of the solar cell. Of course, in some embodiments, the first auxiliary connection line 71 may only be provided on one side of the first busbar 21, and there is no specific limitation here.

[0132] The number of second busbars 22 can be a single wire. In this case, the second auxiliary connection line 72 can be provided only on one side of the second busbar 22, or the second auxiliary connection line 72 can be provided on both sides of the second busbar 22; the specific method is not limited here. When the first electrode 82 is provided on both sides of the second busbar 22, it is preferable to provide the second auxiliary connection line 72 on both sides. In addition, it should be noted that in this application, when the number of second busbars 22 is multiple, the second auxiliary connection line 72 can be provided only on one or both sides of some of the second busbars 22, while the second auxiliary connection line 72 can be omitted on both sides of the remaining second busbars 22. In this case, it can also solve the problem of cold solder joints in some locations. In this application, it is preferable that the second auxiliary connection line 72 is provided on both sides of each second busbar 22.

[0133] Of course, such as Figure 1 and Figure 3 As shown, in some embodiments, there may be multiple second bus gate lines 22. Using multiple second bus gate lines 22 can shorten the current confluence path, effectively reduce confluence transmission losses, and improve efficiency. In such cases, a second auxiliary connection line 72 is provided between each pair of adjacent second bus gate lines 22, and the second auxiliary connection line 72 located between two adjacent second bus gate lines 22 connects all the first electrodes 82 located between the two adjacent second bus gate lines 22.

[0134] In this way, by connecting all the first electrodes 82 between two adjacent second busbars 22 with the second auxiliary connection line 72, the effects of poor soldering can be almost completely eliminated, maximizing the efficiency of the solar cell. Of course, in some embodiments, the second auxiliary connection line 72 may only be provided on one side of the second busbar 22; no specific limitation is made here.

[0135] Based on the above embodiments, optionally, the first edge bus 311 is electrically connected to all the first collection grid lines 41; or, the first edge bus 321 is electrically connected to some of the first collection grid lines 41, and the number of first collection grid lines 41 not electrically connected to the first edge bus 311 is less than or equal to 4.

[0136] The second edge bus 321 is electrically connected to all the second collection grid lines 42; or the second edge bus 321 is electrically connected to some of the second collection grid lines 42, and the number of second collection grid lines 42 not electrically connected to the second edge bus 321 is less than or equal to 4.

[0137] This setting can improve current collection efficiency.

[0138] Based on the above embodiments, optionally, the solar cell satisfies at least one of the following conditions:

[0139] The width of the first busbar 21 is greater than the width of the portion of the first collection busbar 41 located outside the second cascading area 62;

[0140] The width of the first edge busbar 321 is greater than the width of the portion of the first collection grid line 41 located outside the second cascading area 62;

[0141] The width of the first auxiliary connecting line 71 is greater than the width of the portion of the second collecting grid line 41 located outside the first serial area 61;

[0142] The width of the second busbar 22 is greater than the width of the portion of the second collection busbar 42 located outside the first cascading area 61;

[0143] The width of the second edge busbar 321 is greater than the width of the portion of the second collection grid line 42 located outside the first cascading area 61;

[0144] The width of the second auxiliary connection line 72 is greater than the width of the portion of the first collection grid line 41 located outside the second serial connection area 62.

[0145] Specifically, the width of the first bus gate 21 (i.e., its dimension in the second direction Y) is greater than the width of the portion of the first collection gate 41 located outside the second serial connection area 62 (i.e., the dimension of the portion of the first collection gate 41 excluding the first welding section 201 in the second direction Y). Thus, since the first bus gate 21 needs to undertake the function of current collection and transmission, setting the width of the first bus gate 21 to be wider can reduce transmission losses during the current collection process and improve efficiency.

[0146] The width of the first edge busbar 311 (its dimension in the first direction X) is greater than the width of the portion of the first collecting grid line 41 located outside the second serialization area 62 (i.e., the dimension of the portion of the first collecting grid line 41 excluding the first welding segment 201 in the second direction Y). Thus, since the first edge busbar 311 needs to perform the current collection function, setting its width wider can reduce transmission losses during the current collection process and improve efficiency. For example, the width of the first edge busbar 311 can be set to be the same as the width of the first welding segment 201. This ensures that there is no significant current collection loss during the current collection process. Furthermore, during printing, only screen slots of the same size need to be opened on the screen, allowing both to be printed simultaneously, effectively saving manufacturing steps and reducing manufacturing difficulty.

[0147] The width of the second bus gate 22 (i.e., its dimension in the second direction Y) is greater than the width of the portion of the second collection gate 42 located outside the first cascading area 61 (i.e., the dimension of the portion of the second collection gate 42 excluding the second welding section 202 in the second direction Y). Thus, since the second bus gate 22 needs to perform the function of current collection and transmission, setting the width of the second bus gate 22 to be wider can reduce transmission losses during the current collection process and improve efficiency.

[0148] The width of the second edge busbar 321 (its dimension in the first direction X) is greater than the width of the portion of the second collecting grid line 42 located outside the first serialization area 61 (i.e., the dimension of the portion of the second collecting grid line 42 excluding the second welding section 202 in the second direction Y). Thus, since the second edge busbar 321 needs to perform the current collection function, setting its width wider can reduce transmission losses during the current collection process and improve efficiency. For example, the width of the second edge busbar 321 can be set to be the same as the width of the second welding section 202. This ensures that there is no significant current collection loss during the current collection process. Furthermore, during printing, only screen slots of the same size need to be opened on the screen, allowing both to be printed simultaneously, effectively saving manufacturing steps and reducing manufacturing difficulty.

[0149] The width of the first auxiliary connection line 71 (its dimension in the first direction X) is greater than the width of the portion of the second collecting grid line 42 located outside the first serial connection area 61 (i.e., the length dimension of the portion of the second collecting grid line 42 excluding the second soldering segment 202 in the second direction Y). Thus, since the first auxiliary connection line 71 functions to transmit and combine current when a cold solder joint occurs, setting the width of the first auxiliary connection line 71 wider can reduce transmission losses during the current combining process and improve efficiency. In some embodiments, the width of the first auxiliary connection line 71 may be the same as the width of the first edge bus line 321.

[0150] The width of the second auxiliary connection line 72 (its dimension in the first direction X) is greater than the width of the portion of the first collecting grid line 41 located outside the second serial connection area 62 (i.e., the dimension of the portion of the first collecting grid line 41 excluding the first solder section 201 in the second direction Y). Thus, since the second auxiliary connection line 72 functions to transmit and combine current when a cold solder joint occurs, setting the width of the second auxiliary connection line 72 wider can reduce transmission losses during the current combining process and improve efficiency. In some embodiments, the width of the second auxiliary connection line 72 may be the same as the width of the second edge bus line 321.

[0151] This utility model embodiment also provides a battery assembly, including the solar cell in the above embodiment.

[0152] A battery module may include multiple solar cells, which can be connected in series to form a battery string. The battery strings can be connected in series, in parallel, or in a series-parallel combination to achieve current output. For example, the connection between individual cells can be achieved by welding ribbons, or the connection between battery strings can be achieved by busbars.

[0153] The battery module may also include a metal frame, a backsheet, photovoltaic glass, and an encapsulating film. The encapsulating film can be filled between the light-facing side of the solar cell and the photovoltaic glass, the back-facing side and the backsheet, and adjacent cells. As a filler, it can be a transparent colloid with good light transmittance and aging resistance; for example, EVA film or POE film can be used, and the choice is based on the specific circumstances and is not limited here. The photovoltaic glass can cover the encapsulating film on the light-facing side of the solar cell. The photovoltaic glass can be ultra-clear glass, which has high light transmittance, high transparency, and superior physical, mechanical, and optical properties. For example, the light transmittance of ultra-clear glass can reach over 92%, which can protect the solar cell while minimizing the impact on its efficiency. Simultaneously, the encapsulating film can bond the photovoltaic glass and the solar cell together, and its presence provides sealing, insulation, waterproofing, and moisture protection for the solar cell.

[0154] The backsheet can be attached to the encapsulating film on the back side of the solar cell. The backsheet protects and supports the solar cell, providing reliable insulation, water resistance, and aging resistance. Multiple backsheet options are available, typically including tempered glass, acrylic glass, and aluminum alloy TPT composite encapsulating film, etc., with specific choices depending on the circumstances. The backsheet, solar cell, encapsulating film, and photovoltaic glass can be mounted on a metal frame. The metal frame serves as the main external support structure for the entire battery module, providing stable support and installation. For example, the battery module can be installed at the desired location using the metal frame.

[0155] The battery assembly of this utility model embodiment belongs to the same utility model concept as the solar cell described in the above embodiments of this utility model, and has corresponding beneficial effects. For technical details not detailed in this embodiment, please refer to the solar cell described in any embodiment of this utility model.

[0156] This utility model embodiment also provides a photovoltaic module, including the battery module in the above embodiment.

[0157] Photovoltaic systems can be applied in photovoltaic power plants, such as ground-mounted, rooftop, and floating power plants, as well as in equipment or devices that utilize solar energy to generate electricity, such as user solar power supplies, solar streetlights, solar cars, and solar buildings. Of course, it's understandable that the application scenarios of photovoltaic systems are not limited to these; that is, photovoltaic systems can be applied in all fields that require solar energy to generate electricity. Taking a photovoltaic power generation network as an example, a photovoltaic system can include photovoltaic arrays, combiner boxes, and inverters. A photovoltaic array can be a combination of multiple battery modules; for example, multiple battery modules can form multiple photovoltaic arrays. The photovoltaic arrays are connected to combiner boxes, which collect the current generated by the photovoltaic arrays. The collected current flows through an inverter and is converted into AC power required by the mains grid before being connected to the mains grid to achieve solar power supply.

[0158] The beneficial effects of the photovoltaic system in this embodiment are equivalent to the beneficial effects of the battery module described above, and will not be repeated here.

[0159] It should be understood that the various forms of the process shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this utility model can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this utility model can be achieved, and this is not limited herein.

[0160] The specific embodiments described above do not constitute a limitation on the scope of protection of this utility model. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this utility model should be included within the scope of protection of this utility model.

Claims

1. A solar cell, characterized in that, include: The substrate and the first and second busbars disposed on the same side of the substrate; Both the first busbar and the second busbar extend along a first direction. The first busbar includes a first connecting conductor and a fine grid line that are electrically connected to each other. The first connecting conductor is disposed on the side of the fine grid line away from the substrate. The second busbar includes a second connecting conductor. The substrate includes a first doped layer and a second doped layer; along a second direction, the first doped layer and the second doped layer are arranged alternately in sequence; wherein, the first doped layer and the second doped layer have different doping types, and the first direction and the second direction intersect each other; The fine gate line is disposed on the side of the first connecting conductor adjacent to the first doped layer. The fine gate line is in physical contact with the first doped layer, while the first connecting conductor is not in physical contact with the first doped layer. The second connecting conductor is disposed on one side of the second doped layer. The second connecting conductor is not in physical contact with the second doped layer, and there is no fine gate line between the second connecting conductor and the second doped layer.

2. The solar cell according to claim 1, characterized in that: An antireflection layer and / or a passivation layer are disposed between the second connecting conductor and the second doped layer.

3. The solar cell according to claim 2, characterized in that: An antireflection layer and / or passivation layer are disposed between the first doped layer and the first connecting conductor. The antireflection layer and / or passivation layer includes an opening, and the fine gate line is disposed in the opening and is in physical contact with the first doped layer.

4. The solar cell according to claim 1, characterized in that: In the same first busbar, along the first direction, the ratio of the total length of the fine grid lines to the length of the first connecting conductor is greater than 0 and less than or equal to 95%.

5. The solar cell according to claim 1, characterized in that: Along the second direction, the ratio of the width of the fine grid line to the width of the first connecting conductor is greater than or equal to 5% and less than or equal to 90%.

6. The solar cell according to claim 1, characterized in that: The vertical projection of the first connecting conductor on the substrate covers the vertical projection of the fine grid line on the substrate.

7. The solar cell according to claim 1, characterized in that: The first busbar includes at least two fine grid lines arranged at intervals along the first direction.

8. The solar cell according to claim 7, characterized in that: Along the first direction, at least two of the fine gate lines are collinear in the same first busbar; or, along the first direction, at least some of the fine gate lines are not collinear with other fine gate lines in the same first busbar.

9. The solar cell according to claim 7, characterized in that: Along the first direction, the distance between at least partially adjacent fine grid lines is equal; and / or, Along the first direction, the distances between at least some of the adjacent fine grid lines are unequal.

10. The solar cell according to claim 1, characterized in that: The first connecting conductor and the second connecting conductor are disposed in the same layer; The first connecting conductor and the second connecting conductor are made of the same material.

11. The solar cell according to claim 1, characterized in that, Also includes: First current collector wire and second current collector wire; The first collector wire and the second collector wire are disposed on the same side of the substrate as the first busbar, and the first collector wire and the second collector wire extend along the second direction; At least one end of the first connecting conductor is connected to the first current collector wire, and the first current collector wire is not in physical contact with the first doped layer; at least one end of the second connecting conductor is electrically connected to the second current collector wire, and the second current collector wire is not in physical contact with the second doped layer.

12. The solar cell according to claim 11, characterized in that: The first collector wire includes a first edge bus, which is disposed at the edge of the substrate; the second collector wire includes a second edge bus, which is disposed at the edge of the substrate. The surface of the substrate on which the first busbar is disposed is a backlight surface; The backlight surface has opposing first edges and second edges along a first direction. The backlight surface has a plurality of first connecting areas and a plurality of second connecting areas. The first connecting area includes a first edge connecting area closest to the first edge, and there is no second connecting area between the first edge connecting area and the first edge. The second connecting area includes a second edge connecting area closest to the second edge, and there is no first connecting area between the second edge connecting area and the second edge. The backlight surface of the substrate is also provided with a plurality of first electrodes and a plurality of second electrodes, wherein the first electrodes and the second electrodes are arranged intersecting with the first series connection area and the second series connection area. The first electrodes include a plurality of first collection gate lines and at least one first bus gate line, wherein the first collection gate lines are discontinuous at the first series connection region and continuous at the second series connection region, and the first bus gate line is continuous at the first edge series connection region; the first collection gate lines are disposed on one side of the first doped layer and are in physical contact with the first doped layer. The second electrodes include a plurality of second collection gate lines and at least one second bus gate line; the second collection gate lines are discontinuous at the second series connection region and continuous at the first series connection region, and the second bus gate line is continuous at the second edge series connection region; the second collection gate lines are disposed on one side of the second doped layer and are in physical contact with the second doped layer; The first edge bus is closer to the first edge than the first edge concatenation region, and the first edge bus is electrically connected to at least a portion of the first collection grid line and to the first bus grid line. The second edge bus is closer to the second edge than the second edge serial region, and the second edge bus is electrically connected to at least a portion of the second collection grid and to the second bus grid.

13. The solar cell according to claim 12, characterized in that: The fine grid lines are disposed in the same layer as the first collecting grid lines and are made of the same material.

14. The solar cell according to claim 12, characterized in that: The plurality of first series regions include a first edge series region closest to the second edge, and the solar cell further includes a first auxiliary connection line disposed within the first edge series region. In the second direction, the first auxiliary connection line connects at least one second busbar and at least one second collection grid located on one side of the second busbar. The second series connection area includes a second edge series connection area closest to the first edge, and the solar cell also includes a second auxiliary connection line disposed in the second edge series connection area. In the second direction, the second auxiliary connection line connects the first bus grid line and at least one of the first collection grid lines located on one side of the first bus grid line. The solar cell further includes a first auxiliary connection line disposed within the first edge series connection area. In the second direction, the first auxiliary connection line is provided on at least one side of the first busbar. The first auxiliary connection line connects at least two second collection grid lines located on the same side of the first busbar. The solar cell further includes a second auxiliary connection line disposed within the second edge series connection area. In the second direction, at least one side of the second busbar is provided with the second auxiliary connection line, and the second auxiliary connection line connects at least two first collection grid lines located on the same side of the second busbar.

15. The solar cell according to claim 13, characterized in that: The first edge bus is electrically connected to all the first collection grid lines; or, the first edge bus is electrically connected to a portion of the first collection grid lines, and the number of first collection grid lines not electrically connected to the first edge bus is less than or equal to 4. The second edge bus is electrically connected to all the second collection grid lines; or the second edge bus is electrically connected to a portion of the second collection grid lines, and the number of second collection grid lines not electrically connected to the second edge bus is less than or equal to 4.

16. The solar cell according to claim 14, characterized in that, The solar cell satisfies at least one of the following conditions: The width of the first busbar is greater than the width of the portion of the first collection busbar located outside the second cascading area; The width of the first edge busbar is greater than the width of the portion of the first collection grid line located outside the second serial area; The widths of the first auxiliary connection line and the first auxiliary connection line are both greater than the width of the portion of the second collection grid line located outside the first serial connection area; The width of the second busbar is greater than the width of the portion of the second collection busbar located outside the first cascading area; The width of the second edge busbar is greater than the width of the portion of the second collection grid line located outside the first serial area; The widths of the second auxiliary connecting line and the second auxiliary connecting line are both greater than the width of the portion of the first collecting grid line located outside the second serial connection area.

17. The solar cell according to claim 1, characterized in that: The first doped layer is an n-type doped layer, and the second doped layer is a p-type doped layer.

18. A battery assembly, characterized in that, Includes the solar cell described in any one of claims 1 to 17.

19. A photovoltaic system, characterized in that, Includes the battery assembly as described in claim 18.

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