Semiconductor package device

Abstract

This application discloses a semiconductor packaging apparatus for packaging a chip structure. The chip structure includes a substrate, a chip, a solid metal thermal interface material bonded to the chip, an adhesive disposed on the substrate away from the chip, and a metal cap covering the chip. The semiconductor packaging apparatus includes a conductive component, a force-applying component, a heating means, and a cooling means. The conductive component has a conductive surface facing the metal cap. The force-applying component generates an external force and acts on the substrate to move the metal cap and push against the conductive component. The heating means heats the conductive component and heats the metal cap through conduction on the conductive surface, thereby melting the solid metal thermal interface material and the adhesive. The cooling means cools the conductive component and cools the metal cap through conduction on the conductive surface, thereby solidifying the solid metal thermal interface material and the adhesive, completing the semiconductor packaging process.

Description

Technical Field

[0001] This application relates to a semiconductor package, and more particularly to a semiconductor packaging device. Background Technology

[0002] Currently, in semiconductor flip-chip packaging technology for applications with high heat dissipation requirements (such as high-performance computing (HPC), artificial intelligence (AI), graphics processing units (GPUs), and central processing units (CPUs), solid metals with high thermal conductivity are used as thermal interface materials (e.g., indium-based alloys, tin-based alloys). The assembly of the metal cap typically involves first applying adhesive to the substrate, then heating the substrate to bond the metal cap to it. Subsequent processes melt the metal thermal interface material and bond it to the back metal layer of the chip and the metal layer of the metal cap to form an intermetallic compound (IMC). However, this method has some drawbacks, such as thermal stress issues, coverage of the metal thermal interface material on the chip, and process complexity.

[0003] The typical flip-chip packaging process for semiconductors involves: bonding a metal thermal interface material to a chip with a back metal layer; applying adhesive around the substrate; attaching a metal cap; and baking the adhesive to harden and bond the metal cap. Subsequent processes melt the metal thermal interface material and bond it to the back metal layer of the chip and the metal cap to form an intermetallic compound (IMC). However, during the heating process of the metal thermal interface material, the adhesive bonding the metal cap to the substrate has relatively low curing strength, resulting in significant free deformation when the metal thermal interface material melts. Furthermore, since the substrate, metal thermal interface material, and metal cap are usually composed of different materials, the difference in their coefficients of thermal expansion can generate thermal stress, leading to poor coverage of the metal thermal interface material or deformation or even cracking of the package structure. Moreover, the high-temperature bonding requires precise temperature control and is a complex process, increasing manufacturing costs. Additionally, to avoid damage to the component from overheating, sophisticated control equipment is needed, further increasing process costs.

[0004] Therefore, the applicant's research motivation is to improve the packaging method of combining the metal cover and the substrate to avoid potential structural stress problems and process costs. Utility Model Content

[0005] One objective of this application is to provide a semiconductor packaging device to avoid poor coverage of the metal thermal interface material or deformation or cracking of the packaging structure, and to simplify the manufacturing process and reduce costs.

[0006] To achieve the above objectives, this application discloses a semiconductor packaging apparatus for packaging a chip structure. The chip structure includes a substrate, a chip disposed on the substrate, a solid metal thermal interface material bonded to the chip, an adhesive disposed on the substrate and away from the chip, and a metal cap covering the chip. The semiconductor packaging apparatus includes a conductive component, a force-applying component, a heating means, and a cooling means. The conductive component has a conductive surface facing the metal cap. The force-applying component generates an external force and acts on the substrate to move the metal cap and push against the conductive component. The heating means heats the conductive component and, through conduction on the conductive surface, heats the metal cap, thereby melting the solid metal thermal interface material and the adhesive. The cooling means cools the conductive component and, through conduction on the conductive surface, cools the metal cap, thereby solidifying the solid metal thermal interface material and the adhesive.

[0007] In one embodiment of this application, the number of chips and metal covers is set to multiple, and the chips and metal covers are semiconductor packaged through batch processing.

[0008] In one embodiment of this application, the semiconductor packaging device further includes a heat insulation layer and an outer cover, the heat insulation layer surrounding the conductive component and exposing the conductive surface, and the outer cover fitting the heat insulation layer.

[0009] In one embodiment of this application, the heating means is electric heating, and the conductive component is a heating plate.

[0010] In one embodiment of this application, the heating means is hot air, and the conductive component is a heat-conducting block.

[0011] In one embodiment of this application, the conductive component is provided with a first channel and a second channel connected to the first channel.

[0012] In one embodiment of this application, the second channel is located on one side perpendicular to the first channel.

[0013] In one embodiment of this application, the semiconductor packaging device further includes a fan, which is disposed outside the first channel, and the cooling means is cold air.

[0014] In one embodiment of this application, the metal cover is a U-shaped frame plate.

[0015] In one embodiment of this application, the solid metal thermal interface material is an indium-based alloy or a tin-based alloy, and the metal cap is made of copper plated with nickel.

[0016] Compared to existing technologies, the semiconductor packaging metal cap assembly process of this application provides a conductive component. The conductive component is heated, and then the heated metal cap is melted through bonding. Additionally, an external force is applied to the substrate, causing the metal cap to press against the conductive component, thus sealing the substrate. Furthermore, heat is conducted through the metal cap to melt the solid metal thermal interface material, forming an intermetallic compound (IMC) with the metal layers of the chip and the metal cap. At this point, the conductive component applies a reaction force to the metal cap. This reaction force can compress the molten solid metal thermal interface material to a certain extent, increasing the coverage of the solid metal thermal interface material on the chip. Furthermore, the reaction force can also limit the deformation space of the molten metal thermal interface material, preventing free deformation, thus allowing precise control of the overall package deformation. This method, due to its rapid and short heating speed via heat conduction, avoids heat deformation of the substrate and allows for baking and hardening of the adhesive. Subsequently, cooling is used to cool the conductive components and the metal cover, thereby solidifying the solid metal thermal interface material and adhesive to bond the metal cover. In this way, the metal cover is bonded to the substrate through the solidified metal thermal interface material and adhesive, replacing the traditional method of heating the substrate to bond the metal cover to the substrate. This avoids thermal stress on the substrate, simplifies the metal cover assembly process, and increases practicality. Attached Figure Description

[0017] Figure 1A and Figure 1B This application illustrates step a) of the metal cover assembly process for the semiconductor packaging device.

[0018] Figure 2A and Figure 2B This application illustrates step b of the metal cap assembly process for a semiconductor packaging device.

[0019] Figure 3A and Figure 3B This application illustrates step c) of the metal cover assembly process for the semiconductor packaging device.

[0020] Figure 4A and Figure 4B This application illustrates step d of the metal cap assembly process for a semiconductor packaging device.

[0021] Figure 5 This shows a cross-sectional view of the chip assembly of the semiconductor packaging device of this application.

[0022] Figure 6 This application illustrates steps g) and h) of the metal cap assembly process for the semiconductor packaging device.

[0023] Figure 7This invention presents a flowchart illustrating the steps of the metal cap assembly process for semiconductor packaging.

[0024] In the attached figures, the following labels are used:

[0025] 2: Hot air

[0026] 3: Cold air

[0027] F: External force

[0028] 10: Substrate

[0029] 20: Chip

[0030] 30: Solid metal thermal interface materials

[0031] 40: Adhesive

[0032] 50: Metal Cap

[0033] 60: Conductive components

[0034] 600: Guide surface

[0035] 601: First Channel

[0036] 602: First Channel

[0037] 61: Insulation layer

[0038] 62: Outer shell Detailed Implementation

[0039] The detailed description and technical content of this application are illustrated below with reference to the accompanying drawings. However, the accompanying drawings are for reference and illustration only and are not intended to limit the scope of this application.

[0040] Please refer to Figure 1A and Figure 1B The diagram illustrates step a) of the metal cap assembly process for the semiconductor packaging apparatus of this application. The metal cap assembly process of this application includes step a), providing a substrate 10 and disposing a chip 20 on the substrate 10. The substrate 10 is a packaging substrate used to carry the chip, and typically consists of copper foil, a glass fiber layer, and a substrate layer.

[0041] Please refer to another source. Figure 2A and Figure 2B The following describes step b) of the metal cover assembly process of the semiconductor packaging device of this application. The metal cover assembly process of the semiconductor packaging device of this application includes step b), which involves placing a solid metal thermal interface material 30 on top of the chip 20. It should be noted that the solid metal thermal interface material 30 is an indium-based alloy or a tin-based alloy.

[0042] Please refer to again Figure 3A and Figure 3B The metal cover assembly process of the semiconductor packaging device of this application includes step c), in which an adhesive 40 is disposed on the substrate 10 around the chip 20.

[0043] Please refer to Figure 4A and Figure 4B The following describes step d) of the semiconductor packaging apparatus of this application. The metal cover assembly process of the semiconductor packaging apparatus of this application includes step d), providing a metal cover 50, placing the metal cover 50 on the substrate 10 corresponding to the adhesive 40, and covering the chip 20. In this embodiment, the metal cover 50 is a U-shaped frame plate made of indium-based alloy, but this is not a limitation.

[0044] Please refer to Figure 4A and Figure 4B The following describes step d) of the metal cap assembly process for semiconductor packaging according to this application. The metal cap assembly process for semiconductor packaging according to this application includes step d), providing a metal cap 50, placing the metal cap 50 on the substrate 10 corresponding to the adhesive 40, and covering the chip 20. In this embodiment, the metal cap 50 is a U-shaped frame plate made of copper plated with nickel, but this is not a limitation.

[0045] Continue to refer to Figure 5 This image shows a cross-sectional view of the chip assembly of the semiconductor package according to this application. The metal cap assembly process of the semiconductor package according to this application includes step e), providing a conductive component 60 and attaching the conductive component 60 to the metal cap 50. In this embodiment, the conductive component 60 is further provided with a heat insulation layer 61 and a housing 62. Furthermore, the conductive component 60 has a conductive surface 600, the heat insulation layer 61 surrounds the conductive component 60 and exposes the conductive surface, and the housing 62 fits over the heat insulation layer 61. In addition, the conductive component 60 is provided with a first channel 601 and a second channel 602 communicating with the first channel 601, and the second channel 602 is located on one side perpendicular to the first channel 601. In this embodiment, the first channel 601 is located on the top surface of the conductive component 60. This is not a limitation in actual implementation.

[0046] In practice, a fan 63 can be installed on the outside of the first channel 601 of the conductive component 60. When the fan 63 is running, it can create a negative pressure channel in the first channel 601, thereby allowing cold air to flow into the second channel 602 and cooling the conductive component 60.

[0047] Please refer to Figure 6The diagram illustrates steps f) and g) of the semiconductor package metal cap assembly process of this application. Step f) involves applying an external force F to the substrate 10 to move the metal cap 50 and press it against the conductive component 60. Step g) further includes providing a heating means to heat the conductive component 60 and conduct heat to the metal cap 50, thereby melting the solid metal thermal interface material 30 and the adhesive 40. That is, heat from the conductive component 60 is conducted to the metal cap 50, and then the metal cap 50 conducts heat to the solid metal thermal interface material 30 and the adhesive 40.

[0048] It should be noted that the heating means in step g) of this application can be electric heating. The conductive component 60 can be configured as a heating plate, which can generate heat after being powered externally. Alternatively, the heating means in step g) can also be hot air 2, and the conductive component 60 can be configured as a heat-conducting block. The hot air 2 can flow into the conductive component 60 from the first channel 601 and flow out from the second channels 602, thereby heating the conductive component 60.

[0049] Furthermore, the cooling method in step h) of this application can be a cold air 3. The conductive component 60 is configured as a heat-conducting block. The cold air 3 can flow into the conductive component 60 from the second channel 602 and flow out from the first channel 601, thereby cooling the conductive component 60. The conductive component 60 cools the metal cover 50 through conduction, thereby solidifying the solid metal thermal interface material 30 and the adhesive 40. Accordingly, the metal cover 50 is bonded to the substrate 10 by the adhesive 40.

[0050] Subsequently, in step h) of the semiconductor package metal cover assembly process of this application, a cooling means is provided to cool the conductive component 60 and cool the metal cover 50 by conduction, thereby solidifying the solid metal thermal interface material 30 and the adhesive 40.

[0051] It should be noted that when an external force F is applied to the substrate 10 and presses against the conductive component 60, the conductive component 60 will provide a reaction force to the metal cover 50, causing the metal cover 50 to press against the substrate 10. In addition, the solid metal thermal interface material 30 will form an intermetallic compound (IMC) with the chip 20 and the metal cover.

[0052] Finally, the assembly process of the metal cover of the semiconductor package in this application is step i), whereby the external force F is removed, thereby completing the assembly process of bonding the metal cover 50 to the substrate 10.

[0053] Please take another picture. Figure 7This document shows a flowchart of the metal cap assembly process for a semiconductor package according to this application. The metal cap assembly process for a semiconductor package according to this application includes the following steps: Step a), providing a substrate 10 and placing a chip 20 on the substrate 10; Step b), placing a solid metal thermal interface material 30 above the chip 20; Step c), placing an adhesive 40 around the substrate 10 away from the chip 20; Step d), providing a metal cap 50 and placing the metal cap 50 on the substrate 10 at the position corresponding to the adhesive 40, and covering the chip; Step e), providing a conductive component 60 with a first channel 601 and attaching the conductive component 60 to the metal cap 50. 0; Step f), apply an external force to the substrate 10 so that the metal cover 50 abuts against the conductive component 60; Step g), provide a heating means to heat the conductive component 60 and heat the metal cover 50 by conduction, thereby melting the solid metal thermal interface material 30 and the adhesive 40; Step h), provide a cooling means to cool the conductive component 60 and cool the metal cover 50 by conduction, thereby solidifying the solid metal thermal interface material 30 and the adhesive 40; and Step i), remove the external force to complete the assembly process of the metal cover 50.

[0054] It should be noted that the number of chips 20 and metal covers 50 in this application is set to multiple, and the chips 20 and the metal covers 50 are semiconductor packaged through batch processing. That is, the metal cover assembly process for semiconductor packaging in this application can be performed in batches. The number of semiconductor packaging devices can correspond to the number of packaged chip structures. For example, two packaged chip structures correspond to two semiconductor packaging devices; forty packaged chip structures correspond to forty semiconductor packaging devices.

[0055] The above description is only a preferred embodiment of this application and is not intended to limit the patent scope of this application. Other equivalent changes that utilize the patent spirit of this application should all fall within the patent scope of this application.

Claims

1. A semiconductor packaging apparatus for packaging a packaged chip structure, characterized in that, The encapsulation chip structure comprises a substrate, a chip disposed on the substrate, a solid metal thermal interface material attached to the chip, an adhesive disposed on the substrate and away from the chip, and a metal cover covering the chip. The semiconductor encapsulation device comprises: a conducting component having a conducting surface facing the metal cover; a force applying component generating an external force and acting on the substrate to move the metal cover and abut against the conducting component; a heating means heating the conducting component and heating the metal cover through the conducting surface to melt the solid metal thermal interface material and the adhesive; and a cooling means cooling the conducting component and cooling the metal cover through the conducting surface to solidify the solid metal thermal interface material and the adhesive.

2. The semiconductor package device of claim 1, wherein, The number of the chips and the metal covers corresponds to a plurality of sets, and the chips and the metal covers are encapsulated by batch operation.

3. The semiconductor package device of claim 1, wherein, Further comprising an insulating layer surrounding the conducting component and exposing the conducting surface, and an outer cover covering the insulating layer.

4. The semiconductor package device of claim 1, wherein, The heating means is electric heating, and the conducting component is a heating plate.

5. The semiconductor package device of claim 1, wherein, The heating means is a hot air, and the conducting component is a heat conducting block.

6. The semiconductor package device of claim 4, wherein, The conducting component is provided with a first channel and a second channel communicating with the first channel.

7. The semiconductor package device of claim 6, wherein, The second channel is located on a side perpendicular to the first channel.

8. The semiconductor package device of claim 6, wherein, Further comprising a fan disposed on an outer side of the first channel, and the cooling means is a cold air.

9. The semiconductor package device of claim 1, wherein, The metal cover is a U-shaped frame plate.

10. The semiconductor package device of claim 1, wherein, The solid metal thermal interface material is indium-based alloy or tin-based alloy, and the metal cover is composed of copper plated with nickel.

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