Packaging structure, circuit board assembly, and electronic device
Patent Information
- Application Number
- CN202522028099.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-19
- Publication Date
- 2026-09-15
- Estimated Expiration
- 2035-09-19
AI Technical Summary
[0025] According to a second aspect of the present disclosure, a circuit board assembly is provided, the circuit board assembly including the packaging structure as described in the first aspect, the circuit board assembly further including a circuit board, the packaging structure being disposed on the circuit board.
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Figure CN224760621U_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of packaging, specifically a packaging structure, circuit board assembly, and electronic device. Background Technology
[0002] In recent years, with the rapid development of packaging technology and the continuous iteration of semiconductor devices, the performance requirements for packaging structures have been increasing. Reliability and heat dissipation capability, as important evaluation indicators of packaging structures, have gradually become key factors affecting the performance, product yield, and lifespan of packaging structures. Utility Model Content
[0003] To overcome the problems existing in the related technologies, this disclosure provides a packaging structure, a circuit board assembly, and an electronic device.
[0004] According to a first aspect of the present disclosure, a packaging structure is provided, characterized in that the packaging structure includes:
[0005] Packaging substrate;
[0006] A device module, wherein the device module is packaged on the packaging substrate;
[0007] A cover plate is disposed on the device module. The cover plate has a hollow area that penetrates through the cover plate. The projection of the hollow area on the packaging substrate at least partially overlaps with the projection of the high-power area of the device module on the packaging substrate.
[0008] In this embodiment, a device module is packaged on a packaging substrate, and a cover plate is provided on the device module, realizing board-level packaging of the device module and protecting the device module through the cover plate. The cover plate has a through-hole area that corresponds to the high-power area of the device module. While protecting the device module with the cover plate, the through-hole area reduces the interface thermal resistance of the high-power area, which is beneficial for heat dissipation in the high-power area, i.e., the area with high heat dissipation requirements. This allows the packaging structure to simultaneously achieve good reliability and heat dissipation capability, improving the overall performance of the packaging structure.
[0009] In some embodiments of this disclosure, the device module includes at least one of a graphics processing unit (GPU) chip and a central processing unit (CPU) chip, and the high-power region includes the region where at least one of the GPU chip and the CPU chip is located.
[0010] In this embodiment, when the device module includes at least one of a graphics processor chip and a central processing unit chip, the area where at least one of the graphics processor chip and the central processing unit chip is located is designated as the high-power area of the device module. This achieves the division and determination of the high-power area, which can ensure the heat dissipation effect of the device with the highest importance and heat dissipation requirements in the device module. This provides a basis for the packaging structure to simultaneously take into account good reliability and heat dissipation capability.
[0011] In some embodiments of this disclosure, the packaging structure further includes a first thermally conductive layer disposed between the cover plate and the device module, wherein the projection of the first thermally conductive layer on the packaging substrate is offset from the projection of the cutout area on the packaging substrate.
[0012] In this embodiment, a first thermally conductive layer is provided between the cover plate and the device module, which realizes the tight connection and heat conduction between the cover plate and the device module. The projection of the first thermally conductive layer on the packaging substrate is configured to be offset from the projection of the hollow area on the packaging substrate. While ensuring the heat conduction between the cover plate and the device module, the heat dissipation effect of the high power consumption area is avoided, which further ensures the reliability and heat dissipation capacity of the packaging structure and is conducive to further improving the overall performance of the packaging structure.
[0013] In some embodiments of this disclosure, the encapsulation structure further includes a heat sink disposed on the cover plate.
[0014] In this embodiment, by setting a heat sink on the cover plate, the heat dissipation effect of the device module after passing through the cover plate and the hollow area can be guaranteed, so as to further improve the heat dissipation capacity of the packaging structure and thus ensure the overall performance of the packaging structure.
[0015] In some embodiments of this disclosure, the encapsulation structure further includes a second thermally conductive layer disposed between the cover plate and the heat sink.
[0016] In this embodiment, a second thermally conductive layer is provided between the cover plate and the heat sink, which realizes the relative fixation of the cover plate and the heat sink and heat conduction, further ensuring the reliability and heat dissipation capacity of the packaging structure, and is conducive to further improving the overall performance of the packaging structure.
[0017] In some embodiments of this disclosure, the second thermally conductive layer fills the hollowed-out area and contacts the high-power area.
[0018] In this embodiment, by filling the hollow area with the second thermally conductive layer and making contact with the high-power area, heat conduction between the heat sink and the high-power area and gap filling between the heat sink and the high-power area are achieved, which further ensures the reliability and heat dissipation capacity of the packaging structure and is conducive to further improving the overall performance of the packaging structure.
[0019] In some embodiments of this disclosure, the thermal conductivity of the first thermally conductive layer is greater than that of the second thermally conductive layer, and the elastic modulus of the first thermally conductive layer is less than that of the second thermally conductive layer.
[0020] In this embodiment, the thermal conductivity of the first thermal conductive layer is configured to be greater than that of the second thermal conductive layer, and the elastic modulus of the first thermal conductive layer is configured to be less than that of the second thermal conductive layer. This ensures that the first thermal conductive layer can achieve rapid conduction of high-density heat and tight bonding between the cover plate and the device module, and ensures that the second thermal conductive layer can provide stable support for the heat sink. By limiting the thermal conductivity and elastic modulus, the different functional positioning of the first and second thermal conductive layers is met, further ensuring the reliability and heat dissipation capacity of the packaging structure, which is conducive to further improving the overall performance of the packaging structure.
[0021] In some embodiments of this disclosure, the packaging structure further includes an anti-warping structure disposed on the packaging substrate around the device module, the anti-warping structure being used to prevent the packaging substrate from warping.
[0022] In this embodiment, an anti-warping structure is provided around the device module on the packaging substrate, which can effectively prevent the packaging substrate from warping, thereby further ensuring the reliability of the packaging structure and improving the overall performance of the packaging structure.
[0023] In some embodiments of this disclosure, the edge of the cover plate is connected to the anti-warping structure.
[0024] In this embodiment, the edge of the cover plate is connected to the anti-warping structure, so that the anti-warping structure can simultaneously provide anti-warping and support functions. This helps to simplify the structural design of the packaging structure and improve the space utilization of the packaging structure. Furthermore, the connected cover plate and anti-warping structure ensure the overall structural strength, which helps to further improve the reliability of the packaging structure.
[0025] According to a second aspect of the present disclosure, a circuit board assembly is provided, the circuit board assembly including the packaging structure as described in the first aspect, the circuit board assembly further including a circuit board, the packaging structure being disposed on the circuit board.
[0026] According to a third aspect of the present disclosure, an electronic device is provided, the electronic device including the packaging structure as described in the first aspect, or the electronic device including the circuit board assembly as described in the second aspect.
[0027] The technical solutions provided by the embodiments of this disclosure can include the following beneficial effects: A device module is packaged on a packaging substrate, and a cover plate is provided on the device module, achieving board-level packaging of the device module and protecting the device module through the cover plate. The cover plate has a perforated area that corresponds to the high-power area of the device module. While protecting the device module with the cover plate, the perforated area reduces the interface thermal resistance of the high-power area, which is beneficial for heat dissipation in the high-power area, i.e., the area with high heat dissipation requirements. This allows the packaging structure to simultaneously achieve good reliability and heat dissipation capacity, improving the overall performance of the packaging structure.
[0028] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description
[0029] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure.
[0030] Figure 1 This is a schematic diagram of a packaging structure.
[0031] Figure 2 This is a schematic diagram of another packaging structure.
[0032] Figure 3 This is a schematic diagram of the packaging structure according to an exemplary embodiment.
[0033] Figure 4 This is a schematic diagram of the structure of a circuit board assembly according to an exemplary embodiment.
[0034] Figure 5 This is a top view of the cover plate according to an exemplary embodiment.
[0035] Figure 6 This is a top view of the cover plate and the encapsulation substrate according to an exemplary embodiment.
[0036] In the picture:
[0037] 10-Packaging substrate; 20-Device module; 21-High power consumption area; 30-Cover plate; 31-Knockout area; 40-First thermal conductive layer; 50-Heat sink; 60-Second thermal conductive layer; 70-Anti-warping structure; 80-Circuit board. Detailed Implementation
[0038] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this disclosure. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this disclosure as detailed in the appended claims.
[0039] In recent years, with the rapid development of packaging technology and the continuous iteration of semiconductor devices, the performance requirements for packaging structures have been increasing. Reliability and heat dissipation capability, as important evaluation indicators in the testing and use stages of packaging structures, have gradually become key factors affecting the performance of packaging structures, product yield, and service life.
[0040] In one exemplary embodiment, a packaging structure is provided for implementing board-level packaging of a device module. The packaging structure may be disposed in a circuit board assembly and embedded in an electronic device such as a mobile phone, tablet computer, or smart band.
[0041] In one embodiment, reference Figure 1 As shown, a device module 20 is disposed on the packaging substrate 10, and a heat sink 50 is disposed on the device module 20 to achieve board-level packaging of the device module 20. Alternatively, refer to... Figure 2 As shown, a device module 20 is disposed on a packaging substrate 10, a cover plate 30 is disposed on the device module 20, and a heat sink 50 is disposed on the cover plate 30 to realize board-level packaging of the device module 20.
[0042] For example Figure 1 The packaging structure shown lacks the protection of the cover plate 30. During assembly, transportation, and storage before the heat sink 50 is installed, the device module 20 is constantly exposed, making it susceptible to damage and destruction, thus resulting in poor reliability of the packaging structure. For example... Figure 2 The packaging structure shown has an additional cover plate 30 above the device module 20, which adds an interfacial thermal resistance layer between the device module 20 and the heat sink 50, resulting in poor heat dissipation. Therefore, it is difficult to simultaneously achieve both reliability and heat dissipation capacity in the above packaging structures, thus limiting the overall performance of the packaging structure.
[0043] In another embodiment, reference Figure 3As shown, the packaging structure includes a packaging substrate 10, a device module 20, and a cover plate 30. The device module 20 is packaged on the packaging substrate 10. The cover plate 30 is disposed on the device module 20, and the cover plate 30 has a cutout area 31 that penetrates the cover plate 30. The projection of the cutout area 31 on the packaging substrate 10 at least partially overlaps with the projection of the high-power area 21 of the device module 20 on the packaging substrate 10.
[0044] The packaging substrate 10 provides functions such as load-bearing, electrical connection, and protection for the packaging structure, and realizes the effects of multi-input / output, overall packaging, and device modularization. (Reference) Figure 4 As shown, when the semiconductor component is disposed in the circuit board assembly, the packaging substrate 10 can be disposed on the circuit board 80 in the circuit board assembly and electrically connected to the circuit board 80 through electrical connectors such as bumps or ball grid arrays.
[0045] The device module 20 is packaged on the packaging substrate 10. The device module 20 can be electrically connected to the packaging substrate 10 through electrical connectors such as bumps or ball grid arrays. The gap between the device module and the packaging substrate is filled with underfill adhesive to realize the internal and external transmission of electrical signals and the integration and packaging of the device module 20. The device module 20 can be composed of one or more functional devices or modules. For example, the device module 20 includes a central processing unit (CPU) chip, a graphics processing unit (GPU) chip, and memory, etc.
[0046] A cover plate 30 is disposed on the device module 20, such that the cover plate 30 covers at least a portion of the top surface of the device module 20 to protect the device module 20. The bottom surface of the cover plate 30 can directly contact the top surface of the device module 20, and other intermediate layers may be disposed between the cover plate 30 and the device module 20. The material of the cover plate 30 may include, for example, a metal material such as copper, and the size and shape of the cover plate 30 match the size and shape of the device module 20.
[0047] like Figure 3 and Figure 5As shown, the cover plate 30 has a perforated area 31, which is a window design that exposes a portion of the device module 20 below the perforated area 31. The projection of the perforated area 31 onto the packaging substrate 10 coincides with the projection of the high-power region 21 of the device module 20 onto the packaging substrate 10. In other words, the perforated area 31 and the high-power region 21 of the device module 20 are horizontally aligned, ensuring that the portion of the device module 20 not covered by the cover plate 30 contains the high-power region 21. Since the high-power region 21 of the device module 20 generates a significant amount of heat, the perforated area 31 prevents the cover plate 30 from obstructing the dissipation of this concentrated heat, thus reducing the interfacial thermal resistance of the high-power region 21.
[0048] The high-power region 21 of the device module 20 can be determined empirically or based on the average power consumption level of each device and module. The projection of the cutout region 31 onto the packaging substrate 10 and the projection of the high-power region 21 onto the packaging substrate 10 can be completely overlapping, completely contained, or partially contained. Compared to related technologies where the packaging structure does not have a cover plate 30 or has a complete cover plate 30, the above packaging structure, by providing a cover plate 30 with a cutout region 31, can protect the device module 20 through the portion outside the cutout region 31 of the cover plate 30, and prioritize the heat dissipation effect of the high-power region 21 through the cutout region 31, thereby simultaneously ensuring the reliability and heat dissipation capacity of the packaging structure.
[0049] It should be noted that the cover plate 30 is made of a metal with a high thermal conductivity, giving it a certain degree of heat dissipation and conduction. When the portion of the cover plate 30, excluding the hollowed-out area 31, covers the device module 20, it not only provides protection for the device module 20 but also offers a certain degree of heat dissipation and conduction. Since the hollowed-out area 31 corresponds to the high-power area 21, the portion of the cover plate 30, excluding the hollowed-out area 31, corresponds to the low-power area of the device module 20, ensuring that the portion of the device module 20 covered by the cover plate 30 can also meet certain heat dissipation requirements.
[0050] In this embodiment, a device module 20 is packaged on a packaging substrate 10, and a cover plate 30 is provided on the device module 20, realizing board-level packaging of the device module 20 and protecting the device module 20 through the cover plate 30. The cover plate 30 is provided with a cutout area 31 that penetrates the cover plate 30, and the cutout area 31 corresponds to the high-power area 21 of the device module 20. While protecting the device module 20 through the cover plate 30, the cutout area 31 reduces the interface thermal resistance of the high-power area 21, which is beneficial to the heat dissipation of the high-power area 21, i.e., the area with high heat dissipation requirements. This allows the packaging structure to simultaneously achieve good reliability and heat dissipation capability, improving the overall performance of the packaging structure.
[0051] In some embodiments, device module 20 includes at least one of a graphics processor chip and a central processing unit chip, and high-power region 21 includes the region where at least one of the graphics processor chip and the central processing unit chip is located.
[0052] The device module 20 may include at least one of a graphics processing unit (GPU) chip and a central processing unit (CPU) chip. The GPU chip is capable of synchronous processing of large amounts of graphics data and can be used for deep learning in artificial intelligence models. The CPU chip is used to perform task scheduling and logic control, and is responsible for coordinating the operation of the entire system.
[0053] When the device module 20 includes at least one of a graphics processor chip and a central processing unit (CPU), the graphics processor chip and the CPU chip consume a lot of power and generate a lot of heat during operation. The area where at least one of the graphics processor chip and the CPU chip included in the device module 20 is located can be designated as the high power consumption area 21 of the device module 20, so that the cutout area 31 of the cover plate 30 corresponds to at least one of the graphics processor chip and the CPU chip, so as to prioritize the heat dissipation effect of the graphics processor chip and the CPU chip.
[0054] For example, such as Figure 6 As shown, the device module 20 includes both a graphics processing unit (GPU) chip and a central processing unit (CPU) chip. The regions A and B, where both are located, are both high-power regions 21 of the device module 20. The cover plate 30 has two cutout regions 31, namely regions C and D. The projection of region A falls within the projection range of region C, and the projection of region B falls within the projection range of region D, so that the cutout regions 31 of the cover plate 30 correspond to the high-power regions 21 of the device module 20.
[0055] In this embodiment, when the device module 20 includes at least one of a graphics processor chip and a central processing unit chip, the area where at least one of the graphics processor chip and the central processing unit chip is located is designated as the high power consumption area 21 of the device module 20. This achieves the division and determination of the high power consumption area 21, which can ensure the heat dissipation effect of the device with the highest importance and heat dissipation requirements in the device module 20, and provides a basis for the packaging structure to simultaneously take into account good reliability and heat dissipation capability.
[0056] In some embodiments, the packaging structure further includes a first thermally conductive layer 40, which is disposed between the cover plate 30 and the device module 20. The projection of the first thermally conductive layer 40 on the packaging substrate 10 is offset from the projection of the cutout area 31 on the packaging substrate 10.
[0057] like Figure 3 As shown, the encapsulation structure also includes a first thermally conductive layer 40 disposed between the cover plate 30 and the device module 20. The first thermally conductive layer 40 conducts the heat generated by the device module 20 to the cover plate 30 through its good thermal conductivity, and achieves a tight bond between the cover plate 30 and the device module 20 through its good flexibility and interface adaptability. For example, the material of the first thermally conductive layer 40 can be a polymer material such as silicone or epoxy resin.
[0058] The projection of the first thermal conductive layer 40 on the packaging substrate 10 is offset from the projection of the cutout area 31 on the packaging substrate 10. That is, the first thermal conductive layer 40 and the cutout area 31 avoid each other in the horizontal direction, and their projections on the packaging substrate 10 do not overlap. This ensures that the heat generated by the part of the device module 20 covered by the cover plate 30 can be conducted to the cover plate 30, and prevents the part of the device module 20 exposed to the cover plate 30 through the cutout area 31 from being covered by the first thermal conductive layer 40, thereby affecting the heat dissipation effect of the high power consumption area 21.
[0059] In this embodiment, a first thermally conductive layer 40 is provided between the cover plate 30 and the device module 20, which realizes the tight connection and heat conduction between the cover plate 30 and the device module 20. The projection of the first thermally conductive layer 40 on the packaging substrate 10 is configured to be offset from the projection of the hollow area 31 on the packaging substrate 10. While ensuring the heat conduction between the cover plate 30 and the device module 20, the heat dissipation effect of the high power consumption area 21 is avoided, which further ensures the reliability and heat dissipation capacity of the packaging structure and is conducive to further improving the overall performance of the packaging structure.
[0060] In some embodiments, the encapsulation structure further includes a heat sink 50 disposed on the cover plate 30.
[0061] like Figure 3As shown, the packaging structure also includes a heat sink 50, which is disposed above the cover plate 30. This allows the heat generated by the device module 20 to dissipate through the cover plate 30 and the cutout area 31 via the heat sink 50, thereby improving the heat dissipation capacity of the packaging structure. The bottom surface of the heat sink 50 can directly contact the top surface of the cover plate 30, and other intermediate layers can also be provided between the heat sink 50 and the cover plate 30. For example, the material of the heat sink 50 can be a metal such as copper, and the heat sink 50 can be, for example, serrated, i.e., heat dissipation fins, to further improve the heat dissipation effect of the heat sink 50 by increasing its surface area.
[0062] In this embodiment, by providing a heat sink 50 on the cover plate 30, the heat dissipation effect of the device module 20 after passing through the cover plate 30 and the hollow area 31 can be guaranteed, so as to further improve the heat dissipation capacity of the packaging structure and thus ensure the overall performance of the packaging structure.
[0063] In some embodiments, the encapsulation structure further includes a second thermally conductive layer 60, which is disposed between the cover plate 30 and the heat sink 50.
[0064] like Figure 3 As shown, the packaging structure also includes a second thermally conductive layer 60 disposed between the cover plate 30 and the heat sink 50. The second thermally conductive layer 60 conducts heat from the device module 20 to the cover plate 30 and then to the heat sink 50 through its excellent thermal conductivity, and ensures structural support for the heat sink 50 through its excellent mechanical properties. For example, the material of the second thermally conductive layer 60 can be a polymer material or liquid metal.
[0065] In this embodiment, a second thermally conductive layer 60 is provided between the cover plate 30 and the heat sink 50, which realizes the relative fixation of the cover plate 30 and the heat sink 50 and heat conduction, further ensuring the reliability and heat dissipation capacity of the packaging structure, and is conducive to further improving the overall performance of the packaging structure.
[0066] In some embodiments, the second thermally conductive layer 60 fills the hollowed-out region 31 and contacts the high-power region 21.
[0067] like Figure 3 As shown, the second thermal conductive layer 60, in addition to being disposed between the cover plate 30 and the heat sink 50, can also fill the hollow area 31 and contact the high power consumption area 21 of the device module 20. Through its good thermal conductivity, it can directly conduct the heat generated by the high power consumption module to the heat sink 50, and through its good fluidity, it can fill the gap between the heat sink 50 and the device module 20, thereby further ensuring the support stability of the heat sink 50.
[0068] In this embodiment, by filling the hollow area 31 with the second thermal conductive layer 60 and contacting the high power consumption area 21, heat conduction between the heat sink 50 and the high power consumption area 21 and gap filling between the heat sink 50 and the high power consumption area 21 are realized, which further ensures the reliability and heat dissipation capacity of the packaging structure and is conducive to further improving the overall performance of the packaging structure.
[0069] In some embodiments, the thermal conductivity of the first thermally conductive layer 40 is greater than that of the second thermally conductive layer 60, and the elastic modulus of the first thermally conductive layer 40 is less than that of the second thermally conductive layer 60.
[0070] As mentioned above, the first thermally conductive layer 40 is disposed between the cover plate 30 and the device module 20 to conduct heat between the cover plate 30 and the device module 20 and to achieve a tight connection between the cover plate 30 and the device module 20. The second thermally conductive layer 60 is disposed between the cover plate 30 and the heat sink 50 to conduct heat between the cover plate 30 and the heat sink 50 and to support the heat sink 50 and fill the gap between the heat sink 50 and the device module 20. This results in a certain difference in the functional positioning of the first thermally conductive layer 40 and the second thermally conductive layer 60.
[0071] Therefore, the thermal conductivity of the first thermally conductive layer 40 is configured to be greater than that of the second thermally conductive layer 60 to quickly conduct the high-density heat at the location of the device module 20 to the cover plate 30, thereby prioritizing the heat conduction effect at the most critical location in the entire heat conduction path. The elastic modulus of the first thermally conductive layer 40 is set to be less than that of the second thermally conductive layer 60, so as to utilize the good flexibility of the first thermally conductive layer 40 to ensure a tight bond between the device module 20 and the cover plate 30, and to utilize the good mechanical properties of the second thermally conductive layer 60 to ensure structural support for the heat sink 50. For example, the thermal conductivity of the first thermally conductive layer 40 can be, for example, 8 to 15 W / m*K, and the elastic modulus of the first thermally conductive layer 40 can be, for example, 60 to 100 GPa; the thermal conductivity of the second thermally conductive layer 60 can be, for example, 3 to 8 W / m*K, and the elastic modulus of the second thermally conductive layer 60 can be, for example, 100 to 140 GPa.
[0072] In this embodiment, the thermal conductivity of the first thermally conductive layer 40 is configured to be greater than that of the second thermally conductive layer 60, and the elastic modulus of the first thermally conductive layer 40 is configured to be less than that of the second thermally conductive layer 60. This ensures that the first thermally conductive layer 40 can achieve rapid conduction of high-density heat and tight bonding between the cover plate 30 and the device module 20, and ensures that the second thermally conductive layer 60 can provide stable support for the heat sink 50. By limiting the thermal conductivity and elastic modulus, the different functional positioning of the first thermally conductive layer 40 and the second thermally conductive layer 60 is met, further ensuring the reliability and heat dissipation capacity of the packaging structure, which is conducive to further improving the overall performance of the packaging structure.
[0073] In some embodiments, the packaging structure further includes an anti-warping structure 70, which is disposed around the device module 20 on the packaging substrate 10 and is used to prevent the packaging substrate 10 from warping.
[0074] like Figure 3 As shown, the packaging structure also includes an anti-warping structure 70 disposed on the packaging substrate 10 and surrounding the device module 20. A continuous closed-loop structure is formed on the outer side of the device module 20, i.e. the edge of the packaging substrate 10, serving as a boundary for structural constraints. It can utilize the rigidity and shape memory effect of the material to offset the stress in the packaging structure, thereby achieving the function of preventing the packaging substrate 10 from warping.
[0075] In this embodiment, an anti-warping structure 70 is provided on the packaging substrate 10 around the device module 20, which can effectively prevent the packaging substrate 10 from warping, thereby further ensuring the reliability of the packaging structure and improving the overall performance of the packaging structure.
[0076] In some embodiments, the edge of the cover plate 30 is connected to the anti-warping structure 70.
[0077] like Figure 3 As shown, the edge of the cover plate 30 is connected to the anti-warping structure 70, that is, the edge of the cover plate 30 is placed on the anti-warping structure 70, so that the anti-warping structure 70 can not only prevent the packaging substrate 10 from warping, but also provide edge support for the cover plate 30. Furthermore, the connected cover plate 30 and the anti-warping structure 70 simultaneously achieve heat conduction and structural protection for the device module 20 in multiple directions above and to the sides.
[0078] In this embodiment, the edge of the cover plate 30 is connected to the anti-warping structure 70, so that the anti-warping structure 70 can simultaneously provide anti-warping and support functions. This helps to simplify the structural design of the packaging structure and improve the space utilization of the packaging structure. Furthermore, the connected cover plate 30 and the anti-warping structure 70 ensure the overall structural strength, which helps to further improve the reliability of the packaging structure.
[0079] In one exemplary embodiment, a circuit board assembly is provided, the circuit board assembly including the packaging structure as described above, the circuit board assembly further including a circuit board 80, the packaging structure being disposed on the circuit board 80.
[0080] like Figure 4 As shown, the circuit board assembly includes a circuit board 80 and the packaging structure shown in the above embodiments. The packaging structure is disposed on the circuit board 80. The circuit board 80 can provide a carrier for the packaging structure and is electrically connected to the packaging substrate 10 of the packaging structure through electrical connectors to meet the electrical interconnection requirements of the circuit board assembly.
[0081] In this embodiment, the circuit board assembly has the same advantages because its packaging structure has the advantages of both reliability and heat dissipation.
[0082] In one exemplary embodiment, an electronic device is provided, which includes at least one of the packaging structure and circuit board assembly as described above. The electronic device may be, for example, a mobile phone, a tablet computer, a wristband, etc.
[0083] In this embodiment, since the packaging structure and circuit board assembly of the electronic device both have the advantages of balancing reliability and heat dissipation, the electronic device has the same advantages.
[0084] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the disclosure herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered illustrative only, and the true scope and spirit of this disclosure are indicated by the following claims.
[0085] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is limited only by the appended claims.
Claims
1. A package structure, characterized by, The packaging structure comprises: a packaging substrate; a device module encapsulated on the packaging substrate; a cover plate arranged on the device module, the cover plate being provided with a hollowed-out area penetrating through the cover plate, a projection of the hollowed-out area on the packaging substrate at least partially coinciding with a projection of a high-power consumption area of the device module on the packaging substrate.
2. The package structure of claim 1, wherein, The device module comprises at least one of a graphics processor chip and a central processor chip, and the high-power consumption area comprises an area where the at least one of the graphics processor chip and the central processor chip is located.
3. The package structure of claim 1, wherein, The packaging structure further comprises a first heat-conducting layer arranged between the cover plate and the device module, a projection of the first heat-conducting layer on the packaging substrate being staggered with a projection of the hollowed-out area on the packaging substrate.
4. The package structure of claim 3, wherein, The packaging structure further comprises a heat sink arranged on the cover plate.
5. The package structure of claim 4, wherein, The packaging structure further comprises a second heat-conducting layer arranged between the cover plate and the heat sink.
6. The package structure of claim 5, wherein, The second heat-conducting layer fills the hollowed-out area and is in contact with the high-power consumption area.
7. The package structure of claim 5, wherein, The first heat-conducting layer has a thermal conductivity greater than that of the second heat-conducting layer, and the first heat-conducting layer has an elastic modulus smaller than that of the second heat-conducting layer.
8. The package structure of any one of claims 1 to 7, wherein, The packaging structure further comprises an anti-warping structure arranged on the packaging substrate around the device module, the anti-warping structure being configured to prevent the packaging substrate from warping.
9. The package structure of claim 8, wherein, An edge of the cover plate is connected to the anti-warping structure.
10. A circuit board assembly, characterized by The circuit board assembly comprises the packaging structure according to any one of claims 1 to 9, and further comprises a circuit board, the packaging structure being arranged on the circuit board.
11. An electronic device, comprising: The electronic device comprises the packaging structure according to any one of claims 1 to 9, or the electronic device comprises the circuit board assembly according to claim 10.