A national production, high computing power, high real-time vehicle-mounted edge computer device

Abstract

The utility model relates to a kind of national production, high computing power, high real-time vehicle-mounted edge computer device, belong to vehicle-mounted computer hardware field.Solve the current foreign technology blockade, chip risk and the problem of insufficient multi-source data synchronization accuracy.The hardware architecture of the device adopts main controller ascending 310P, coordination controller Guomicro SMQ7K325T FPGA, health management module GD32F407 MCU and two-stage power management module, main controller receives 6 channel SDI video data of FPGA pre-processing by PCIe×8 interface, receives 5 channel Ethernet radar data and 6 channel CAN bus control data by gigabit network;FPGA is based on PTP protocol and realizes multi-source sensor synchronous acquisition delay≤0.5ms;Health management module monitors main control state by I2C bus, and after losing 3 times heartbeat successively, CAN control right is taken over by SN65HVD230 chip;Power module uses SM4630 / SM4644 chip set to realize 24V→12V→multi-voltage conversion efficiency 94.2%.The hardware nationalization rate of the device is 100%, and it is suitable for special vehicle high real-time edge computing scene.

Description

Technical Field

[0001] This utility model relates to the field of vehicle-mounted computer hardware devices, and in particular to a heterogeneous architecture vehicle-mounted edge computer device based on FPGA and Ascend 310P processor. Background Technology

[0002] Intelligent driving technology has not only restructured the vehicle's motion control logic, but also driven the development of automotive electronic and electrical architecture from a distributed to an integrated approach. Intelligent driving places extremely high demands on data fusion and real-time edge computing for processing data from multi-source heterogeneous sensors. This requires the central domain controller to have a high-frequency multi-core CPU, a high-performance NPU, and various bus interface controllers, which can not only deploy artificial intelligence algorithms, but also integrate and manage various sensors, ECUs (electronic control units), and electronic and electrical distribution systems in a unified manner.

[0003] Currently, high-performance, high-computing-power vehicle computing platforms and their operating systems abroad often have "backdoors," posing significant risks to vehicle information security and driving safety, making them unsuitable for industrial special vehicles.

[0004] Although there are several high-performance vehicle computing platforms with computing power of 120T or more available in the domestic market, such as Huawei MDC 610, Huawei MDC810, and Neusoft Reach Integrated Domain Controller, Huawei MDC 610 and Huawei MDC 810 are designed based on the Ascend 610 chip, while Neusoft Reach Integrated Domain Controller is based on the Horizon Robotics Journey 5 chip. The Ascend 610 chip and the Horizon Robotics Journey 5 chip have fully independent design principles. However, the 7nm and 16nm processes cannot be mass-produced in China, making them unsuitable for the special vehicle field. Utility Model Content

[0005] This invention proposes a heterogeneous vehicle-mounted edge computing device based on FPGA+Ascend 310P, which consists of several modules such as a main controller, a co-controller, a health management system, and a power management system. The main controller is implemented based on the Ascend 310P minimum system, which adopts a SOC architecture with 16 CPU cores at 1.9GHz and 176T NPU at INT8. The Ascend 310P module can run the fully domestically produced OpenEuler operating system image, supports multiple mainstream AI frameworks, and has powerful image encoding and decoding capabilities. The manufacturing process and principle design are all independently controllable. The co-controller is implemented based on the FPGA minimum system and is used for simultaneous acquisition and synchronous processing of data from 6-channel SDI video interface, 5-channel Ethernet interface, and 6-channel CAN bus interface. The health management module is implemented based on the MCU and exposes IIC and RS422 interfaces. The main processor and co-processor are connected through PCIe bus and TSN network to meet the high-bandwidth data transmission requirements between the main and co-processors. The main processor and health management module communicate through UART and IIC interfaces, and multi-level fault detection is achieved by detecting heartbeat signals and monitoring hardware status.

[0006] To achieve the purpose of this utility model, the technical solution adopted by this utility model is as follows: design an in-vehicle edge computer device based on FPGA + Ascend 310P, including four modules: main controller module, co-controller module, health management module, and power management module.

[0007] Preferably, the main controller module includes: The Ascend 310P module features a 16-core CPU at 1.9GHz and a 176T NPU at INT8. It provides external 10 Gigabit Ethernet, a debug Ethernet port, a debug serial port, and a PCIe x8 interface for receiving image and radar data processed by the co-controller, performing logical calculations and AI intelligent calculations. The Ascend 310P module supports AI frameworks including PyTorch, TensorFlow, and Ascend, and can compile and deploy algorithm models through the CANN heterogeneous computing framework, greatly simplifying the AI ​​algorithm deployment process.

[0008] Preferably, the co-controller module includes: The FPGA minimum system is used to acquire, unpack, and preprocess signals from multiple heterogeneous sensors such as SDI video, LiDAR, and millimeter-wave radar, and improve the accuracy of data fusion by optimizing protocols and synchronization. The peripheral circuitry includes a 6-channel SDI video acquisition circuit, a 5-channel gigabit Ethernet interface circuit, and a 6-channel CAN bus interface circuit, which are used to convert vehicle video, radar, control, and other signals into signals that can be acquired by the FPGA. The co-controller module is implemented using an FPGA chip of model SMQ7K325TFFG900. The main controller module and the co-controller module achieve high-speed data interaction through PCIE bus and 10 Gigabit Ethernet. The overall components and software of the device have a localization rate of 100%.

[0009] Preferably, the power management module includes: The first-stage voltage conversion circuit uses a power supply module to convert a 24V input voltage to a 12V output voltage; The two-stage voltage conversion circuit uses SM4630 and SM4644 DC-DC switching power supplies and SM51200 reference voltage chip to convert 12V voltage into multiple working voltages of 1.0V, 1.2V, 1.8V, 3.3V and 1.5V.

[0010] Preferably, the system disk supports multiple boot modes including eMMC, SATA, and SD card, and the boot mode selection is achieved by configuring the resistance value of the boot mode control resistor.

[0011] Preferably, the power management module has input short-circuit protection and overvoltage protection functions, and improves power supply heat dissipation and reliability through a two-stage voltage conversion design.

[0012] Preferably, the health management module receives fault information from the main controller via the IIC interface, monitors the health status of the main controller, and controls the vehicle's motion status via the externally exposed CAN bus interface, thus enabling the following fault switching mechanism: The I²C bus detects the master controller's heartbeat signal every 50ms. If there is no response for three consecutive times, the MCU will take over the CAN bus through the SN65HVD230 chip.

[0013] Compared with the prior art, the beneficial effects of this utility model are as follows: The main controller of this utility model adopts a modular form, which greatly simplifies the principle design of memory, storage and power supply. It reduces the design and development difficulty in many aspects such as hardware design, system operation and software algorithm deployment. It has the technical advantages of simple development process and strong versatility. Moreover, the localization rate of hardware components, software operating system and process technology is 100%. All technologies are independently controllable, which meets the needs of industrial fields and special vehicle fields for high computing power and high real-time performance vehicle edge computing devices. Attached Figure Description

[0014] Figure 1 This is a block diagram of a fully domestically produced, high-computing-power, and high-real-time vehicle-mounted edge computer solution of this utility model; Figure 2This is a schematic diagram of the data processing flow of the domestically produced, high-computing-power, and high-real-time vehicle-mounted edge computer of this utility model; Figure 3 This is a power management diagram of the domestically produced, high-computing-power, and high-real-time vehicle-mounted edge computer of this utility model; Figure 4 This is a power-on timing diagram of the domestically produced, high-computing-power, and high-real-time vehicle-mounted edge computer of this utility model; In the diagram: 1. Main controller module; 2. Co-controller module; 3. Power management module; 4. Health management module. Detailed Implementation

[0015] like Figure 1-4 As shown, this invention is a fully domestically produced, high-computing-power, high-real-time vehicle-mounted edge computing device, including a main controller module, a co-controller module, a health management module, and a power management module. The main controller module and the co-controller module communicate with each other via a PCIe bus and a 10 Gigabit Ethernet bus. The PCIe bus is used to transmit synchronously processed 6-channel SDI video image data, and the 10 Gigabit Ethernet bus is used to realize synchronously processed 3-channel Gigabit Ethernet data and 6-channel CAN bus data interaction. The health management module provides SPI bus and IIC bus control, and collects health data from the main controller module and the co-controller module to realize multi-level health monitoring of both. The main controller module uses the Ascend 310P processor module, which integrates a 16-core CPU and a 176T computing power NPU; The co-controller module uses the Guowei SMQ7K325TFFG900 FPGA chip; The health management module uses a GD32F407 MCU. The power management module adopts a two-stage voltage conversion architecture.

[0016] Furthermore, a dual-channel data transmission link is established between the main controller module and the co-controller module, specifically: a PCIe×8 bus channel for transmitting video data; and a 10 Gigabit Ethernet channel for transmitting radar and control data.

[0017] Furthermore, the co-controller module includes: a 6-channel SDI video acquisition circuit; a 5-channel Gigabit Ethernet PHY interface; a 6-channel CAN bus isolation circuit; and a synchronization processing unit based on the PTP protocol.

[0018] Furthermore, the power management module includes: a first-stage 24V→12V conversion circuit using the Excellent Intelligent Power Module; a second-stage multi-output circuit using the Guowei SM4630 / SM4644 chipset; and a triple protection circuit for overvoltage, short circuit, and surge.

[0019] Furthermore, the health management module is configured with: an I²C bus master control status monitoring interface; 6 RS422 extended communication interfaces; and a CAN bus redundant control channel.

[0020] Furthermore, the main controller module is equipped with a multi-mode boot circuit: the boot mode can be selected by configuring the resistor value (eMMC / SATA / SD card); and it has a built-in storage partition for the domestic OpenEuler operating system.

[0021] The present invention will be further described below with reference to the accompanying drawings and embodiments: A fully domestically produced, high-computing-power, high-real-time-performance vehicle-mounted edge computing device based on FPGA + Ascend 310P, such as Figure 1 As shown, the vehicle-mounted edge computing device of this invention includes a main controller module 1, a co-controller module 2, a health management module 3, and a power management module 4. The main controller module 1 and the co-controller module 2 communicate via a PCIe bus and a 10 Gigabit Ethernet bus. The PCIe bus is used to transmit 6-channel SDI video image data after synchronous processing, and the 10 Gigabit Ethernet bus is used to realize 3-channel Gigabit Ethernet data (Ethernet_0, Ethernet_1, Ethernet_2) and 6-channel CAN bus data interaction after synchronous processing. The health management module 3 provides SPI bus and IIC bus control and acquisition of health data from the main controller module 1 and the co-controller module 2, realizing multi-level health monitoring of both.

[0022] like Figure 1 As shown, the external interfaces of the vehicle-mounted edge computer of this utility model include a 6-channel SDI video acquisition interface (for acquiring video data from vehicle-mounted cameras), a 5-channel gigabit Ethernet interface (for acquiring LiDAR, millimeter-wave radar data, and remote debugging, respectively), a 6-channel CAN bus interface (for acquiring data through an isolated serial port chip, used to acquire and control vehicle electronic signals, chassis control signals, power system signals, etc.), a 6-channel RS422 communication interface (for converting UART to RS422 protocol through an isolated serial port chip, used for communication and control between other external devices), and one debugging serial port.

[0023] Specifically, the main controller module 1 is designed based on the Ascend 310P minimum system and is mainly used for logical calculations and AI intelligent calculations on the data input from the co-controller 2. The Ascend 310P minimum system is developed and designed based on the Huawei Ascend 310P module, which integrates a 16-core CPU (1.9GHz) and an NPU with 176T@INT8 computing power, and has rich data interfaces such as 10 Gigabit Ethernet, PCIe, Gigabit Ethernet, CAN bus, and UART.

[0024] Furthermore, the co-controller module 2 is designed based on an FPGA minimum system and is mainly used for data acquisition from the vehicle's multi-source heterogeneous sensors. The FPGA minimum system is implemented based on the SMQ7K325TFFG900 FPGA chip from Shenzhen Guowei Electronics Co., Ltd. This chip integrates 16 GTX resources and a PCIE bus controller, with 326,080 logic resources, which can meet the requirements of video decoding and transmission for logic resources, as well as the stability of high-speed data conversion and transmission. By writing the timing logic of the FPGA, the driver and configuration of interface circuits such as SDI, Gigabit Ethernet, and CAN bus are completed to realize data acquisition. The FPGA minimum system performs synchronous processing on the unpacked video data, radar data, etc. based on Precision Time Protocol (PTP) and transmits them to the main controller 1 for processing and calculation through the PCIE bus and 10 Gigabit Ethernet respectively.

[0025] like Figure 2 As shown, after the system powers on normally and starts up, the startup configuration items and driver startup items are loaded sequentially. The co-controller collects and synchronizes data from the vehicle's multi-source heterogeneous sensors. The data is transmitted to the main controller via the PCIE bus and 10 Gigabit Ethernet. The main controller performs operator conversion on the data to be calculated through the CANN framework and starts the CPU thread and NPU thread to perform logical calculations and AI calculations on the data. Based on the calculation results, it provides feedback and control to each actuator.

[0026] like Figure 3 As shown, power management module 3 adopts a two-stage voltage conversion design: The power management module adopts a two-stage power supply scheme, as shown in the diagram below. Figure 2 As shown. The first-stage voltage conversion circuit uses a (Excellent Intelligent Power Module, power rating: [not specified]), realizing the 24V to 12V voltage conversion function to power the Ascend 310P minimum system. The second-stage voltage conversion circuit uses the SM4630 and SM4644 DC-DC switching power supplies from Shenzhen Guowei Electronics Co., Ltd., realizing the 12V to FPGA core power supply 1.0V, 1.2V, 3.3V IO and 1.8V IO functions, as well as powering various interface chips and DDR3. The board is powered by an external 12V supply, and the power tree design is as follows: Figure 4 As shown. The power management circuit features input short-circuit protection, overvoltage protection, and surge protection, and optimizes heat dissipation and power supply reliability through a two-stage conversion design.

[0027] like Figure 4As shown, the health management module is implemented based on the MCU minimum system. It is mainly used for multi-level health monitoring of the main controller and as a backup controller, ensuring that the vehicle can still operate and be controlled normally even if the main controller fails. The MCU minimum system is designed based on the GigaDevice GD32F407. This minimum system interacts with the co-controller via a 100Mbps network and monitors the health status of the main controller via the IIC bus. It also exposes a CAN bus interface for data communication with control and actuator mechanisms.

[0028] Compared with the prior art, the beneficial effects of this utility model are as follows: 1. This utility model realizes a high computing power and high real-time performance vehicle edge computer through a heterogeneous solution of FPGA + Ascend 310P. All principles, devices, processing technology, operating system and software framework of this computing platform are 100% independently controllable, providing a safe and reliable high real-time edge computing platform for the field of domestic special vehicles; 2. The vehicle-mounted edge computer of this utility model exposes a wealth of data interfaces, enabling simultaneous acquisition and time-synchronized processing of multi-source heterogeneous data such as video, lidar, and millimeter-wave radar from the vehicle, thereby achieving high real-time data acquisition and processing capabilities. 3. The health management module of this utility model not only performs multi-level fault detection on the main controller, but also serves as a backup controller to ensure that the vehicle can take over the main controller when the main controller fails.

[0029] In addition, all components designed in this utility model are general standard parts or components known to those skilled in the art. Their structure and principle can be learned by those skilled in the art through technical manuals or conventional experimental methods. Those skilled in the art can fully implement them, so there is no need to elaborate. The content protected by this utility model does not involve improvements to the internal structure and method.

[0030] The embodiments disclosed herein are preferred embodiments, but are not limited thereto. Those skilled in the art can readily grasp the spirit of this utility model based on the above embodiments and make different extensions and variations. However, as long as they do not depart from the spirit of this utility model, they are all within the protection scope of this utility model.

Claims

1. A domestically produced, high-performance, high real-time vehicle-mounted edge computer device, characterized by: It includes a main controller module, a co-controller module, a health management module, and a power management module; The main controller module and the co-controller module communicate with each other via PCIe bus and 10 Gigabit Ethernet. The PCIe bus is used to transmit 6-channel SDI video image data after synchronous processing, and 10 Gigabit Ethernet is used to realize the interaction of 3-channel Gigabit Ethernet data and 6-channel CAN bus data after synchronous processing. The health management module provides SPI bus and IIC bus control and acquisition of health data of the main controller module and the co-controller module to realize multi-level health monitoring of both. The main controller module uses the Ascend 310P processor module, which integrates a 16-core CPU and a 176T computing power NPU; The co-controller module uses the Guowei SMQ7K325TFFG900 FPGA chip; The health management module uses a GD32F407 MCU. The power management module adopts a two-stage voltage conversion architecture.

2. The national production, high computing power, high real-time vehicle-mounted edge computer device according to claim 1, characterized in that: A dual-channel data transmission link is established between the main controller module and the co-controller module, specifically as follows: PCIe x8 bus channels transmit video data; Transmit radar and control data via a 10 Gigabit Ethernet channel.

3. The nationalization, high computing power, high real-time vehicle-mounted edge computer device according to claim 1, characterized in that: The co-controller module includes: 6-channel SDI video acquisition circuit; 5-channel Gigabit Ethernet PHY interface; 6-channel CAN bus isolation circuit; Synchronization processing unit based on PTP protocol.

4. The fully domestically produced, high-computing-power, high-real-time vehicle-mounted edge computing device according to claim 1, characterized in that: The power management module includes: The first-stage 24V→12V conversion circuit uses a superior intelligent power module. The two-stage multi-output circuit uses the Guowei SM4630 / SM4644 chipset; Triple protection circuit for overvoltage, short circuit, and surge.

5. The nationalization, high computing power, high real-time vehicle-mounted edge computer device according to claim 1, characterized in that: The health management module is configured as follows: I²C bus master control status monitoring interface; 6-channel RS422 expansion communication interface; CAN bus redundant control channels.

6. The nationalization, high computing power, high real-time vehicle-mounted edge computer device according to claim 1, characterized in that: The main controller module is equipped with a multi-mode startup circuit: Select the eMMC / SATA / SD card boot mode by configuring the resistor value; Built-in storage partition of the domestically developed OpenEuler operating system.

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