A bleeder circuit based on input stage voltage feedforward

CN224774603UActive Publication Date: 2026-09-18HENAN POWER TRANSMISSION & TRANSFORMATION CONSTR CO LTD
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Patent Information

Application Number
CN202522253446.1
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-10-24
Publication Date
2026-09-18
Estimated Expiration
2035-10-24

AI Technical Summary

Technical Problem

[0004]本实用新型的目的是提供一种输入级电压前馈的泄放电路,用于解决现有技术中CPU断电时,外设信号管脚电源长时间冲击CPU管脚造成系统损坏,进而影响系统可靠性的技术问题

Benefits of technology

[0009]The beneficial effects of this invention are as follows: An input-stage voltage feedforward bleeder circuit is set up. By sequentially connecting a voltage regulator circuit, a voltage divider control circuit, a delay circuit, and a bleeder circuit, the bleeder circuit is electrically connected to the positive terminal of the power supply to be bleed. Through the mutual cooperation between the voltage regulator circuit, the voltage divider control circuit, the delay circuit, and the bleeder circuit, the bleeder circuit can promptly detect changes in the upstream input power supply and quickly bleed the power supply energy, thereby protecting the system from damage. Furthermore, this bleeder circuit consumes low power during system operation, ensuring system reliability and improving the system's safety factor. In addition, by adjusting the detection threshold through the voltage regulator chip and the voltage divider control circuit, precise discharge control is achieved, adapting to different application requirements. In short, this bleeder circuit has a simple structure, fast response speed, stable operation, and high reliability; it is simple to implement, low in cost, and has strong scalability.

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Abstract

The utility model discloses a kind of based on input stage voltage feedforward bleeder circuit, through the voltage stabilizing circuit, voltage division control circuit, delay circuit, bleeder circuit of being arranged in turn, bleeder circuit is electrically connected with the positive electrode of to-be-bleeding power supply, by the mutual cooperation between voltage stabilizing circuit, voltage division control circuit, delay circuit, bleeder circuit, so that bleeder circuit can promptly perceive the change of front-stage input power supply to quickly discharge power energy, to protect system from being damaged.And the bleeder circuit when system works, low power consumption, ensure system reliability improve the safety factor of system work.In addition, by voltage stabilizing chip, voltage division control circuit adjustment detection threshold, realize accurate control discharge, adapt to different application demand.That the bleeder circuit structure is simple, response speed is fast, stable operation, high reliability;Realize simple, low cost and strong expansion application.
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Description

Technical Field

[0001] This utility model belongs to the field of intelligent substation technology, specifically relating to an input stage voltage feedforward bleeder circuit. Background Technology

[0002] With the continuous development of smart grids, power system equipment is becoming increasingly intelligent and digital, and the integration of control systems is becoming higher. Power system equipment and corresponding testing equipment place increasingly higher demands on the reliability of the main control system. High-reliability main control CPUs are designed to strictly adhere to power-on and power-off sequences to ensure normal operation every time. While the CPU can perform power-on and power-off control under normal circumstances, sudden power outages can prevent it from following the normal power-off sequence. In such cases, it is crucial that the power supply to the peripheral signal pins does not subject the CPU pins to prolonged impact to prevent damage. Current technology typically uses a fixed resistor bleeder circuit to prevent input stage voltage damage. Specifically, a fixed-value power resistor is connected in parallel across the input filter capacitor. During normal system operation, this resistor continuously consumes power, resulting in energy waste. Furthermore, this fixed resistor is generally a large resistor, which has a long bleedering time.

[0003] A new input stage voltage bleeder circuit is needed to solve the above-mentioned technical problems. Summary of the Invention

[0004] The purpose of this invention is to provide an input stage voltage feedforward bleeder circuit to solve the technical problem in the prior art where, when the CPU is powered off, the power supply of peripheral signal pins impacts the CPU pins for a long time, causing system damage and affecting system reliability.

[0005] The technical solution of this utility model to solve its technical problem is as follows: A bleeder circuit based on input stage voltage feedforward includes a voltage regulator circuit, a voltage divider control circuit, a delay circuit, and a bleeder circuit connected in sequence. The bleeder circuit is electrically connected to the positive terminal of the power supply to be bleeded. The voltage regulator circuit includes a voltage regulator chip, a first MOSFET, a first resistor, a second resistor, and a third resistor. The cathode pin of the voltage regulator chip is electrically connected to the gate pin of the first MOSFET and one end of the first resistor. The other end of the first resistor is electrically connected to the positive terminal of the input stage power supply and the drain pin of the first MOSFET. The negative terminal of the input stage power supply is grounded. The anode pin of the voltage regulator chip is electrically connected to one end of the third resistor and then grounded. The reference pin of the voltage regulator chip is electrically connected to the other end of the third resistor and one end of the second resistor. The other end of the second resistor is electrically connected to the source pin of the first MOSFET. The voltage divider control circuit includes a diode, a second MOSFET, a fourth resistor, and a fifth resistor. The anode pin of the diode is electrically connected to the positive terminal of the input stage power supply. The cathode pin of the diode is electrically connected to one end of the fourth resistor. The circuit includes a fourth resistor, a fifth resistor, and a seventh resistor. One end of the fourth resistor is electrically connected to one end of the fifth resistor and the gate pin of the second MOSFET. The other end of the fifth resistor is grounded. The source pin of the second MOSFET is electrically connected to the source pin of the first MOSFET and the other end of the second resistor. The delay circuit includes a first capacitor, a sixth resistor, and a seventh resistor. One end of the first capacitor is electrically connected to the drain pin of the second MOSFET and one end of the sixth resistor. The other end of the first capacitor is connected to one end of the seventh resistor and then grounded. The other end of the sixth resistor is electrically connected to the other end of the seventh resistor. The discharge circuit includes a third MOSFET, an eighth resistor, a second capacitor, and a ninth resistor. The gate pin of the third MOSFET is electrically connected to the other end of the sixth resistor and the other end of the seventh resistor. The source pin of the third MOSFET is grounded. The drain pin of the third MOSFET is electrically connected to one end of the eighth resistor. The other end of the eighth resistor is connected to one end of the second capacitor and one end of the ninth resistor to receive the positive terminal of the discharge power supply. The other end of the second capacitor and the other end of the ninth resistor are grounded.

[0006] Preferably, the first MOS transistor is an NMOS transistor, the second MOS transistor is a PMOS transistor, and the third MOS transistor is an NMOS transistor.

[0007] Preferably, the voltage regulator chip is a reference voltage chip, model TL431.

[0008] Preferably, the diode is a 1N4007.

[0009] The beneficial effects of this invention are as follows: An input-stage voltage feedforward bleeder circuit is set up. By sequentially connecting a voltage regulator circuit, a voltage divider control circuit, a delay circuit, and a bleeder circuit, the bleeder circuit is electrically connected to the positive terminal of the power supply to be bleed. Through the mutual cooperation between the voltage regulator circuit, the voltage divider control circuit, the delay circuit, and the bleeder circuit, the bleeder circuit can promptly detect changes in the upstream input power supply and quickly bleed the power supply energy, thereby protecting the system from damage. Furthermore, this bleeder circuit consumes low power during system operation, ensuring system reliability and improving the system's safety factor. In addition, by adjusting the detection threshold through the voltage regulator chip and the voltage divider control circuit, precise discharge control is achieved, adapting to different application requirements. In short, this bleeder circuit has a simple structure, fast response speed, stable operation, and high reliability; it is simple to implement, low in cost, and has strong scalability. Attached Figure Description

[0010] Figure 1 This is a circuit diagram of the bleeder circuit based on input stage voltage feedforward of this utility model. Detailed Implementation

[0011] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention.

[0012] like Figure 1 As shown, this utility model discloses a bleeder circuit based on input stage voltage feedforward, including a voltage regulator circuit, a voltage divider control circuit, a delay circuit, and a bleeder circuit connected in sequence. The bleeder circuit is electrically connected to the positive terminal of the power supply to be bleeded. The voltage regulator circuit includes a voltage regulator chip U1, a first MOSFET Q1, a first resistor R1, a second resistor R2, and a third resistor R3. The cathode pin of the voltage regulator chip U1 is electrically connected to the gate pin of the first MOSFET Q1 and one end of the first resistor R1. The other end of the first resistor R1 is electrically connected to the positive terminal of the input stage power supply V1 and the drain pin of the first MOSFET Q1. The negative terminal of the input stage power supply V1 is grounded. The anode pin of the voltage regulator chip U1 is electrically connected to one end of the third resistor R3 and then grounded. The reference pin of the voltage regulator chip U1 is electrically connected to the other end of the third resistor R3 and one end of the second resistor R2. The other end of the second resistor R2 is electrically connected to the source pin of the first MOSFET Q1. Among them, the voltage regulator chip U1 is a reference voltage chip, model TL431, and the first MOSFET Q1 is an NMOS transistor, model SI2302DS. In actual application, the voltage regulator chip U1 can work normally within the commonly used 12V power input range.

[0013] The voltage divider control circuit includes a diode D1, a second MOSFET Q2, a fourth resistor R4, and a fifth resistor R5. The anode pin of diode D1 is electrically connected to the positive terminal of the input power supply V1; the cathode pin of diode D1 is electrically connected to one end of the fourth resistor R4; the other end of the fourth resistor R4 is electrically connected to one end of the fifth resistor R5 and the gate pin of the second MOSFET Q2, the other end of the fifth resistor R5 is grounded, and the source pin of the second MOSFET Q2 is electrically connected to the source pin of the first MOSFET Q1 and the other end of the second resistor R2. Diode D1 is a 1N4007, and the second MOSFET Q2 is a PMOS transistor, specifically a 2SJ517, or other PMOS transistors can be selected according to actual needs. In practical applications, the ratio of the fourth resistor R4 to the fifth resistor R5 can be adjusted to set the threshold voltage of the discharge circuit. The normal load voltage will not fall below this threshold voltage; it will only fall below this threshold voltage when a fault is detected. When the voltage falls below this threshold voltage, the second MOSFET Q2 turns on and outputs voltage.

[0014] The delay circuit includes a first capacitor C1, a sixth resistor R6, and a seventh resistor R7. One end of the first capacitor C1 is electrically connected to the drain pin of the second MOSFET Q2 and one end of the sixth resistor R6. The other end of the first capacitor C1 is connected to one end of the seventh resistor R7 and grounded. The other end of the sixth resistor R6 is electrically connected to the other end of the seventh resistor R7. When the second MOSFET Q2 turns on and outputs a voltage, this output voltage charges the first capacitor C1. When the input voltage of the voltage regulator chip U1 is lower than the set voltage value, the first capacitor C1 releases the stored energy, achieving the effect of delaying the turn-off of the third MOSFET Q3, thereby quickly dissipating excess energy. Specific parameters can be calculated through simulation or adjusted through actual debugging, and will not be elaborated here.

[0015] The discharge circuit includes a third MOSFET Q3, an eighth resistor R8, a second capacitor C2, and a ninth resistor R9. The gate pin of the third MOSFET Q3 is electrically connected to the other end of the sixth resistor R6 and the other end of the seventh resistor R7. The source pin of the third MOSFET Q3 is grounded, and the drain pin of the third MOSFET Q3 is electrically connected to one end of the eighth resistor R8. The other end of the eighth resistor R8, one end of the second capacitor C2, and one end of the ninth resistor R9 receive the positive terminal of the discharge power supply. The other ends of the second capacitor C2 and the ninth resistor R9 are grounded. The third MOSFET Q3 is an NMOS transistor, model SI2302DS. The eighth resistor R8 can be a thick-film resistor in parallel or a discharge resistor with a large impedance; the choice is made according to the actual situation and is not limited here.

[0016] The working principle of this input-stage voltage feedforward-based bleeder circuit is as follows: The input-stage power supply V1 in the voltage regulator circuit provides a stable voltage output. Resistors R4 and R5 in the voltage divider control circuit divide the output voltage of the voltage regulator circuit. A threshold voltage is set for the bleeder circuit. When the voltage is below this threshold voltage, the second MOSFET Q2 turns on and outputs a voltage to charge the first capacitor C1. When the voltage of the input-stage power supply V1 is lower than the threshold voltage, the first capacitor C1 releases its stored energy, achieving the effect of delaying the turn-off of the third MOSFET Q3, thus ensuring that the bleeder circuit can maintain its bleedering state and dissipate excess energy. The values ​​of specific components can be adaptively adjusted according to the actual working process to meet different bleedering requirements.

[0017] In practical applications, this input-stage voltage feedforward-based bleeder circuit, by sequentially connecting a voltage regulator circuit, a voltage divider control circuit, a delay circuit, and a bleeder circuit, electrically connects the bleeder circuit to the positive terminal of the power supply to be bleed. Through the cooperation of these components, the bleeder circuit can promptly detect changes in the upstream input power supply and quickly dissipate energy, thus protecting the system from damage. Furthermore, this bleeder circuit consumes low power during system operation, ensuring system reliability and improving the system's safety factor. Additionally, by adjusting the detection threshold through the voltage regulator chip U1 and the voltage divider control circuit, precise discharge control is achieved, adapting to different application requirements. In short, this bleeder circuit features a simple structure, fast response speed, stable operation, high reliability, simple implementation, low cost, and strong scalability.

[0018] Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this utility model.

Claims

1. A bleeder circuit based on input stage voltage feedforward, characterized in that, The circuit includes a voltage regulator circuit, a voltage divider control circuit, a delay circuit, and a discharge circuit connected in sequence. The discharge circuit is electrically connected to the positive terminal of the power supply to be discharged. The voltage regulator circuit includes a voltage regulator chip, a first MOSFET, a first resistor, a second resistor, and a third resistor. The cathode pin of the voltage regulator chip is electrically connected to the gate pin of the first MOSFET and one end of the first resistor. The other end of the first resistor is electrically connected to the positive terminal of the input stage power supply and the drain pin of the first MOSFET. The negative terminal of the input stage power supply is grounded. The anode pin of the voltage regulator chip is electrically connected to one end of the third resistor and then grounded. The reference pin of the voltage regulator chip is electrically connected to the other end of the third resistor and one end of the second resistor. The other end of the second resistor is electrically connected to the source pin of the first MOSFET. The voltage divider control circuit includes a diode, a second MOSFET, a fourth resistor, and a fifth resistor. The anode pin of the diode is electrically connected to the positive terminal of the input stage power supply. The cathode pin of the diode is electrically connected to one end of the fourth resistor. The other end is electrically connected to one end of the fifth resistor and the gate pin of the second MOSFET. The other end of the fifth resistor is grounded. The source pin of the second MOSFET is electrically connected to the source pin of the first MOSFET and the other end of the second resistor. The delay circuit includes a first capacitor, a sixth resistor, and a seventh resistor. One end of the first capacitor is electrically connected to the drain pin of the second MOSFET and one end of the sixth resistor. The other end of the first capacitor is connected to one end of the seventh resistor and then grounded. The other end of the sixth resistor is electrically connected to the other end of the seventh resistor. The discharge circuit includes a third MOSFET, an eighth resistor, a second capacitor, and a ninth resistor. The gate pin of the third MOSFET is electrically connected to the other end of the sixth resistor and the other end of the seventh resistor. The source pin of the third MOSFET is grounded. The drain pin of the third MOSFET is electrically connected to one end of the eighth resistor. The other end of the eighth resistor is connected to one end of the second capacitor and one end of the ninth resistor to receive the positive terminal of the discharge power supply. The other end of the second capacitor and the other end of the ninth resistor are grounded.

2. The bleeder circuit based on input stage voltage feedforward according to claim 1, characterized in that: The first MOSFET is an NMOS transistor, the second MOSFET is a PMOS transistor, and the third MOSFET is an NMOS transistor.

3. The bleeder circuit based on input stage voltage feedforward according to claim 1, characterized in that: The voltage regulator chip is specifically a reference voltage chip, model TL431.

4. The bleeder circuit based on input stage voltage feedforward according to claim 1, characterized in that: The diode is model 1N4007.