Power supply charger and control chip thereof

CN224774660UActive Publication Date: 2026-09-18ZHUHAI NANXIN SEMICON TECH CO LTD
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Patent Information

Application Number
CN202521452656.7
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-07-10
Publication Date
2026-09-18
Estimated Expiration
2035-07-10

AI Technical Summary

Technical Problem

[0003]然而,采用分立高压管以及串联电流采样电阻,影响电源充电器的集成度和效率

Benefits of technology

[0019] First, the control chip provided in this disclosure samples the output current through a sampling tube, eliminating the need for a series resistor between the isolation tube and the charging device, which reduces power loss and thus improves the efficiency of the power charger.

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Abstract

The embodiment of the present disclosure provides a power charger and a control chip thereof, which comprise an isolation tube, a sampling tube, a controller bare die chip and a power voltage output pin, an output end of an ACDC converter is connected with input ends of the isolation tube and the sampling tube, control ends of the isolation tube and the sampling tube are connected with driving output pins of the controller bare die chip, an output end of the sampling tube is connected with a sampling input pin of the controller bare die chip, an output end of the isolation tube is connected with an isolation input pin and the power voltage output pin of the controller bare die chip, a voltage of the sampling input pin is equal to a voltage of the isolation input pin, the sampling tube can mirror an output current of the ACDC converter as a sampling current, a ratio of the sampling current to the output current is a ratio of a width-length ratio of the sampling tube to the isolation tube, and sampling of the output current is realized. The control chip can improve the integration and efficiency of the power charger, can also reduce the cost of peripheral devices of the control chip, and can simplify the packaging of the control chip.
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Description

Technical Field

[0001] Embodiments of this disclosure relate to the field of integrated circuit technology, and more particularly to power chargers and their control chips. Background Technology

[0002] Due to the significant increase in charging power of power chargers, and considering the safety of downstream charging devices, a high-voltage isolation diode is usually added before the power charger's output contacts the charging device. This high-voltage isolation diode is generally integrated inside the power charger and implemented using a discrete high-voltage diode approach. Furthermore, the current sampling of the high-voltage isolation diode is typically achieved using a series current sampling resistor.

[0003] However, the use of discrete high-voltage transistors and series current sampling resistors affects the integration and efficiency of the power charger. Utility Model Content

[0004] This disclosure provides a power charger and its control chip, which can improve the integration and efficiency of the power charger, reduce the cost of peripheral devices for the control chip, and simplify the packaging of the control chip.

[0005] In a first aspect, this disclosure provides a control chip for a power charger, the power charger including an AC-DC converter, the control chip including an isolation transistor, a sampling transistor, a controller die chip and a power voltage output pin, the controller die chip including a drive output pin, a sampling input pin and an isolation input pin.

[0006] The output terminal of the ACDC converter is connected to the input terminal of the isolation tube and the input terminal of the sampling tube. The control terminal of the isolation tube and the control terminal of the sampling tube are connected to the drive output pin. The output terminal of the sampling tube is connected to the sampling input pin. The output terminal of the isolation tube is connected to the isolation input pin, the power supply voltage output pin, and the charging device.

[0007] The voltage of the sampling input pin is equal to the voltage of the isolation input pin, and the ratio of the sampling current flowing through the sampling tube to the output current flowing through the isolation tube is the ratio of the width-to-length ratio of the sampling tube to the width-to-length ratio of the isolation tube.

[0008] In some embodiments of this disclosure, the control chip further includes a power device die chip, and the isolation tube and the sampling tube are integrated within the power device die chip.

[0009] In some embodiments of this disclosure, the power device bare die includes a drive input pin, a sampling output pin, and an isolation output pin. One end of the drive input pin is connected to the control terminal of the isolation transistor and the control terminal of the sampling transistor, and the other end of the drive input pin is connected to the drive output pin. One end of the sampling output pin is connected to the output terminal of the sampling transistor, and the other end of the sampling output pin is connected to the sampling input pin. One end of the isolation output pin is connected to the output terminal of the isolation transistor, and the other end of the isolation output pin is connected to the isolation input pin and the power supply voltage output pin.

[0010] In some embodiments of this disclosure, the isolation tube is packaged as a first packaged device, and the sampling tube is packaged as a second packaged device.

[0011] In some embodiments of this disclosure, the first packaged device includes a first control pin, a first input pin, and a first output pin. One end of the first control pin is connected to the gate of the isolation transistor, and the other end of the first control pin is connected to the drive output pin. One end of the first input pin is connected to the drain of the isolation transistor, and the other end of the first input pin is connected to the output terminal of the ACDC converter. One end of the first output pin is connected to the source of the isolation transistor, and the other end of the first output pin is connected to the isolation input pin and the power supply voltage output pin.

[0012] In some embodiments of this disclosure, the second packaged device includes a second control pin, a second input pin, and a second output pin. One end of the second control pin is connected to the gate of the sampling transistor, and the other end of the second control pin is connected to the drive output pin. One end of the second input pin is connected to the drain of the sampling transistor, and the other end of the second input pin is connected to the output terminal of the ACDC converter. One end of the second output pin is connected to the source of the sampling transistor, and the other end of the second output pin is connected to the sampling input pin.

[0013] In some embodiments of this disclosure, the controller die chip integrates a power supply module. The controller die chip also includes a power supply pin, which is connected to the output terminal of the ACDC converter to receive the power supply voltage output by the ACDC converter. The power supply pin is also connected to the input terminal of the power supply module to supply power to the controller die chip.

[0014] In some embodiments of this disclosure, the controller die chip also integrates a current sampling module and a driving module. The first end of the current sampling module is connected to the isolation input pin, and the second end of the current sampling module is connected to the sampling input pin to clamp the voltage of the sampling input pin to the voltage of the isolation input pin. The output end of the driving module is connected to the driving output pin to control the conduction of the isolation tube and the sampling tube during charging.

[0015] In some embodiments of this disclosure, the current sampling module includes an operational amplifier, a resistor, and a control transistor. The non-inverting input of the operational amplifier is connected to the isolation input pin to receive the voltage at the second terminal of the isolation transistor. The inverting input of the operational amplifier is connected to the sampling input pin, the first terminal of the control transistor, and the first terminal of the resistor. The second terminal of the resistor is grounded. The second terminal of the control transistor is connected to the power supply voltage output terminal of the power supply module to receive the power supply voltage. The control terminal of the control transistor is connected to the output terminal of the operational amplifier.

[0016] Secondly, this disclosure provides a power charger, including any of the control chips provided in the first aspect.

[0017] This disclosure provides a control chip for a power charger, including an isolation transistor, a sampling transistor, a controller die chip, and a power voltage output pin. The output terminal of the AC-DC converter is connected to the input terminal of the isolation transistor and the input terminal of the sampling transistor. The control terminals of the isolation transistor and the sampling transistor are connected to the drive output pin of the controller die chip. The output terminal of the sampling transistor is connected to the sampling input pin of the controller die chip. The output terminal of the isolation transistor is connected to the isolation input pin of the controller die chip, the power voltage output pin, and the charging device. Since the voltage of the sampling input pin is equal to the voltage of the isolation input pin, the voltages of the control terminals, input terminals, and output terminals of the sampling transistor and the isolation transistor are all equal. Therefore, the sampling transistor can mirror the current flowing through the isolation transistor, i.e., the output current of the AC-DC converter, and output it as a sampling current. The ratio of the sampling current to the output current is the ratio of the width-to-length ratio of the sampling transistor to the width-to-length ratio of the isolation transistor, thereby achieving sampling of the output current.

[0018] The control chip provided in this disclosure has the following specific beneficial effects:

[0019] First, the control chip provided in this disclosure samples the output current through a sampling tube, eliminating the need for a series resistor between the isolation tube and the charging device, which reduces power loss and thus improves the efficiency of the power charger.

[0020] Secondly, integrating the isolation tube, sampling tube, and controller bare die chip into the control chip can improve the integration level of the control chip, thereby improving the integration level of the power charger.

[0021] Third, there is no need to set up isolation tubes and sampling tubes around the control chip, which can reduce the cost of peripheral devices of the control chip. At the same time, there is no need to set up package pins on the control chip to connect with peripheral devices, which can reduce the number of package pins of the control chip, thereby simplifying the packaging of the control chip. Attached Figure Description

[0022] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. It should be understood that the accompanying drawings described below only relate to some embodiments of this disclosure and are not intended to limit this disclosure, wherein:

[0023] Figure 1 A schematic diagram of the structure of a power charger provided by the prior art.

[0024] Figure 2 This is a schematic diagram of the structure of a power charger provided in an embodiment of this disclosure.

[0025] Figure 3 This is a schematic diagram of another power charger provided in an embodiment of the present disclosure.

[0026] Figure 4 This is a circuit diagram of a current sampling module provided in an embodiment of the present disclosure. Detailed Implementation

[0027] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are also within the scope of protection of this disclosure.

[0028] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this subject matter pertains. It will be further understood that terms such as those defined in commonly used dictionaries shall be interpreted as having the meaning consistent with their meaning in the context of the specification and in the relevant art, and shall not be interpreted in an idealized or overly formal form unless otherwise explicitly defined herein. As used herein, the statement “connecting” two or more parts together shall mean that the parts are joined directly together or joined through one or more intermediate components.

[0029] In this disclosure, the reference to "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of the phrase "embodiment" in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described in this disclosure can be combined with other embodiments.

[0030] Furthermore, the terms "first," "second," etc., in the specification, claims, or the accompanying drawings are used to distinguish different objects rather than to describe a specific order, and may explicitly or implicitly include one or more of the features.

[0031] In this disclosure, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three possibilities: A exists, A and B exist simultaneously, and B exists. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.

[0032] In the description of this disclosure, unless otherwise stated, "multiple" and "at least two" mean two or more (including two), and similarly, "multiple groups" and "at least two groups" mean two or more (including two groups).

[0033] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings.

[0034] Figure 1 A schematic diagram of the structure of a power charger provided in the prior art, such as... Figure 1 As shown, the power charger 10 includes an AC-DC converter 11, an output high-voltage isolation tube M1, a current sampling resistor Rs, and a control chip 12.

[0035] The output of the ACDC converter 11 is connected to the first end of the current sampling resistor Rs and the first sampling pin of the control chip 12 through the output high voltage isolation tube M1. The second end of the current sampling resistor Rs is connected to the second sampling pin of the control chip 12 and the charging device 20. The drive output pin of the control chip 12 is connected to the control end of the output high voltage isolation tube M1.

[0036] When the power charger 10 meets the charging conditions, the drive output pin of the control chip 12 outputs a conduction control signal, and the high-voltage isolation tube M1 is turned on to provide the power supply voltage output by the ACDC converter 11 to the charging device 20, so that the charging device 20 can start charging.

[0037] When the power charger 10 fails to meet the charging conditions, such as when problems such as overvoltage, overcurrent, and overtemperature occur, the drive output pin of the control chip 12 outputs a shutdown control signal, and the high-voltage isolation tube M1 is turned off to prevent the power supply voltage output by the ACDC converter 11 from being supplied to the charging device 20. Then the charging device 20 stops charging, thereby protecting the charging device 20.

[0038] The control chip 12 can acquire the voltage at the first terminal of the current sampling resistor Rs through the first sampling pin, and the voltage at the second terminal of the current sampling resistor Rs through the second sampling pin. The control chip 12 can also calculate the voltage difference across the current sampling resistor Rs, and determine the current flowing through the current sampling resistor Rs based on the voltage difference and the resistance value of the current sampling resistor Rs. The current flowing through the current sampling resistor Rs is the current flowing through the output high-voltage isolation transistor M1, which can also be understood as the output current of the ACDC converter 11.

[0039] However, the current sampling resistor Rs, connected in series between the output high-voltage isolation transistor M1 and the charging device 20, will cause a certain power loss to the output of the ACDC converter 11, thus affecting the efficiency of the power charger. In addition, the output high-voltage isolation transistor M1 is a discrete high-voltage transistor connected to the outside of the control chip 12, which will increase the cost of the peripheral devices of the control chip 12 and the number of pins in the control chip 12 package, and will also affect the integration of the control chip 12.

[0040] In view of this, the present disclosure provides a control chip for a power charger, including an isolation transistor, a sampling transistor, a controller die chip, and a power supply voltage output pin. The output terminal of the AC-DC converter is connected to the input terminal of the isolation transistor and the input terminal of the sampling transistor. The control terminals of the isolation transistor and the sampling transistor are connected to the drive output pin of the controller die chip. The output terminal of the sampling transistor is connected to the sampling input pin of the controller die chip. The output terminal of the isolation transistor is connected to the isolation input pin of the controller die chip, the power supply voltage output pin, and the charging device. Since the voltage of the sampling input pin is equal to the voltage of the isolation input pin, the voltages of the control terminals, input terminals, and output terminals of the sampling transistor and the isolation transistor are all equal. Therefore, the sampling transistor can mirror the current flowing through the isolation transistor, i.e., the output current of the AC-DC converter, and output it as a sampling current. The ratio of the sampling current to the output current is the ratio of the width-to-length ratio of the sampling transistor to the width-to-length ratio of the isolation transistor, thereby achieving sampling of the output current.

[0041] Firstly, the control chip provided in this disclosure samples the output current through a sampling tube, eliminating the need for a series resistor between the isolation tube and the charging device, thereby reducing power loss and improving the efficiency of the power charger.

[0042] Secondly, the control chip provided in this disclosure integrates an isolation transistor, a sampling transistor, and a bare die chip for the controller, which can improve the integration of the control chip and thus improve the integration of the power charger.

[0043] Thirdly, the control chip provided in this disclosure does not require isolation tubes and sampling tubes on its periphery, which can reduce the cost of peripheral devices of the control chip. At the same time, it does not require package pins on the control chip to connect with peripheral devices, which can reduce the number of package pins of the control chip, thereby simplifying the packaging of the control chip.

[0044] The control chip provided in this disclosure will be described in detail below with reference to several specific embodiments.

[0045] Figure 2 This is a schematic diagram of the structure of a power charger provided in an embodiment of the present disclosure, as shown below. Figure 2 As shown, the power charger 200 includes an AC-DC converter 210 and a control chip 220.

[0046] The control chip 220 includes an isolation transistor M2, a sampling transistor Ms, a controller die chip 221, and a power supply voltage output pin PIN1. The controller die chip 221 includes a drive output pin PIN2, a sampling input pin PIN3, and an isolation input pin PIN4.

[0047] The output of the ACDC converter 210 is connected to the input of the isolation transistor M2 and the input of the sampling transistor Ms. The control terminals of the isolation transistor M2 and the sampling transistor Ms are connected to the drive output pin PIN2. The output of the sampling transistor Ms is connected to the sampling input pin PIN3. The output of the isolation transistor M2 is connected to the isolation input pin PIN4, the power supply voltage output pin PIN1, and the charging device.

[0048] The voltage of the sampling input pin PIN3 is equal to the voltage of the isolation input pin PIN4. The sampling current Isns flowing through the sampling tube Ms flows into the sampling input pin PIN3. The output current Iout of the ACDC converter 210 flows into the charging device 20 through the isolation tube M2. The ratio of the sampling current Isns to the output current Iout is the ratio of the width-to-length ratio of the sampling tube Ms to the width-to-length ratio of the isolation tube M2.

[0049] For example, the isolation transistor M2 and the sampling transistor Ms can be N-Metal-Oxide-Semiconductor Field Effect Transistors (NMOS). The drain of the isolation transistor M2 and the drain of the sampling transistor Ms are connected to the output terminal of the ACDC converter 210. The source of the isolation transistor M2 is connected to the isolation input pin PIN4, the power supply voltage output pin PIN1, and the charging device. The source of the sampling transistor Ms is connected to the sampling input pin PIN3. The gate of the isolation transistor M2 and the gate of the sampling transistor Ms are connected to the drive output pin PIN2.

[0050] The input terminal of the ACDC converter 210 is connected to the municipal AC power supply. For example, the municipal AC power supply is 220V AC power. The ACDC converter 210 can rectify the AC power to obtain the power supply voltage Vcc, and provide the power supply voltage Vcc to the drain of the isolation tube M2 and the drain of the sampling tube Ms. Then the drain voltage of the isolation tube M2 and the drain voltage of the sampling tube Ms are both equal to the power supply voltage Vcc.

[0051] For example, Figure 3 A schematic diagram of another power charger provided in this disclosure embodiment is shown below. Figure 3 As shown, the controller die chip 221 integrates a current sampling module 222 and a drive module 223. The first end of the current sampling module 222 is connected to the isolation input pin PIN4, and the second end of the current sampling module 222 is connected to the sampling input pin PIN3, so as to clamp the voltage of the sampling input pin PIN3 to the voltage of the isolation input pin PIN4.

[0052] For example, Figure 4 This is a circuit diagram of a current sampling module provided in an embodiment of the present disclosure, such as... Figure 4 As shown, the current sampling module 222 includes an operational amplifier OTA, a resistor R, and a control transistor M3. The non-inverting input of the operational amplifier OTA is connected to the isolation input pin PIN4 to receive the voltage at the second terminal of the isolation transistor M2. The inverting input of the operational amplifier OTA is connected to the sampling input pin PIN3, the first terminal of the control transistor M3, and the first terminal of the resistor R. The second terminal of the resistor R is grounded. The second terminal of the control transistor M3 is connected to the supply voltage VDD, and the control terminal of the control transistor M3 is connected to the output terminal of the operational amplifier OTA.

[0053] An operational amplifier with over-the-air (OTA) mode can clamp the non-inverting input voltage to be equal to the inverting input voltage. The non-inverting input voltage is the voltage at the isolation input pin PIN4, which is the source voltage of the isolation transistor M2. The inverting input voltage is the voltage at the sampling input pin PIN3, which is the source voltage of the sampling transistor Ms. Therefore, the voltage at the sampling input pin PIN3 is clamped to be equal to the voltage at the isolation input pin PIN4. In other words, the source voltage of the isolation transistor M2 is equal to the source voltage of the sampling transistor Ms.

[0054] The output terminal of the drive module 223 is connected to the drive output pin PIN2. During the charging process, the drive module 223 provides the turn-on control signal to the gate of the isolation tube M2 and the gate of the sampling tube Ms through the drive output pin PIN2. Then the gate voltage of the isolation tube M2 is equal to the gate voltage of the sampling tube Ms, so as to control the isolation tube M2 and the sampling tube Ms to turn on.

[0055] Thus, the isolation transistor M2 and the sampling transistor Ms are connected in parallel. The gate voltage of the isolation transistor M2 is equal to the gate voltage of the sampling transistor Ms, the source voltage of the isolation transistor M2 is equal to the source voltage of the sampling transistor Ms, and the drain voltage of the isolation transistor M2 is equal to the drain voltage of the sampling transistor Ms. Since the gate-source voltage of the isolation transistor M2 is equal to the gate-source voltage of the sampling transistor Ms, the sampling transistor Ms can mirror the current flowing through the isolation transistor M2, i.e., the output current Iout, as the sampling current Isns, where Isns = Iout * N, thus achieving sampling of the output current Iout. Here, N is the width-to-length ratio of the sampling transistor Ms to the width-to-length ratio of the isolation transistor M2. Therefore, no series resistor is needed, which reduces power loss and improves the efficiency of the power charger 200.

[0056] Furthermore, the isolation tube M2, the sampling tube Ms, and the controller bare die chip 221 are integrated into the control chip 220, which can improve the integration of the control chip 220. There is no need to set up peripheral devices for the control chip 220, which can reduce the cost of peripheral devices for the control chip 220. Correspondingly, there is no need to set up package pins for connection with peripheral devices, reducing the number of package pins of the control chip 220, thereby simplifying the packaging of the control chip 220.

[0057] In some embodiments, such as Figure 3 As shown, the control chip 220 also includes a power device die chip 222, and the isolation transistor M2 and the sampling transistor Ms are integrated within the power device die chip 222.

[0058] For example, see [link to example]. Figure 2The power device bare die chip comprises 222 components, including a drive input pin PIN5, a sampling output pin PIN6, and an isolation output pin PIN7. One end of the drive input pin PIN5 is connected to the control terminal of the isolation transistor M2 and the control terminal of the sampling transistor Ms; the other end of the drive input pin PIN5 is connected to the drive output pin PIN2. One end of the sampling output pin PIN6 is connected to the output terminal of the sampling transistor Ms; the other end of the sampling output pin PIN6 is connected to the input pin PIN3. One end of the isolation output pin PIN7 is connected to the output terminal of the isolation transistor M2; the other end of the isolation output pin PIN7 is connected to the isolation input pin PIN4 and the power supply voltage output pin PIN1.

[0059] For example, drive input pin PIN5 is connected to drive output pin PIN2 via a bonding wire, sampling output pin PIN6 is connected to sampling input pin PIN3 via a bonding wire, isolation output pin PIN7 is connected to isolation input pin PIN4 via a bonding wire, and isolation output pin PIN7 and isolation input pin PIN4 are connected to power supply voltage output pin PIN1 via a lead frame.

[0060] The drive input pin PIN5 is connected to the gate of the isolation transistor M2 and the gate of the sampling transistor Ms through a patterned metal structure. The sampling output pin PIN6 is connected to the source of the sampling transistor Ms through a patterned metal structure. The isolation output pin PIN7 is also connected to the source of the isolation transistor M2 through a patterned metal structure.

[0061] In this embodiment, the power device die 222 integrates a high-voltage isolation transistor M2 and a sampling transistor Ms, while the controller die 221 integrates only low-voltage devices related to control. The power device die 222 and the controller die 221 are encapsulated together in the control chip 220. Thus, the controller die 221 uses only low-voltage technology, and the power device die 222 uses only high-voltage technology, which can reduce the cost of the controller die 221.

[0062] In some embodiments, as shown in Figure 2, the isolation tube M2 is packaged as a first packaged device, and the sampling tube Ms is packaged as a second packaged device.

[0063] For example, the first packaged device includes a first control pin, a first input pin, and a first output pin. One end of the first control pin is connected to the gate of the isolation transistor M2, and the other end of the first control pin is connected to the drive output pin PIN2. One end of the first input pin is connected to the drain of the isolation transistor M2, and the other end of the first input pin is connected to the output terminal of the ACDC converter 210. One end of the first output pin is connected to the source of the isolation transistor M2, and the other end of the first output pin is connected to the isolation input pin PIN4 and the power supply voltage output pin PIN1.

[0064] For example, the first control pin is connected to the gate of the isolation transistor M2 through a patterned metal structure, the first input pin is connected to the drain of the isolation transistor M2 through a patterned metal structure, and the first output pin is connected to the source of the isolation transistor M2 through a patterned metal structure.

[0065] The first control pin is connected to the drive output pin PIN2 via a metal trace on the printed circuit board. The first input pin is connected to the output terminal of the ACDC converter 210 via a metal trace on the printed circuit board. The first output pin is connected to the isolation input pin PIN4 via a metal trace on the printed circuit board. The first output pin is connected to the power supply voltage output pin PIN1 via a lead frame.

[0066] The second packaged device includes a second control pin, a second input pin, and a second output pin. One end of the second control pin is connected to the gate of the sampling transistor Ms, and the other end of the second control pin is connected to the drive output pin PIN2. One end of the second input pin is connected to the drain of the sampling transistor Ms, and the other end of the second input pin is connected to the output of the ACDC converter 210. One end of the second output pin is connected to the source of the sampling transistor Ms, and the other end of the second output pin is connected to the sampling input pin PIN3.

[0067] For example, the second control pin is connected to the gate of the sampling transistor Ms through a patterned metal structure, the second input pin is connected to the drain of the sampling transistor M through a patterned metal structure, and the second output pin is connected to the source of the sampling transistor Ms through a patterned metal structure.

[0068] The second control pin is connected to the drive output pin PIN2 via a metal trace on the printed circuit board. The second input pin is connected to the output terminal of the ACDC converter 210 via a metal trace on the printed circuit board. The second output pin is connected to the sampling input pin PIN3 via a metal trace on the printed circuit board.

[0069] In this embodiment, the high-voltage isolation tube M2 and the sampling tube Ms are integrated into the control chip 220 as independent packaged devices with the controller die chip 221. Therefore, the controller die chip 221 only uses a low-voltage process, which can reduce the cost of the controller die chip 221 and thus reduce the cost of the control chip 220.

[0070] In some embodiments, such as Figure 3 As shown, the controller die 221 also integrates a power supply module 224, and the controller die 221 also includes a power supply pin PIN8. The power supply pin PIN8 is connected to the output of the ACDC converter 210 to receive the power supply voltage Vcc output by the ACDC converter 210. The power supply pin PIN8 is also connected to the input of the power supply module 224 so that the power supply module 224 supplies power to the controller die 221.

[0071] For example, such as Figure 3 As shown, the power device bare die chip 222 also includes a power supply pin PIN9. One end of the power supply pin PIN9 is connected to the output terminal of the ACDC converter 210, the drain of the isolation tube M2 and the drain of the sampling tube Ms. The power supply voltage Vcc output by the ACDC converter 210 is output through the power supply pin PIN9.

[0072] The other end of the power supply pin PIN9 is connected to the power supply pin PIN8. The input terminal of the power supply module 224 receives the power supply voltage Vcc through the power supply pin PIN8. The power supply module 224 can perform filtering, boost / buck, and voltage regulation on the power supply voltage Vcc to obtain the operating voltage suitable for each active module in the controller die chip 221, so that the controller die chip 221 can work normally. For example, the power supply voltage output terminal of the power supply module 224 is connected to the second terminal of the control transistor M3 to provide the power supply voltage VDD to the control transistor M3.

[0073] Unless otherwise expressly indicated by the context, the singular form of words used herein and in the appended claims includes the plural form, and vice versa. Thus, when referring to the singular, the plural form of the corresponding term is generally included. Similarly, the terms “comprising” and “including” are to be interpreted as including rather than exclusively. Likewise, the terms “including” and “or” should be interpreted as including unless such interpretation is expressly prohibited herein. Where the term “example” is used herein, the “example” is merely exemplary and illustrative, and should not be considered exclusive or extensive.

[0074] Several embodiments of this disclosure have been described in detail above. However, it is obvious that those skilled in the art can make various modifications and variations to the embodiments of this disclosure without departing from the spirit and scope of this disclosure. The scope of protection of this disclosure is defined by the appended claims.

Claims

1. A control chip of a power charger, characterized in that, The power charger includes an AC-DC converter, and the control chip includes an isolation transistor, a sampling transistor, a controller die chip, and a power voltage output pin. The controller die chip includes a drive output pin, a sampling input pin, and an isolation input pin. The output terminal of the ACDC converter is connected to the input terminal of the isolation tube and the input terminal of the sampling tube. The control terminal of the isolation tube and the control terminal of the sampling tube are connected to the drive output pin. The output terminal of the sampling tube is connected to the sampling input pin. The output terminal of the isolation tube is connected to the isolation input pin, the power supply voltage output pin, and the charging device. The voltage of the sampling input pin is equal to the voltage of the isolation input pin, and the ratio of the sampling current flowing through the sampling tube to the output current flowing through the isolation tube is the ratio of the width-to-length ratio of the sampling tube to the width-to-length ratio of the isolation tube.

2. The control chip according to claim 1, characterized in that, The control chip also includes a power device die chip, and the isolation tube and the sampling tube are integrated within the power device die chip.

3. The control chip according to claim 2, characterized in that, The power device bare die chip includes a drive input pin, a sampling output pin, and an isolation output pin; One end of the drive input pin is connected to the control terminal of the isolation tube and the control terminal of the sampling tube, and the other end of the drive input pin is connected to the drive output pin. One end of the sampling output pin is connected to the output terminal of the sampling tube, and the other end of the sampling output pin is connected to the sampling input pin. One end of the isolation output pin is connected to the output terminal of the isolation tube, and the other end of the isolation output pin is connected to the isolation input pin and the power supply voltage output pin.

4. The control chip of claim 1, wherein, The isolation tube is packaged as a first packaged device, and the sampling tube is packaged as a second packaged device.

5. The control chip of claim 4, wherein, The first packaged device includes a first control pin, a first input pin, and a first output pin; One end of the first control pin is connected to the gate of the isolation transistor, and the other end of the first control pin is connected to the drive output pin. One end of the first input pin is connected to the drain of the isolation transistor, and the other end of the first input pin is connected to the output terminal of the ACDC converter. One end of the first output pin is connected to the source of the isolation transistor, and the other end of the first output pin is connected to the isolation input pin and the power supply voltage output pin.

6. The control chip of claim 4, wherein, The second packaged device includes a second control pin, a second input pin, and a second output pin; One end of the second control pin is connected to the gate of the sampling transistor, and the other end of the second control pin is connected to the drive output pin. One end of the second input pin is connected to the drain of the sampling transistor, and the other end of the second input pin is connected to the output of the ACDC converter. One end of the second output pin is connected to the source of the sampling transistor, and the other end of the second output pin is connected to the sampling input pin.

7. The control chip according to any one of claims 1-6, characterized in that, The controller die chip integrates a power supply module and also includes power pins. The power pin is connected to the output terminal of the ACDC converter to receive the power supply voltage output by the ACDC converter. The power pin is also connected to the input terminal of the power supply module to enable the power supply module to supply power to the controller die chip.

8. The control chip according to claim 7, characterized in that, The controller die chip also integrates a current sampling module and a drive module; The first end of the current sampling module is connected to the isolation input pin, and the second end of the current sampling module is connected to the sampling input pin, so as to clamp the voltage of the sampling input pin to the voltage of the isolation input pin; The output terminal of the drive module is connected to the drive output pin to control the conduction of the isolation tube and the sampling tube during the charging process.

9. The control chip of claim 8, wherein, The current sampling module includes an operational amplifier, resistors, and a control transistor; The non-inverting input terminal of the operational amplifier is connected to the isolation input pin to receive the voltage at the second terminal of the isolation transistor. The inverting input terminal of the operational amplifier is connected to the sampling input pin, the first terminal of the control transistor, and the first terminal of the resistor. The second terminal of the resistor is grounded. The second terminal of the control transistor is connected to the power supply voltage output terminal of the power supply module to receive the power supply voltage. The control terminal of the control transistor is connected to the output terminal of the operational amplifier.

10. A power charger, characterized by, Includes the control chip described in any one of claims 1-9.