An isolated b code interface circuit

Abstract

The utility model relates to B code interface field, concretely relates to an isolated B code interface circuit. Circuit includes isolated power, signal isolator, RS485 bus direction controller, RS485 bus B code transceiver, current -limiting and filter, two -way transient voltage suppression diode array. After external B code signal input passes through two -way transient voltage suppression diode, the signal excessively high transient voltage is suppressed, and the signal passes through current -limiting and filter, realizes to signal current -limiting and noise suppression, and then through RS485 bus B code transceiver will difference signal conversion for TTL signal, and the bus direction is controlled by RS485 bus direction controller, and TTL signal passes through isolator and enters CPU and handles. Signal isolator adopts pi 122U31 model, and RS485 bus B code transceiver adopts SIT65HVD75DR model, and isolated power adopts B0505S 1WR model. The utility model is applicable to B code interface.

Description

Technical Field

[0001] This utility model relates to the field of B-code interfaces, specifically to an isolated B-code interface circuit. Background Technology

[0002] The IRIG-B Interface is a standardized hardware interface for transmitting IRIG-B time codes, enabling high-precision time synchronization (μs to ns level) between devices. As a core component of the IEEE 1344 and IRIG 200-04 standards, it encodes time information through electrical signals and is widely used in fields requiring strict timing control.

[0003] Existing technologies, such as CN210864704U, disclose a B-code decoding circuit for an RS485 interface, including a level conversion circuit for converting differential signals into level signals. The input terminal of the level conversion circuit is connected to the differential signal terminal of the B-code pair, and the output terminal of the level conversion circuit is connected to an optocoupler isolation circuit. The output side of the optocoupler isolation circuit is connected to the CPU. This method has advantages such as simple circuit structure, no need for a dedicated decoding chip, and low cost.

[0004] However, the above solutions have poor anti-interference capabilities and insufficient security. Utility Model Content

[0005] The purpose of this invention is to overcome the shortcomings of the prior art and provide an isolated B-code interface circuit, which improves the circuit's anti-interference capability and security.

[0006] This utility model achieves the above objectives by adopting the following technical solution: This utility model provides an isolated B-code interface circuit, including an isolated power supply U3, a signal isolator U1, an RS485 bus B-code transceiver U2, a first bidirectional transient voltage suppression diode T1, a second bidirectional transient voltage suppression diode T2, a second resistor R2, and a third resistor R3. The first pin of the RS485 bus B-code transceiver U2 is connected to the seventh pin of the signal isolator U1, and the fourth pin is connected to the sixth pin of the signal isolator U1. Pins 6 and 7 of RS485 bus B-code transceiver U2 receive external B-code differential signals through resistors R3 and R2, respectively. Pin 6 of RS485 bus B-code transceiver U2 is also connected to pin 3 of isolation power supply U3 through resistor R3 and second bidirectional transient voltage suppressor diode T2. Pin 7 of RS485 bus B-code transceiver U2 is also connected to pin 3 of isolation power supply U3 through resistor R2 and first bidirectional transient voltage suppressor diode T1. Pins 2 and 3 of signal isolator U1 are connected to the data receive pin and data transmit pin of CPU (Central Processing Unit), respectively.

[0007] Furthermore, the circuit also includes transistor Q1, first resistor R1, fourth resistor R4, fifth resistor R5, sixth resistor R6, fifth capacitor C5, and sixth capacitor C6. Pin 3 of the RS485 bus B-code transceiver U2 is connected to pin 2. Pin 2 is connected to the collector of transistor Q1. The collector of transistor Q1 is connected to pin 4 of the isolation power supply U3 via seventh resistor R7. The emitter of transistor Q1 is connected to pin 3 of the isolation power supply U3. The base of transistor Q1 is connected to pin 6 of the signal isolator U1 via sixth resistor R6. The first resistor R1 is connected to the RS485 bus B-code transceiver U2. Between pins 7 and 6, pins 7 and 6 of the RS485 bus B-code transceiver U2 are connected to pin 3 of the isolation power supply U3 via capacitors C5 and C6 respectively. Pin 7 of the RS485 bus B-code transceiver U2 is also connected to pin 3 of the isolation power supply U3 via resistor R4. Pin 6 of the RS485 bus B-code transceiver U2 is also connected to pin 4 of the isolation power supply U3 via resistor R5. Pin 5 of the RS485 bus B-code transceiver U2 is connected to pin 3 of the isolation power supply U3. Pin 8 of the RS485 bus B-code transceiver U2 is connected to pin 4 of the isolation power supply U3.

[0008] Furthermore, the first pin of the signal isolator U1 is connected to the 3.3V power supply, the fourth pin is grounded, and the fifth and eighth pins are connected to the third and fourth pins of the isolation power supply U3, respectively. The first pin of the isolation power supply U3 is connected to the system ground, the second pin is connected to the 5V power supply, the third pin is connected to the isolation ground, and the fourth pin is connected to the isolation 5V power supply.

[0009] Furthermore, the circuit also includes a first filter capacitor C1, a second filter capacitor C2, and a third filter capacitor C3. The two pins of the first filter capacitor C1 are connected to system ground and isolation ground, respectively. The two pins of the second filter capacitor C2 are connected to the 5V power supply and system ground, respectively. The two pins of the third filter capacitor C3 are connected to the isolated 5V power supply and isolation ground, respectively.

[0010] The beneficial effects of this utility model are: This invention uses an isolated power supply and a signal isolator to isolate TTL signals, which greatly improves the anti-interference capability on site.

[0011] This invention uses an RS485 bus direction controller, namely transistor Q1, to realize automatic control of signal transmission direction, shorten the transmission direction conversion time, and improve communication stability.

[0012] This invention employs current limiting and filtering, along with a bidirectional transient voltage suppression diode array, to suppress transient voltage in the B-code signal. Current limiting and filtering are then applied to protect the circuit from damage caused by surge voltage and transient overvoltage, further improving circuit safety and signal quality. Attached Figure Description

[0013] Figure 1 This utility model provides a circuit diagram of an RS485 bus B-code transceiver; Figure 2 This utility model provides a circuit diagram of a signal isolator; Figure 3 This utility model provides an isolated power supply circuit diagram; Figure 4 This is a circuit diagram of a filter capacitor provided by this utility model. Detailed Implementation

[0014] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings.

[0015] This utility model provides an isolated B-code interface circuit, such as Figures 1 to 4 As shown, the system includes an isolation power supply U3, a signal isolator U1, an RS485 bus B-code transceiver U2, a first bidirectional transient voltage suppressor diode T1, a second bidirectional transient voltage suppressor diode T2, a second resistor R2, and a third resistor R3. The first pin of the RS485 bus B-code transceiver U2 is connected to the seventh pin of the signal isolator U1, and the fourth pin is connected to the sixth pin of the signal isolator U1. The sixth and seventh pins of the RS485 bus B-code transceiver U2 receive external B-code differential signals through the third resistor R3 and the second resistor R2, respectively. The sixth pin of the RS485 bus B-code transceiver U2 is also connected to the third pin of the isolation power supply U3 through the third resistor R3 and the second bidirectional transient voltage suppressor diode T2. The seventh pin of the RS485 bus B-code transceiver U2 is also connected to the third pin of the isolation power supply U3 through the second resistor R2 and the first bidirectional transient voltage suppressor diode T1. The second and third pins of the signal isolator U1 are connected to the CPU's data receive pin and data transmit pin, respectively.

[0016] In this embodiment, the signal isolator U1 is a π122U31 digital isolator, the RS485 bus B code transceiver U2 is a SIT65HVD75DR transceiver, and the isolation power supply U3 is a B0505S-1WR isolation power supply module.

[0017] Specifically, the circuit also includes transistor Q1 (i.e., RS485 bus direction controller), first resistor R1, fourth resistor R4, fifth resistor R5, sixth resistor R6, fifth capacitor C5, and sixth capacitor C6. The third and second pins of the RS485 bus B-code transceiver U2 are connected. The second pin is connected to the collector of transistor Q1. The collector of transistor Q1 is connected to the fourth pin of isolation power supply U3 through the seventh resistor R7. The emitter of transistor Q1 is connected to the third pin of isolation power supply U3. The base of transistor Q1 is connected to the sixth pin of signal isolator U1 through the sixth resistor R6. The first resistor R1 is connected to the RS485 bus B-code transceiver. Between pins 7 and 6 of RS485 bus transceiver U2, pins 7 and 6 are connected to pin 3 of isolation power supply U3 via capacitors C5 and C6 respectively. Pin 7 of RS485 bus transceiver U2 is also connected to pin 3 of isolation power supply U3 via resistor R4. Pin 6 of RS485 bus transceiver U2 is also connected to pin 4 of isolation power supply U3 via resistor R5. Pin 5 of RS485 bus transceiver U2 is connected to pin 3 of isolation power supply U3. Pin 8 of RS485 bus transceiver U2 is connected to pin 4 of isolation power supply U3.

[0018] Specifically, pin 1 of signal isolator U1 is connected to the 3.3V power supply, pin 4 is grounded, pins 5 and 8 are connected to pins 3 and 4 of isolation power supply U3 respectively, pin 1 of isolation power supply U3 is connected to system ground, pin 2 is connected to the 5V power supply, pin 3 is connected to isolation ground, and pin 4 is connected to the isolation 5V power supply.

[0019] Specifically, the circuit also includes a first filter capacitor C1, a second filter capacitor C2, and a third filter capacitor C3. The two pins of the first filter capacitor C1 are connected to system ground and isolation ground, respectively. The two pins of the second filter capacitor C2 are connected to the 5V power supply and system ground, respectively. The two pins of the third filter capacitor C3 are connected to the isolated 5V power supply and isolation ground, respectively.

[0020] The working principle of this utility model is as follows: The isolated B-code interface circuit achieves stable reception of B-code signals through filtering, signal level conversion, and signal isolation.

[0021] Specifically, the external B-code differential signal first passes through a bidirectional transient voltage suppression diode array to suppress excessively high transient voltages, thereby achieving overvoltage protection for the bus transceiver chip. The signal then passes through current limiting and filters to limit current and suppress noise, improving signal quality. The processed signal is then converted from a differential signal to a TTL signal by the RS485 bus B-code transceiver, and after isolation by an isolator, it is transmitted to the CPU for processing.

[0022] The RS485 bus direction controller automatically controls the transmission and reception direction of the RS485 bus B-code transceiver, which can significantly shorten the direction switching time and thus ensure stable and reliable communication.

[0023] The above description is merely a preferred embodiment of this utility model. It should be understood that this utility model is not limited to the forms disclosed herein and should not be construed as excluding other embodiments. It can be used in various other combinations, modifications, and environments, and can be altered within the scope of the concept described herein through the above teachings or related technologies or knowledge. Modifications and variations made by those skilled in the art that do not depart from the spirit and scope of this utility model should be protected within the scope of the appended claims.

Claims

1. An isolated B-code interface circuit, comprising: The system includes an isolation power supply (U3), a signal isolator (U1), an RS485 bus B-code transceiver (U2), a first bidirectional transient voltage suppressor diode (T1), a second bidirectional transient voltage suppressor diode (T2), a second resistor (R2), and a third resistor (R3). Pin 1 of the RS485 bus B-code transceiver (U2) is connected to pin 7 of the signal isolator (U1), and pin 4 is connected to pin 6 of the signal isolator (U1). Pins 6 and 7 of the RS485 bus B-code transceiver (U2) are connected to the third resistor (R3) and... The second resistor (R2) receives the external B-code differential signal. The sixth pin of the RS485 bus B-code transceiver (U2) is also connected to the third pin of the isolation power supply (U3) through the third resistor (R3) and the second bidirectional transient voltage suppressor diode (T2). The seventh pin of the RS485 bus B-code transceiver (U2) is also connected to the third pin of the isolation power supply (U3) through the second resistor (R2) and the first bidirectional transient voltage suppressor diode (T1). The second and third pins of the signal isolator (U1) are connected to the CPU's data receive pin and data transmit pin, respectively.

2. The isolated B-code interface circuit of claim 1, wherein, The circuit also includes a transistor (Q1), a first resistor (R1), a fourth resistor (R4), a fifth resistor (R5), a sixth resistor (R6), a fifth capacitor (C5), and a sixth capacitor (C6). The third pin of the RS485 bus B-code transceiver (U2) is connected to the second pin. The second pin is connected to the collector of transistor (Q1). The collector of transistor (Q1) is connected to the fourth pin of the isolation power supply (U3) through the seventh resistor (R7). The emitter of transistor (Q1) is connected to the third pin of the isolation power supply (U3). The base of transistor (Q1) is connected to the sixth pin of the signal isolator (U1) through the sixth resistor (R6). The first resistor (R1) is connected between the seventh and sixth pins of the RS485 bus B-code transceiver (U2). The seventh pin of the RS485 bus B-code transceiver (U2) is connected to the... The sixth pin is connected to the third pin of the isolation power supply (U3) through the fifth capacitor (C5) and the sixth capacitor (C6) respectively. The seventh pin of the RS485 bus B code transceiver (U2) is connected to the third pin of the isolation power supply (U3) through the fourth resistor (R4). The sixth pin of the RS485 bus B code transceiver (U2) is also connected to the fourth pin of the isolation power supply (U3) through the fifth resistor (R5). The fifth pin of the RS485 bus B code transceiver (U2) is connected to the third pin of the isolation power supply (U3). The eighth pin of the RS485 bus B code transceiver (U2) is connected to the fourth pin of the isolation power supply (U3).

3. The isolated B-code interface circuit of claim 1, wherein, The first pin of the signal isolator (U1) is connected to the 3.3V power supply, the fourth pin is grounded, and the fifth and eighth pins are connected to the third and fourth pins of the isolation power supply (U3) respectively. The first pin of the isolation power supply (U3) is connected to the system ground, the second pin is connected to the 5V power supply, the third pin is connected to the isolation ground, and the fourth pin is connected to the isolation 5V power supply.

4. The isolated B-code interface circuit of claim 1, wherein, The circuit also includes a first filter capacitor (C1), a second filter capacitor (C2), and a third filter capacitor (C3). The two pins of the first filter capacitor (C1) are connected to system ground and isolation ground, respectively. The two pins of the second filter capacitor (C2) are connected to the 5V power supply and system ground, respectively. The two pins of the third filter capacitor (C3) are connected to the isolated 5V power supply and isolation ground, respectively.

5. The isolated B-code interface circuit of claim 1, wherein, The signal isolator (U1) is model π122U31, the RS485 bus B code transceiver (U2) is model SIT65HVD75DR, and the isolation power supply (U3) is model B0505S-1WR.

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