Flip LED display module and display screen
Patent Information
- Application Number
- CN202522101633.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-29
- Publication Date
- 2026-09-18
- Estimated Expiration
- 2035-09-29
AI Technical Summary
[0005]本申请提供一种倒装LED显示模块及显示屏,可以解决传统LED显示模块需经多道工序制作,流程繁琐,无法满足对像素微缩、高密度集成的需求,金线连接的机械强度弱易断裂,并易虚焊影响寿命与稳定性的技术问题
倒装LED阵列层装设于免切割集成驱动IC层的正面,免切割集成驱动IC层装设于电路板层的正面,省去了IC晶圆切割及芯片分拣工序,简化了生产流程,减少了专用设备与人工管控环节,进而缩短生产周期、降低制造成本及不良率;借助倒装LED阵列层与免切割集成驱动IC层的直接装配,无需预留金线焊线空间,突破了像素排布密度的限制,能够适配Mini/MicroLED等技术对像素微缩及高密度集成的需求;同时摒弃了传统金线连接方式,避免了金线机械强度弱易受机械应力断裂的问题,且消除了金线与相关部件因热膨胀系数不匹配导致的长期使用易产生虚焊的缺陷,延长产品使用寿命并提升运行稳定性。
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Figure CN224775315U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of light-emitting diodes, specifically to a flip-chip LED display module and display screen. Background Technology
[0002] Currently, integrated packaging technology in the LED display field is rapidly developing towards high density, high reliability, low cost, and miniaturization. With the popularization of technologies such as ultra-high-definition display, Mini Light-Emitting Diode, and Micro Light-Emitting Diode, the market's requirements for the pixel density of LED display modules are constantly increasing, while the demands for product lifespan, stability, and manufacturing cost control are becoming increasingly stringent.
[0003] In related technologies, the manufacturing of LED display modules uses a combination of discrete driver ICs and standard LED chips. This requires first cutting the IC wafer into individual chips, sorting out the good ones, and then using a die bonding process to mount the standard LED chips and discrete IC chips onto a PCB substrate. Then, a gold wire bonding process is used to achieve the circuit connection between the LED chips and the driver IC, and finally, the packaging is completed to form a display module.
[0004] However, the process involves multiple steps, including IC wafer dicing, chip sorting, LED and IC die bonding, and gold wire bonding. This is a complex process that requires specialized equipment and manual control, increasing production cycle and cost, as well as the risk of defective products. Formal LEDs require reserved space for gold wire bonding, which limits pixel density and cannot meet the needs of Mini / Micro LED technologies for pixel miniaturization and high-density integration. Relying on gold wire connections, the gold wires have weak mechanical strength and are prone to breakage under mechanical stress. Furthermore, the thermal expansion coefficients of the gold wires and related components are not compatible, which can easily lead to poor soldering after long-term use, affecting product lifespan and stability. Summary of the Invention
[0005] This application provides a flip-chip LED display module and display screen, which can solve the technical problems of traditional LED display modules requiring multiple manufacturing processes, which are cumbersome and cannot meet the needs of pixel miniaturization and high-density integration. Furthermore, the mechanical strength of gold wire connections is weak and prone to breakage, and poor soldering can affect lifespan and stability.
[0006] In a first aspect, embodiments of this application provide a flip-chip LED display module, which includes: The layers arranged from bottom to top are: circuit board layer, cut-free integrated driver IC layer, and flip-chip LED array layer; The flip-chip LED array layer is mounted on the front side of the cut-free integrated driver IC layer, and the cut-free integrated driver IC layer is mounted on the front side of the circuit board layer.
[0007] In conjunction with the first aspect, in one embodiment, the flip-chip LED array layer includes a plurality of multicolor light-emitting chip units distributed in an array; The front side of the cut-free integrated driver IC layer is provided with multi-color light-emitting chip pads that correspond one-to-one with the multiple multi-color light-emitting chip units, and the multi-color light-emitting chip pads are soldered to their corresponding multi-color light-emitting chip units.
[0008] In conjunction with the first aspect, in one embodiment, the multicolor light-emitting chip pads include three sets of positive electrode pads and negative electrode pads; The multicolor light-emitting chip unit includes a red light-emitting chip, a green light-emitting chip, and a blue light-emitting chip. The red light-emitting chip is soldered to the positive and negative electrode pads of the first group, the green light-emitting chip is soldered to the positive and negative electrode pads of the second group, and the blue light-emitting chip is soldered to the positive and negative electrode pads of the third group.
[0009] In conjunction with the first aspect, in one embodiment, the cut-free integrated driver IC layer has a through-silicon via (TSV) structure inside, one end of the TSV structure is connected to the negative electrode pad on the front side of the cut-free integrated driver IC layer, and the other end is connected to the GND grounding pad on the back side of the cut-free integrated driver IC layer.
[0010] In conjunction with the first aspect, in one embodiment, the back side of the cut-free integrated driver IC layer is provided with multiple system pad units, and the front side of the circuit board layer is provided with multiple adapter pad units. Each system pad unit is soldered to its corresponding adapter pad unit and is used for the logic lighting of a multicolor light-emitting chip unit in the flip-chip LED array layer.
[0011] In conjunction with the first aspect, in one embodiment, both the system pad unit and the adapter pad unit include a DIN data input pad, a VDD power pad, a GND ground pad, a DL left channel input / output pad, and a DR right channel input / output pad.
[0012] In conjunction with the first aspect, in one embodiment, in any two adjacent system pad units, the DIN data input pad of the first system pad unit is connected to the DL left channel input / output pad of the second system pad unit, and the DR right channel input / output pad of the first system pad unit is connected to the DIN data input pad of the second system pad unit.
[0013] In conjunction with the first aspect, in one embodiment, in the system pad unit, the VDD power pad, the GND ground pad, the DL left channel input / output pad, and the DR right channel input / output pad are arranged in a matrix, and the DIN data input pad is located at the center of the matrix arrangement.
[0014] In conjunction with the first aspect, in one embodiment, the flip-chip LED display module further includes: A molded encapsulation layer covers the front side of the flip-chip LED array layer.
[0015] Secondly, embodiments of this application provide a display screen that includes a flip-chip LED display module as described in some of the above embodiments.
[0016] The beneficial effects of the technical solutions provided in this application include: The flip-chip LED array layer is mounted on the front side of the diced integrated driver IC layer, which in turn is mounted on the front side of the circuit board layer. This eliminates the need for IC wafer dicing and chip sorting, simplifying the production process, reducing the need for specialized equipment and manual control, thereby shortening the production cycle, reducing manufacturing costs, and lowering the defect rate. By directly assembling the flip-chip LED array layer and the diced integrated driver IC layer, there is no need to reserve space for gold wire bonding, overcoming the limitations of pixel density and adapting to the pixel miniaturization and high-density integration requirements of technologies such as Mini / MicroLED. At the same time, it eliminates the traditional gold wire connection method, avoiding the problem of weak mechanical strength and susceptibility to mechanical stress breakage of gold wires, and eliminating the defect of poor soldering caused by mismatched thermal expansion coefficients between gold wires and related components during long-term use, thus extending product lifespan and improving operational stability. Attached Figure Description
[0017] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0018] Figure 1 An exploded view of a flip-chip LED display module; Figure 2 A three-dimensional structural diagram of a flip-chip LED display module after removing the molded encapsulation layer; Figure 3 A magnified schematic diagram of the front side of the driver IC layer for non-diceslic integrated circuits; Figure 4 A schematic diagram showing the distribution of multiple system pad units on the back side of the driver IC layer for non-diceslic integration; Figure 5 A schematic diagram of the wiring connections for multiple system pad units on the back side of the integrated driver IC layer without cutting.
[0019] In the diagram: 1. Circuit board layer; 2. Cut-free integrated driver IC layer; 21. Multi-color LED chip pad; 211. Positive electrode pad; 212. Negative electrode pad; 22. System pad unit; 3. Flip-chip LED array layer; 31. Multi-color LED chip unit; 311. Red LED chip; 312. Green LED chip; 313. Blue LED chip; 4. Molded encapsulation layer. Detailed Implementation
[0020] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present application.
[0021] It's important to understand that integrated packaging technology in the LED display field is rapidly developing towards higher density, higher reliability, lower cost, and miniaturization. With the popularization of technologies such as ultra-high-definition displays, Mini Light-Emitting Diodes (MLEDs), and Micro Light-Emitting Diodes (MADs), the market's demands for pixel density in LED display modules are constantly increasing. Simultaneously, the requirements for controlling product lifespan, stability, and manufacturing costs are becoming increasingly stringent. Whether it's ultra-large-screen splicing and outdoor advertising screens in the commercial display field, or smart terminal displays in the consumer electronics field, all require achieving higher resolution display effects within limited space, while also ensuring the long-term reliability of the product and avoiding failures caused by structural design or process defects. This places higher demands on the integrated packaging technology of LED display modules, urgently requiring breakthroughs in the limitations of traditional manufacturing models to achieve synergistic development of process simplification, structural optimization, and performance improvement.
[0022] In the manufacturing of LED display modules, a combination of discrete driver ICs and modular LED chips is used. This technology requires first cutting the IC wafer into individual chips, sorting out the good ones, and then using a die bonding process to mount the modular LED chips and discrete IC chips onto a PCB substrate. Next, a gold wire bonding process is used to establish the circuit connection between the LED chips and the driver IC, and finally, the module is packaged to form the display module.
[0023] However, the process involves multiple steps, including IC wafer dicing, chip sorting, LED and IC die bonding, and gold wire bonding. This is a complex process that requires specialized equipment and manual control, increasing production cycle and cost, and also increasing the risk of defective products. Formal LEDs require reserved space for gold wire bonding, which limits pixel density and cannot meet the needs of Mini / Micro LED technologies for pixel miniaturization and high-density integration. Relying on gold wire connections, the gold wires have weak mechanical strength and are prone to breakage under mechanical stress. Furthermore, the thermal expansion coefficients of the gold wires and related components are not compatible, which can easily lead to poor soldering after long-term use, affecting product lifespan and stability.
[0024] This application provides a flip-chip LED display module and display screen, which can solve the technical problems of traditional LED display modules requiring multiple manufacturing processes, which are cumbersome and cannot meet the needs of pixel miniaturization and high-density integration. Furthermore, the mechanical strength of gold wire connections is weak and prone to breakage, and poor soldering can affect lifespan and stability.
[0025] like Figure 1 As shown, in a first aspect, embodiments of this application provide a flip-chip LED display module, which includes: a circuit board layer 1, a cut-free integrated driver IC layer 2, and a flip-chip LED array layer 3 arranged sequentially from bottom to top; the flip-chip LED array layer 3 is mounted on the front side of the cut-free integrated driver IC layer 2, and the cut-free integrated driver IC layer 2 is mounted on the front side of the circuit board layer 1.
[0026] In this embodiment, by configuring the circuit board layer 1, the diced integrated driver IC layer 2, and the flip-chip LED array layer 3 sequentially from bottom to top, the flip-chip LED array layer 3 is mounted on the front side of the diced integrated driver IC layer 2, and the diced integrated driver IC layer 2 is mounted on the front side of the circuit board layer 1. This eliminates the IC wafer dicing and chip sorting processes, simplifies the production process, reduces the need for specialized equipment and manual control, thereby shortening the production cycle, reducing manufacturing costs and defect rates. The direct assembly structure of the flip-chip LED array layer 3 and the diced integrated driver IC layer 2 eliminates the need for reserved space for gold wire bonding, overcoming the limitations of pixel density and adapting to the pixel miniaturization and high-density integration requirements of technologies such as Mini / Micro LED. Simultaneously, this structure abandons the traditional gold wire connection method, avoiding the problem of weak mechanical strength and susceptibility to mechanical stress breakage of gold wires, and eliminating the defect of poor soldering caused by mismatched thermal expansion coefficients between gold wires and related components during long-term use. This helps extend product lifespan and improve operational stability.
[0027] In conjunction with the first aspect, in one implementation, such as Figure 2 and Figure 3As shown, the flip-chip LED array layer 3 includes multiple multi-color light-emitting chip units 31 distributed in an array; the front side of the cut-free integrated driver IC layer 2 is provided with multi-color light-emitting chip pads 21 corresponding to the multiple multi-color light-emitting chip units 31, and the multi-color light-emitting chip pads 21 are soldered to their corresponding multi-color light-emitting chip units 31.
[0028] In this embodiment, the flip-chip LED array layer 3 includes multiple multi-color light-emitting chip units 31 arranged in an array. The front side of the cut-free integrated driver IC layer 2 is provided with multi-color light-emitting chip pads 21 that match the multiple multi-color light-emitting chip units 31 one by one. The multi-color light-emitting chip pads 21 and their corresponding multi-color light-emitting chip units 31 are electrically connected and mechanically fixed by welding. This allows the cut-free integrated driver IC layer 2 to directly transmit driving signals and supply power to each multi-color light-emitting chip unit 31, eliminating the traditional gold wire bonding process and further simplifying the production process. By matching the array distribution of the multi-color light-emitting chip units 31 with the one-to-one correspondence of the multi-color light-emitting chip pads 21, more multi-color light-emitting chip units 31 can be arranged in a unit area, increasing the pixel integration density to meet the high-density display requirements of Mini / Micro LED. Moreover, compared with gold wire bonding, the welding connection method has higher structural strength and more stable electrical performance, which can reduce connection failures caused by mechanical stress and reduce the risk of cold solder joints caused by differences in thermal expansion coefficients, thus improving the overall reliability and service life of the module.
[0029] In conjunction with the first aspect, in one implementation, such as Figure 2 and Figure 3 As shown, the multi-color light-emitting chip pad 21 includes three sets of positive pads 211 and negative pads 212; the multi-color light-emitting chip unit 31 includes a red light-emitting chip 311, a green light-emitting chip 312 and a blue light-emitting chip 313. The red light-emitting chip 311 is soldered to the first set of positive pads 211 and negative pads 212, the green light-emitting chip 312 is soldered to the second set of positive pads 211 and negative pads 212, and the blue light-emitting chip 313 is soldered to the third set of positive pads 211 and negative pads 212.
[0030] In this embodiment, the multicolor light-emitting chip pads 21 are configured with three sets of positive pads 211 and negative pads 212. The multicolor light-emitting chip unit 31 includes a red light-emitting chip 311, a green light-emitting chip 312, and a blue light-emitting chip 313. The red light-emitting chip 311 is soldered to the first set of positive pads 211 and negative pads 212, the green light-emitting chip 312 is soldered to the second set of positive pads 211 and negative pads 212, and the blue light-emitting chip 313 is soldered to the third set of positive pads 211 and negative pads 212. The multicolor light-emitting chip unit 31 is soldered to the corresponding single-color light-emitting chip through the three sets of independent positive and negative pads. The interconnected design enables the cut-free integrated driver IC layer 2 to achieve individual current control and signal drive for the red light-emitting chip 311, green light-emitting chip 312, and blue light-emitting chip 313, ensuring that the brightness, timing, and other parameters of each monochrome chip can be independently adjusted to achieve precise color mixing and display. At the same time, the grouped independent soldering structure avoids circuit interference between chips of different colors. Combined with the mechanical strength and thermal stability of the soldered connection, the working reliability of the multi-color light-emitting chip unit 31 is improved. Moreover, this structure does not require additional wiring space for color differentiation, which helps to reduce the size of the multi-color light-emitting chip unit 31 and adapt to high-density integration requirements.
[0031] In conjunction with the first aspect, in one embodiment, a through-silicon via (TSV) structure is provided inside the cut-free integrated driver IC layer 2. One end of the TSV structure is connected to the negative electrode pad 212 on the front side of the cut-free integrated driver IC layer 2, and the other end is connected to the GND grounding pad on the back side of the cut-free integrated driver IC layer 2.
[0032] In this embodiment, the cut-free integrated driver IC layer 2 has a through-silicon via (TSV) structure inside. One end of the TSV structure is connected to the negative electrode pad 212 on the front side of the cut-free integrated driver IC layer 2, and the other end is connected to the GND grounding pad on the back side of the cut-free integrated driver IC layer 2. The TSV structure enables vertical electrical conduction between the negative electrode pad 212 on the front side of the cut-free integrated driver IC layer 2 and the GND grounding pad on the back side, shortening the transmission path of the grounding loop, reducing grounding impedance, and reducing signal interference. At the same time, this structure eliminates the need to lay additional grounding wires on the surface of the cut-free integrated driver IC layer 2, saving wiring space and facilitating the high-density layout of the multi-color light-emitting chip pads 21 on the front side. Furthermore, the TSV structure has high mechanical strength and stability, which can improve the reliability of the grounding connection, avoid grounding failure due to lead breakage or poor contact, and ensure the electrical performance stability of the module.
[0033] In conjunction with the first aspect, in one implementation, such as Figure 5As shown, the back of the cut-free integrated driver IC layer 2 is provided with multiple system pad units 22, and the front of the circuit board layer 1 is provided with multiple adapter pad units; each system pad unit 22 is soldered to its corresponding adapter pad unit and is used for the logic lighting of a multi-color light-emitting chip unit 31 in the flip-chip LED array layer 3.
[0034] In this embodiment, the back side of the cut-free integrated driver IC layer 2 is provided with multiple system pad units 22, and the front side of the circuit board layer 1 is provided with multiple adapter pad units. Each system pad unit 22 is overlapped and soldered with its corresponding adapter pad unit. Through this overlapped soldering structure, a stable electrical connection and mechanical fixation between the cut-free integrated driver IC layer 2 and the circuit board layer 1 are achieved. Moreover, this structure does not require additional reserved connection space, which is beneficial to the overall thinness and high-density integration of the module.
[0035] In conjunction with the first aspect, in one implementation, such as Figure 5 As shown, both the system pad unit 22 and the adapter pad unit include DIN data input pads, VDD power pads, GND ground pads, DL left channel input / output pads, and DR right channel input / output pads.
[0036] In this embodiment, the system pad unit 22 and the adapter pad unit have the same configuration, both including DIN data input pads, VDD power pads, GND ground pads, DL left channel input / output pads, and DR right channel input / output pads. By correspondingly overlapping and soldering the same functional pads in the two types of pads, the circuit board layer 1 can transmit display data signals to the cut-free integrated driver IC layer 2 through the DIN data input pad of the adapter pad unit, supply working power to the cut-free integrated driver IC layer 2 and the flip-chip LED array layer 3 through the VDD power pad, and construct a stable grounding loop through the GND ground pad. At the same time, the cascaded signal interaction of multiple sets of cut-free integrated driver IC layers 2 is realized through the DL left channel input / output pad and the DR right channel input / output pad. This consistent pad configuration design ensures comprehensive compatibility and connection of signals, power, and ground between the cut-free integrated driver IC layer 2 and the circuit board layer 1, avoids performance shortcomings caused by missing functional pads, ensures the accuracy of data transmission and the stability of power supply, and provides a unified pad design standard for the mass production of modules, improving assembly efficiency.
[0037] In conjunction with the first aspect, in one implementation, such as Figure 5 As shown, in any two adjacent system pad units 22, the DIN data input pad of the first system pad unit 22 is connected to the DL left channel input / output pad of the second system pad unit 22, and the DR right channel input / output pad of the first system pad unit 22 is connected to the DIN data input pad of the second system pad unit 22.
[0038] In this embodiment, a specific line connection is formed between any two adjacent system pad units 22. The DIN data input pad of the first system pad unit 22 is connected to the DL left channel input / output pad of the second system pad unit 22 via a line, and the DR right channel input / output pad of the first system pad unit 22 is connected to the DIN data input pad of the second system pad unit 22 via a line. Through this adjacent connection structure, multiple system pad units 22 form a cascaded data transmission path, ensuring that display data signals can be transmitted in an orderly manner between adjacent system pad units 22, realizing point-by-point logic control of multiple multi-color light-emitting chip units 31 in the flip-chip LED array layer 3. At the same time, with the directional connection of the DL left channel input / output pad and the DR right channel input / output pad, the signal transmission requirements from left to right or from right to left can be flexibly adapted, improving the flexibility of module wiring. Moreover, this cascaded structure does not require an additional global data bus, reduces line cross-interference, and helps to ensure the integrity of data transmission and the synchronization of display control, adapting to the driving requirements of high-density arrays.
[0039] In conjunction with the first aspect, in one implementation, such as Figure 4 and Figure 5 As shown, in the system pad unit 22, the VDD power pad, GND ground pad, DL left channel input / output pad and DR right channel input / output pad are arranged in a matrix, and the DIN data input pad is located at the center of the matrix arrangement.
[0040] In this embodiment, the VDD power pad, GND ground pad, DL left channel input / output pad, and DR right channel input / output pad within the system pad unit 22 are arranged in a matrix, with the DIN data input pad positioned at the center of this matrix arrangement. This matrix arrangement design shortens the wiring distance between the VDD power pad, GND ground pad, and the DL left channel input / output pad and DR right channel input / output pad, reducing power transmission impedance and signal transmission loss. It also ensures a neat layout of the functional pads, reducing mutual signal interference. Placing the DIN data input pad at the center of the matrix further shortens its connection path to other surrounding functional pads, ensuring rapid and stable distribution of display data signals to the VDD power control loop and DL / DR channels. This central layout also improves pad space utilization, avoids congestion in one direction, meets the high-density integration requirements of the system pad unit 22, and provides a precise alignment reference for subsequent overlapping soldering with the pad unit on circuit board layer 1, reducing assembly deviations.
[0041] In conjunction with the first aspect, in one implementation, such as Figure 1 As shown, the flip-chip LED display module also includes a molding encapsulation layer 4, which covers the front side of the flip-chip LED array layer 3.
[0042] In this embodiment, a molding encapsulation layer 4 is also included, which covers the front side of the flip-chip LED array layer 3. By forming a complete encapsulation of the flip-chip LED array layer 3 through the molding encapsulation layer 4, the dust, moisture and impurities in the external environment can be isolated from the corrosion of the multi-color light-emitting chip unit 31. At the same time, it buffers the stress of external mechanical impact on the welding part of the flip-chip LED array layer 3 and the cut-free integrated driver IC layer 2, and protects the stability of the internal structure. In addition, the molding encapsulation layer 4 can perform light homogenization processing on the light emitted by the multi-color light-emitting chip unit 31, optimize the uniformity of the display effect, and its covering structure does not require additional frame fixation, which helps to reduce the overall thickness of the module, adapt to the miniaturized assembly requirements, and further ensure the optical performance and structural reliability of the module during long-term use.
[0043] In summary, the complete technical solution of the embodiments of this application is described as follows: First, such as Figure 1 As shown, a whole-board IC integrated panel packaging solution is adopted. A whole uncut integrated driver IC layer 2 is used. First, the whole uncut integrated driver IC layer 2 is flip-chip mounted on the bottom circuit board layer 1. Then, the flip-chip LED array layer 3 is flip-chip mounted on the front of the uncut integrated driver IC layer 2. Finally, it is packaged by molding.
[0044] Among them, the molded encapsulation layer 4 achieves (haze 60%±5%, contrast improvement 40%) through a customized adhesive formula. It adopts segmented curing: the first stage is high-temperature molding at 150℃ (±5℃), and the second stage is curing at 150℃ (±5℃) * 3H (constant temperature period time) excluding the temperature rise and fall time.
[0045] In this case, the RGB tri-light chips of the flip-chip LED array layer 3 are flip-chip mounted on the non-diceswired integrated driver IC layer 2, such as... Figure 3 The front side of the cut-free integrated driver IC layer 2 has white pads (i.e., positive pad 211 and negative pad 212) that are soldered to the back pads of the RGB three-light chip using solder paste.
[0046] Among them, the uncut integrated driver IC layer 2 adopts a whole-board, uncut approach, which significantly reduces manufacturing costs and eliminates the cutting, sorting, and placement processes: the traditional method requires cutting the wafer into individual chips, sorting out good products, and then precisely placing the IC chips and LED particles one by one onto the PCB. The whole-board solution directly eliminates the cutting, sorting, and most of the chip placement steps.
[0047] The display data and control signals are input from the back of the cut-free integrated driver IC layer 2. The internal logic of the cut-free integrated driver IC layer 2 processes the data and generates the driving current corresponding to each sub-pixel. The driving current reaches the positive electrode pad 211 and negative electrode pad 212 on the front through the internal circuit. The current flows into the anode of the LED chip bonded thereon, lights up the LED, and flows out from the cathode of the LED chip. The outflowing current returns to the TSV (Through Silicon Via) and connects to the GND grounding pad on the back of the cut-free integrated driver IC layer 2, forming a complete system current loop.
[0048] The heat generated by the cut-free integrated driver IC layer 2 and the RGB three-light chip is mainly conducted to the back side through the through-silicon via structure, and then dissipated through the bottom circuit board layer 1.
[0049] Among them, such as Figure 5 As shown, the DR and DL channels of the cut-free integrated driver IC layer 2 are data input / output ports. When a signal is input from the left, the DIN and DR channels inside the chip are activated simultaneously to output a signal. The DIN channel is responsible for passing the signal to the DL channel of the next chip, driving the subsequent chip to complete signal reception and processing according to the logic corresponding to DL. The DR channel is responsible for passing the signal to the DIN port of the next chip, allowing the next chip to continue transmitting signals to the next level using the same DIN-DR parallel logic. This "DIN+DR" dual-channel parallel design essentially improves the reliability of signal transmission through redundant channels, providing a foundation for subsequent "switching in case of single-channel failure".
[0050] Furthermore, when the signal is input from the right, the transmission logic is a mirror image of the logic when input from the left, and the principle is the same. The signal is input from the right side, and the DIN and DR channels inside the chip are activated simultaneously to output signals. The DIN channel is responsible for passing the signal to the DL channel of the next chip, driving the subsequent chip to complete signal reception and processing according to the logic corresponding to DL. The DR channel is responsible for passing the signal to the DIN port of the next chip, allowing the next chip to continue transmitting signals to the next level using the same DIN-DR parallel logic. This "DIN+DR" dual-channel parallel design essentially improves the reliability of signal transmission through redundant channels, providing a basis for subsequent "switching in case of single-channel failure".
[0051] Specifically, when one channel (such as DIN or DR) experiences a signal transmission failure (e.g., a broken circuit, damage to the module inside the chip), the other channel will automatically take over all transmission tasks. If the DIN channel fails: the signal originally transmitted from DIN to the next chip "DL" will be redirected to the relevant receiver of the next chip's "DL" through the redundant logic of the DR channel, ensuring that the signal can be transmitted to the "next DL". If the DR channel fails: the signal originally transmitted from DR to the next chip "DIN" will be redirected to the "DIN" end of the next chip through the redundant logic of the DIN channel, allowing the next chip to continue transmitting downwards using the parallel logic of "DIN-DR".
[0052] Secondly, embodiments of this application provide a display screen that includes a flip-chip LED display module as described in some of the above embodiments.
[0053] In the description of this application, it should be noted that the terms "upper," "lower," etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Unless otherwise expressly specified and limited, the terms "installed," "connected," and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two elements. For those skilled in the art, the specific meaning of the above terms in this application can be understood according to the specific circumstances.
[0054] It should be noted that in this application, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0055] The above description is merely a specific embodiment of this application, enabling those skilled in the art to understand or implement this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.
Claims
1. An inverted LED display module, characterized by, It includes: The circuit board layer (1), the cut-free integrated driver IC layer (2), and the flip-chip LED array layer (3) are arranged sequentially from bottom to top. The flip-chip LED array layer (3) is mounted on the front side of the cut-free integrated driver IC layer (2), and the cut-free integrated driver IC layer (2) is mounted on the front side of the circuit board layer (1).
2. The flip-chip LED display module as described in claim 1, characterized in that, The flip-chip LED array layer (3) includes multiple multicolor light-emitting chip units (31) arranged in an array. The front side of the cut-free integrated driver IC layer (2) is provided with multi-color light-emitting chip pads (21) that correspond one-to-one with the multiple multi-color light-emitting chip units (31), and the multi-color light-emitting chip pads (21) are soldered to their corresponding multi-color light-emitting chip units (31).
3. The flip-chip LED display module as described in claim 2, characterized in that, The multicolor light-emitting chip pad (21) includes three sets of positive electrode pads (211) and negative electrode pads (212). The multicolor light-emitting chip unit (31) includes a red light-emitting chip (311), a green light-emitting chip (312), and a blue light-emitting chip (313). The red light-emitting chip (311) is soldered to the positive electrode pad (211) and the negative electrode pad (212) of the first group. The green light-emitting chip (312) is soldered to the positive electrode pad (211) and the negative electrode pad (212) of the second group. The blue light-emitting chip (313) is soldered to the positive electrode pad (211) and the negative electrode pad (212) of the third group.
4. The flip-chip LED display module as described in claim 3, characterized in that, The cut-free integrated driver IC layer (2) has a through-silicon via structure inside. One end of the through-silicon via structure is connected to the negative electrode pad (212) on the front side of the cut-free integrated driver IC layer (2), and the other end is connected to the GND grounding pad on the back side of the cut-free integrated driver IC layer (2).
5. The flip-chip LED display module as described in claim 1, characterized in that, The back of the cut-free integrated driver IC layer (2) is provided with multiple system pad units (22), and the front of the circuit board layer (1) is provided with multiple adapter pad units. Each of the system pad units (22) is soldered to its corresponding adapter pad unit and used for the logic lighting of a multicolor light-emitting chip unit (31) in the flip-chip LED array layer (3).
6. The flip-chip LED display module as described in claim 5, characterized in that, Both the system pad unit (22) and the adapter pad unit include DIN data input pad, VDD power pad, GND ground pad, DL left channel input / output pad and DR right channel input / output pad.
7. The flip-chip LED display module as described in claim 6, characterized in that, In any two adjacent system pad units (22), the DIN data input pad of the first system pad unit (22) is connected to the DL left channel input / output pad of the second system pad unit (22), and the DR right channel input / output pad of the first system pad unit (22) is connected to the DIN data input pad of the second system pad unit (22).
8. The flip-chip LED display module as described in claim 6, characterized in that, In the system pad unit (22), the VDD power pad, the GND ground pad, the DL left channel input / output pad and the DR right channel input / output pad are arranged in a matrix, and the DIN data input pad is located at the center of the matrix arrangement.
9. The flip-chip LED display module as described in claim 1, characterized in that, The flip-chip LED display module also includes: A molded encapsulation layer (4) covers the front side of the flip-chip LED array layer (3).
10. A display screen, characterized by It includes the flip-chip LED display module as described in any one of claims 1-9.