Internal insulation discrete device

Abstract

This utility model discloses an internally insulated discrete device, comprising: an integrated insulating and thermally conductive metal base plate; the integrated insulating and thermally conductive metal base plate includes an upper copper layer, an insulating and thermally conductive layer, and a lower copper layer. The lower surface of the insulating and thermally conductive layer is in contact with the upper surface of the lower copper layer and has a first fixed contact structure, and the lower surface of the upper copper layer is in contact with the upper surface of the insulating and thermally conductive layer and has a second fixed contact structure. Both the first and second fixed contact structures are thermo-pressed. The upper copper layer has a chip mounting area and an electrical connection pattern of the circuit topology. The thickness of the lower copper layer is greater than the thickness of the upper copper layer. The maximum thickness of the lower copper layer is greater than 0.3 mm. This utility model can reduce installation complexity and usage costs, provide sufficient insulation strength while reducing thermal resistance, and simultaneously improve device reliability.

Description

Technical Field

[0001] This utility model relates to the field of semiconductor devices, and in particular to an internally insulated discrete device. Background Technology

[0002] Power semiconductor devices can generally be divided into two main categories: discrete devices (single transistors) and power module devices (multi-chip integration). Discrete devices can be further divided into three categories based on their packaging materials: metal packages, ceramic packages, and plastic packages. Among these, plastic packages account for more than 90% of the discrete device market due to their low material cost, simple manufacturing process, and ease of mass production, with a global market size exceeding 300 billion yuan.

[0003] Widely used power transistors, such as TO-3, TO-220, and TO-247, typically consist of a metal leadframe, a power chip, a solder layer, internal bonding aluminum wires, and a molding compound. The metal leadframe is usually made of copper or a copper alloy. The power chip is first soldered to a copper base provided with the leadframe. Figure 1A The diagram shown is a structural diagram of an existing power single transistor using a metal lead frame; as shown... Figure 1B As shown, is Figure 1A The circuit diagram shown is for a single power transistor. Figure 1B The medium-power single transistor 104 uses an IGBT, and its electrodes include a gate (G), an emitter (E), and a collector (C). The back of the power chip 102 is mounted on a copper base plate 101. The front electrode of the power chip 102 is connected to a corresponding terminal 103 via a bonding wire, and the copper base plate 101 is also connected to a terminal 103.

[0004] In the structure shown in Figure 1, due to the conductivity of the copper sheet 101 at the bottom of the chip, the back side of the discrete device, after packaging, is usually referred to as an electrode of the chip. In practical use, it is essential to ensure insulation from the heat sink surface. Therefore, thermally conductive films or ceramic sheets, such as alumina or silicon nitride sheets, are typically used on the back side of the discrete device to provide thermal conductivity and electrical insulation. During installation, a semi-solid thermal paste still needs to be applied to the back side of the insulating thermally conductive sheet to fill the interface gaps and reduce thermal resistance. These additional materials and steps increase the complexity and cost of discrete device installation.

[0005] As an improvement over conventional discrete devices, the bottom copper layer of power chips is replaced with a ceramic copper-clad substrate (DBC), such as alumina (Al2O3), aluminum nitride (AlN), or silicon nitride (Si3N4) ceramic. Utilizing the electrical insulation properties of ceramic substrates, the finished discrete device has an electrically insulated bottom, greatly simplifying installation and use. However, due to the low thermal conductivity and high brittleness of alumina ceramic, the ceramic substrate must maintain a relatively high thickness during the manufacturing process, limiting its ability to reduce thermal resistance. Meanwhile, high-conductivity ceramic substrates such as AlN and Si3N4 are very expensive, also limiting their application in discrete devices.

[0006] like Figure 2 The diagram shown is a cross-sectional view of an existing ceramic copper-clad substrate; the ceramic copper-clad substrate 201 includes:

[0007] Intermediate thermally conductive ceramic layer 203; lower surface copper layer 202 located on the lower surface of intermediate thermally conductive ceramic layer 203 and upper surface copper layer 204 located on the upper surface of intermediate thermally conductive ceramic layer 203.

[0008] The ceramic copper-clad substrate 201 is characterized in that the lower surface copper layer 202 and the upper surface copper layer 204 are both set on the upper and lower surfaces of the intermediate thermally conductive ceramic layer 203 by soldering, for example, active soldering (AMB). Due to the limitations of the DBC process, the upper and lower surface copper layers are usually of the same thickness, and the maximum thickness is generally limited to 0.3 mm; at the same time, the intermediate thermally conductive ceramic layer 203 usually uses an alumina ceramic insulating layer to reduce costs. However, due to the brittleness of the alumina ceramic insulating layer, the minimum thickness of the alumina ceramic insulating layer used as the intermediate thermally conductive ceramic layer 203 is generally limited to 0.38 mm, which limits further reduction in its thermal resistance. Utility Model Content

[0009] The technical problem to be solved by this utility model is to provide an internally insulated discrete device that can reduce installation complexity and usage cost, provide sufficient insulation strength while reducing thermal resistance, and improve device reliability.

[0010] To solve the above-mentioned technical problems, the present invention provides an internally insulated discrete device, comprising: an integrated insulating and thermally conductive metal base plate; the integrated insulating and thermally conductive metal base plate comprises an upper surface copper layer, an insulating and thermally conductive layer, and a lower surface copper layer.

[0011] The insulating and thermally conductive layer is located between the upper copper layer and the lower copper layer.

[0012] The lower surface of the insulating and thermally conductive layer is in contact with the upper surface of the lower surface copper layer and has a first fixed contact structure. The lower surface of the upper surface copper layer is in contact with the upper surface of the insulating and thermally conductive layer and has a second fixed contact structure. Both the first fixed contact structure and the second fixed contact structure are hot-pressed bonding structures.

[0013] The upper copper layer has a chip mounting area and an electrical connection pattern of the circuit topology.

[0014] The thickness of the lower surface copper layer is greater than the thickness of the upper surface copper layer.

[0015] The maximum thickness of the copper layer on the lower surface is greater than 0.3 mm.

[0016] The maximum thickness of the copper layer on the upper surface is greater than 0.3 mm.

[0017] A further improvement is that the maximum thickness of the insulating thermally conductive layer is less than 0.38 mm.

[0018] A further improvement is that the thickness of the copper layer on the lower surface is 0.2 mm to 2 mm.

[0019] A further improvement is that the thickness of the copper layer on the upper surface is 0.1 mm to 0.5 mm.

[0020] A further improvement is that the thickness of the insulating and thermally conductive layer is 0.1 mm to 0.3 mm.

[0021] A further improvement is that the insulating and thermally conductive layer is made of an epoxy composite material with a thermal conductivity of 8 W / m·K to 30 W / m·K.

[0022] A further improvement is that it also includes a chip mounted on the chip mounting area.

[0023] A further improvement includes a heat sink that is in contact with the lower surface of the lower copper layer.

[0024] A further improvement is the adoption of a TO-series packaging structure.

[0025] A further improvement is that the TO-series packaging structure includes: TO247, TO-247plus, TO263, TO-3P, TO-264, TO-252, and TO-220.

[0026] This invention employs an integrated insulating and thermally conductive metal base plate, wherein the upper and lower copper layers are insulated by an insulating and thermally conductive layer. Therefore, the lower copper layer does not act as an electrode and can directly contact the heat sink to form a heat dissipation channel. Compared with the existing chip mounting copper sheets using metal lead frames, this invention does not require the installation of an insulating and thermally conductive sheet between the lower copper layer and the heat sink, thus reducing installation complexity and usage costs.

[0027] Because the insulating and thermally conductive layer and the upper and lower surface copper layers are integrated into a single structure through a hot-pressing process, the insulating and thermally conductive layer of this invention achieves high thermal conductivity and allows for a reduction in its thickness. This not only lowers costs but also reduces thermal resistance. Furthermore, the thermal expansion coefficient mismatch between the insulating and thermally conductive layer and the upper and lower surface copper layers is superior to that in existing ceramic copper-clad substrates, thus improving device reliability. Therefore, this invention provides sufficient insulation strength while simultaneously reducing thermal resistance and enhancing device reliability. Attached Figure Description

[0028] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments:

[0029] Figure 1A This is a structural diagram of an existing power single tube that uses a metal lead frame;

[0030] Figure 1B yes Figure 1A The circuit diagram of the single power transistor is shown below;

[0031] Figure 2 This is a cross-sectional view of an existing ceramic copper-clad substrate;

[0032] Figure 3 This is a cross-sectional view of the integrated insulating and thermally conductive metal base plate of the insulating discrete device in this embodiment of the utility model. Detailed Implementation

[0033] like Figure 3 The diagram shown is a cross-sectional view of the integrated insulating and thermally conductive metal base plate 301 of the insulating discrete device in this application embodiment. The insulating discrete device in this application embodiment includes: an integrated insulating and thermally conductive metal base plate 301; the integrated insulating and thermally conductive metal base plate 301 includes an upper surface copper layer 304, an insulating and thermally conductive layer 303, and a lower surface copper layer 302.

[0034] The insulating and thermally conductive layer 303 is located between the upper surface copper layer 304 and the lower surface copper layer 302.

[0035] The lower surface of the insulating and thermally conductive layer 303 is in contact with the upper surface of the lower surface copper layer 302 and has a first fixed contact structure. The lower surface of the upper surface copper layer 304 is in contact with the upper surface of the insulating and thermally conductive layer 303 and has a second fixed contact structure. Both the first fixed contact structure and the second fixed contact structure are hot-pressed bonding structures.

[0036] The upper surface copper layer 304 has a chip mounting area and an electrical connection pattern of the circuit topology.

[0037] The thickness of the lower surface copper layer 302 is greater than the thickness of the upper surface copper layer 304.

[0038] The maximum thickness of the lower surface copper layer 302 is greater than 0.3 mm.

[0039] The maximum thickness of the copper layer 304 on the upper surface is greater than 0.3 mm.

[0040] Since 0.3 mm is the maximum thickness of the copper clad layer that can be achieved by existing ceramic copper clad substrates, the lower surface copper layer 302 and the upper surface copper layer 304 of this invention can overcome the limitations of existing ceramic copper clad substrates on the thickness of the copper clad layer.

[0041] The maximum thickness of the insulating and thermally conductive layer 303 is less than 0.38 mm. Similarly, since 0.38 mm is the minimum thickness of the alumina ceramic layer in existing ceramic copper-clad substrates, the insulating and thermally conductive layer 303 of this invention can overcome the limitation on the thickness of the alumina ceramic layer in existing ceramic copper-clad substrates.

[0042] In some embodiments, the thickness of the lower surface copper layer 302 is 0.2 mm to 2 mm.

[0043] The thickness of the copper layer 304 on the upper surface is 0.1 mm to 0.5 mm.

[0044] The thickness of the insulating and thermally conductive layer 303 is 0.1 mm to 0.3 mm.

[0045] In this embodiment, the insulating and thermally conductive layer 303 is an epoxy composite material layer with a thermal conductivity of 8 W / m·K to 30 W / m·K.

[0046] In this embodiment of the application, the chip is further included: a chip mounted on the chip mounting area.

[0047] It also includes a heat sink, which is in contact with the lower surface of the lower copper layer 302.

[0048] In this embodiment, the internally insulated discrete device adopts a TO-series package structure, which is compatible with existing discrete devices using the TO-series package structure. In some embodiments, the TO-series package structure includes: TO247, TO-247plus, TO263, TO-3P, TO-264, TO-252, and TO-220.

[0049] This embodiment of the invention employs an integrated insulating and thermally conductive metal base plate 301. The upper surface copper layer 304 and the lower surface copper layer 302 are insulated by an insulating and thermally conductive layer 303. Therefore, the lower surface copper layer 302 does not act as an electrode and can directly contact the heat sink to form a heat dissipation channel. Compared with the existing chip mounting copper sheet using a metal lead frame, this embodiment of the invention does not require an insulating and thermally conductive sheet to be installed between the lower surface copper layer 302 and the heat sink. Thus, this embodiment of the invention can reduce installation complexity and usage costs.

[0050] Because the insulating and thermally conductive layer 303 and the upper and lower surface copper layers 302 are integrated into a single structure through a hot-pressing process, the insulating and thermally conductive layer 303 in this embodiment of the invention achieves high thermal conductivity and can also have a reduced thickness. This not only reduces costs but also lowers thermal resistance. Furthermore, the thermal expansion coefficient mismatch between the insulating and thermally conductive layer 303 and the upper and lower surface copper layers 302 in this embodiment of the invention is superior to the thermal expansion coefficient mismatch in existing ceramic copper-clad substrates. Therefore, this embodiment of the invention also improves device reliability. Thus, this embodiment of the invention provides sufficient insulation strength while simultaneously reducing thermal resistance and enhancing device reliability.

[0051] This application embodiment employs a built-in integrated insulating and thermally conductive layer. Insulation and heat dissipation are indispensable requirements in the application of discrete devices. Existing traditional discrete devices, due to their simple structure, have the chip directly soldered to the bottom copper sheet, resulting in conductive and heat dissipation following the same path, increasing the complexity of discrete device installation and usage costs. This application embodiment uses an integrated insulating and thermally conductive metal base plate to replace the existing traditional chip mounting copper sheet; the insulating and thermally conductive layer is integrated with copper or copper alloy materials through a hot-pressing process; the upper copper layer, i.e., the upper surface copper layer 304, provides the chip mounting area and forms the required circuit topology through patterns. The copper layer thickness is between 0.1mm and 0.5mm. The middle is an insulating and thermally conductive layer 303, with a thermal conductivity of 8W / m·K to 30W / m·K, and a thickness between 0.1mm and 0.3mm, providing sufficient insulation strength while maintaining low thermal resistance. The bottom copper layer, i.e., the lower surface copper layer 302, has a thickness between 0.3mm and 2mm. Figure 2Compared to existing discrete devices with ceramic copper-clad substrates as the inner insulation layer, the thermal resistance of the device in this embodiment is further reduced through material optimization. Moreover, the device's reliability is superior to existing discrete devices with ceramic copper-clad substrates for inner insulation, based on a lower coefficient of thermal expansion mismatch (between injection-molded epoxy EMC and substrate: EMC's CTE 12-17ppm / K, integrated metal substrate 17ppm / K, and alumina DBC approximately 7ppm / K).

[0052] The discrete device described in this application is compatible with traditional TO-series discrete devices, such as TO247, TO-247plus, TO263, TO-3P, TO-264, TO-252, and TO-220, which reduces thermal resistance and simplifies installation. The bottom copper layer is insulated from the internal chip, eliminating the need for subsequent installation of insulating sheets required for traditional discrete devices.

[0053] The present invention has been described in detail above through specific embodiments, but these are not intended to limit the present invention. Many modifications and improvements can be made by those skilled in the art without departing from the principles of the present invention, and these should also be considered within the scope of protection of the present invention.

Claims

1. An internally insulated discrete device, characterized in that, include: Integrated insulating and thermally conductive metal base plate; The integrated insulating and thermally conductive metal base plate includes an upper copper layer, an insulating and thermally conductive layer, and a lower copper layer. The insulating and thermally conductive layer is located between the upper surface copper layer and the lower surface copper layer; The lower surface of the insulating and thermally conductive layer is in contact with the upper surface of the lower surface copper layer and has a first fixed contact structure. The lower surface of the upper surface copper layer is in contact with the upper surface of the insulating and thermally conductive layer and has a second fixed contact structure. Both the first fixed contact structure and the second fixed contact structure are hot-pressed bonding structures. The upper copper layer has a chip mounting area and an electrical connection pattern of the circuit topology; The thickness of the lower surface copper layer is greater than the thickness of the upper surface copper layer; The maximum thickness of the copper layer on the lower surface is greater than 0.3 mm; The maximum thickness of the copper layer on the upper surface is greater than 0.3 mm.

2. The internally insulated discrete device of claim 1, wherein: The maximum thickness of the insulating and thermally conductive layer is less than 0.38 mm.

3. The internally insulated discrete device of claim 1, wherein: The thickness of the copper layer on the lower surface is 0.2 mm to 2 mm.

4. The internally insulated discrete device of claim 1, wherein: The thickness of the copper layer on the upper surface is 0.1mm to 0.5mm.

5. The internally insulated discrete device of claim 2, wherein: The thickness of the insulating and thermally conductive layer is 0.1 mm to 0.3 mm.

6. The internally insulated discrete device of claim 1, wherein: The insulating and thermally conductive layer is an epoxy composite material layer with a thermal conductivity of 8 W / m·K to 30 W / m·K.

7. The internally insulated discrete device of claim 1, wherein, Also includes: The chip is mounted in the chip mounting area.

8. The internally insulated discrete device of claim 1, wherein, Also includes: The heat sink is in contact with the lower surface of the lower copper layer.

9. The internally insulated discrete device of claim 1, wherein: It adopts the TO-series packaging structure.

10. The internally insulated discrete device as described in claim 9, characterized in that: The TO-series packaging structures include: TO247, TO-247plus, TO263, TO-3P, TO-264, TO-252, and TO-220.

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