A multi-chip package structure

Abstract

This utility model relates to the field of chip packaging technology, specifically to a multi-chip packaging structure, including a flexible substrate, at least two chips, a packaging plate, and a support member. The flexible substrate is folded to form at least two opposing mounting surfaces. The chips are connected to the mounting surfaces, and a heat sink is provided on the second mounting surface, with a gap between the two heat sinks. The packaging plate has ventilation slots, and the ventilation slots and the gaps between the heat sinks are connected to form convection. The support member has an airflow cavity, and the airflow cavity and the ventilation slots are interconnected. Through the mounting surfaces formed by the folding of the flexible substrate, multiple chips are respectively mounted on two mounting surfaces, and the heat sinks on the two chips are spaced apart. While achieving stacking of multiple chips in the height direction, the spaced heat sinks dissipate heat from the chips. Simultaneously, the airflow cavity and the gaps between the ventilation slots and the heat sinks create convection, further improving the heat dissipation efficiency of the chips.

Description

Technical Field

[0001] This utility model relates to the field of chip packaging technology, specifically to a multi-chip packaging structure. Background Technology

[0002] With the increasing demand for high integration, miniaturization, and multi-functionality in intelligent sensing products for high-voltage transmission lines, power monitoring devices are required to achieve mechatronics design to reduce size, enrich functionality, and improve reliability. The package size of microelectronic chips used in power monitoring devices is constantly shrinking, while the package density is continuously increasing. Due to the limitations of package dimensions, traditional two-dimensional planar packaging methods, which place chips with different functional modules within a package, cannot achieve a sufficiently small package size. Therefore, three-dimensional stacking of chips in the height direction is a trend in packaging design. Three-dimensional packaging structures not only achieve higher package density but also offer advantages such as more functions, faster transmission speeds, lower power consumption, and better performance and reliability.

[0003] Currently, there are various types of 3D chip packaging structures, such as SiP, PoP, and TSV. These structures include stacking bare chips of different sizes layer by layer in a pyramid shape, vertically stacking chips of similar sizes, or staggered layer-by-layer stacking. However, existing 3D chip packaging structures often suffer from poor heat dissipation due to the lack of heat dissipation pathways between chips, resulting in low heat dissipation efficiency. Utility Model Content

[0004] The technical solution adopted by this utility model to solve its technical problem is: to provide a multi-chip packaging structure, including:

[0005] A flexible substrate, which is folded to form at least two opposing mounting surfaces, wherein the mounting surfaces are provided with patterned circuit layers;

[0006] At least two chips, each corresponding to a patterned circuit layer and electrically connected to the patterned circuit layer, each chip having a first connection surface and a second connection surface, the first connection surface being connected to a mounting surface, the second connection surface having a heat sink, the second connection surfaces of the two chips being arranged opposite to each other, and a gap being left between the corresponding heat sinks of the two chips.

[0007] At least two encapsulation plates are connected to the sidewall of the folded flexible substrate. The encapsulation plates are provided with ventilation slots, and the ventilation slots and the heat dissipation cover are connected to form convection.

[0008] A support member is provided with an airflow cavity, and the airflow cavity is provided with a plurality of through slots corresponding to and communicating with the heat dissipation cover. The airflow cavity and the through slots are interconnected.

[0009] Furthermore, passive components are connected to the flexible substrate.

[0010] Furthermore, the airflow cavity is provided with a through slot two corresponding to the passive element.

[0011] Furthermore, it also includes a blocking positioning component, which is disposed between the chip and the passive component. The blocking positioning component includes an inclined shielding portion one, the projection area of ​​which on the chip and the heat sink is larger than the range of solder splashes on the chip.

[0012] Furthermore, the blocking positioning member also includes a second blocking part, which is closer to the passive element than the first blocking part. The length of the first blocking part is greater than that of the second blocking part. The support member has a protrusion corresponding to the second blocking part. When the support member is bonded to the flexible substrate, the protrusion presses on the first and second blocking parts, and the protrusion is located between two adjacent first blocking parts.

[0013] Furthermore, the second connection surface of the chip and the flexible substrate are connected by flip-chip bonding.

[0014] Furthermore, the flexible substrate is a flexible circuit substrate with patterned circuit layers on both sides.

[0015] Furthermore, the first connection surface is provided with bumps, through which the chip is soldered to the mounting surface; the second connection surface is provided with solder, through which the chip is soldered to the heat sink.

[0016] Furthermore, a solder ball array is provided on the side of the flexible substrate away from the chip, and the flexible substrate is connected to the PCB board through the solder ball array.

[0017] Furthermore, the mounting surface is also provided with a molding layer corresponding to the chip, and the molding layer can cover the outer surface of the chip.

[0018] The beneficial effects of this utility model are as follows: by forming two opposing mounting surfaces after the flexible substrate is folded, multiple chips are mounted on the two mounting surfaces in opposite postures, and the heat dissipation covers on the two chips are spaced apart. While realizing the stacking of multiple chips in the height direction, the spaced heat dissipation covers dissipate heat from the chips. At the same time, the airflow cavity on the support and the ventilation groove on the packaging board and the space between the heat dissipation covers form convection, further improving the heat dissipation efficiency of the chips. Attached Figure Description

[0019] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0020] In the picture: Figure 1 An overall structural diagram of a multi-chip packaging structure provided by this utility model;

[0021] Figure 2 for Figure 1 A cross-sectional view of the multi-chip package structure shown from the front view direction;

[0022] Figure 3 for Figure 1 A cross-sectional view of the multi-chip package structure shown from the side;

[0023] Figure 4 for Figure 1 The cross-sectional view of a portion of the multi-chip package structure shown is taken on an unfolded flexible substrate.

[0024] Figure 5 for Figure 2 The three-dimensional structural diagram of the support component is shown.

[0025] Figure 6 for Figure 1 The diagram shows a three-dimensional structural representation of a portion of a multi-chip package structure.

[0026] Figure 7 This is a cross-sectional view of a multi-chip package structure provided in another embodiment of the present invention.

[0027] Explanation of reference numerals in the attached drawings: 10, flexible substrate; 11, mounting surface; 12, passive component; 13, solder ball array; 20, chip; 21, connection surface one; 211, bump; 22, connection surface two; 221, heat sink; 30, encapsulation board; 31, venting groove; 40, support member; 41, airflow cavity; 411, through groove one; 412, through groove two; 42, protrusion; 50, blocking positioning member; 51, shielding part one; 52, shielding part two. Detailed Implementation

[0028] To make the technical problem to be solved, the technical solution, and the beneficial effects of this utility model clearer, the present utility model will now be described in detail with reference to the accompanying drawings. This drawing is a simplified schematic diagram, illustrating only the basic aspects of the present utility model, and therefore only shows the components relevant to the present utility model. Obviously, the described embodiments are only some, not all, of the embodiments of this utility model. All other embodiments obtained by those skilled in the art based on the embodiments of this utility model without creative effort are within the scope of protection of this utility model.

[0029] Please refer to Figure 1 and Figure 2This invention provides a multi-chip packaging structure, including a flexible substrate 10, at least two chips 20, at least two packaging plates 30, and a support member 40. A solder ball array 13 is provided on the side of the flexible substrate 10 away from the chips 20, and the flexible substrate 10 is connected to a PCB board via the solder ball array 13. The flexible substrate 10 is folded to form at least two opposing mounting surfaces 11, and a patterned circuit layer (not shown in the figure) is provided on the mounting surfaces 11. The chips 20 correspond to the patterned circuit layers and are electrically connected. Each chip 20 has a first connection surface 21 and a second connection surface 22. The first connection surface 21 is connected to the mounting surfaces 11, and a heat sink 221 is provided on the second connection surface 22. The second connection surfaces 22 of the two chips 20 are arranged opposite each other, and a gap is left between the corresponding heat sinks 221 of the two chips 20. The second connection surface 22 of the chips 20 and the flexible substrate 10 are connected by flip-chip bonding.

[0030] Specifically, the flexible substrate 10 is a flexible circuit substrate with patterned circuit layers on both sides. Connecting surface 21 has bumps 211, through which the chip 20 is soldered to the mounting surface 11. Connecting surface 22 has solder (not shown in the figure), through which the chip 20 is soldered to the heat sink 221. Specifically, in this embodiment, the bumps 211 are copper pillars bonded using a hot-pressing process.

[0031] The mounting surface 11 is also provided with a molding compound (not shown in the figure) corresponding to the chip 20, and the molding compound can cover the outer surface of the chip 20, making the chip 20 less prone to shaking during the packaging process. The molding compound is made of epoxy resin molding compound.

[0032] Please refer to Figure 2 and Figure 5 A passive element 12 is connected to the flexible substrate 10. The airflow cavity 41 is provided with a second through slot 412 corresponding to the passive element 12. The second through slot 412 allows airflow to pass through the passive element 12, which facilitates the heat dissipation of the passive element 12.

[0033] Specifically, passive component 12 is typically a resistor, capacitor, inductor, etc., which does not actively generate energy. It usually functions to adjust circuit parameters or as a component of the electronic system within the chip 20 package structure. Taking a capacitor as an example, the function of passive component 12 in this case is to provide signal coupling, filtering, isolation, tuning, switching, and multiplexing in the electronic circuit. In this embodiment, the type of passive component 12 is not limited.

[0034] Specifically, in this embodiment, the flexible substrate 10 is folded in half to form a shape as shown in the figure. Figure 1 and Figure 2 The folded structure shown forms two opposing mounting surfaces 11. In some other embodiments, the flexible substrate 10 can also be folded as follows: Figure 7The three-fold structure shown here has four mounting surfaces 11.

[0035] like Figure 3 As shown, when the flexible substrate 10 is folded to form two opposing mounting surfaces 11, multiple chips 20 are placed on each mounting surface 11.

[0036] like Figure 2 , Figure 3 and Figure 5 The encapsulation plate 30 is connected to the side wall of the folded flexible substrate 10. The encapsulation plate 30 has venting grooves 31, which communicate with the heat sink 221 to form convection. The support member 40 has an airflow cavity 41, which has multiple through slots 411 corresponding to and communicating with the heat sink 221. The airflow cavity 41 and the venting grooves 31 are interconnected. Specifically, the encapsulation plate 30 and the flexible substrate 10 are bonded together with adhesive. When the flexible substrate 10 is folded to form two opposing mounting surfaces 11, two encapsulation plates 30 are provided, each located on one of the opposing sides of the cavity formed after the flexible substrate 10 is folded. Specifically, both the support member 40 and the encapsulation plate 30 are made of one or more materials selected from copper, aluminum, alumina, and boron nitride.

[0037] Two opposing mounting surfaces 11 are formed by folding the flexible substrate 10. Multiple chips 20 are mounted on the two mounting surfaces 11 in opposite postures, with the heat dissipation covers 221 on the two chips 20 spaced apart. While stacking multiple chips 20 in the height direction, the spaced heat dissipation covers 221 dissipate heat from the chips 20. At the same time, convection is formed by the airflow cavity 41 on the support member 40 and the ventilation groove 31 on the packaging board 30 and the space between the heat dissipation covers 221, which further improves the heat dissipation efficiency of the chips 20.

[0038] Please refer to Figure 2 , Figure 4 and Figure 6 The multi-chip package structure also includes a blocking positioning member 50, which is disposed between the chip 20 and the passive element 12. The blocking positioning member 50 includes an inclined shielding portion 51, the projected area of ​​which on the chip 20 and the heat sink 221 is larger than the range of solder splashes on the chip 20. Specifically, in this embodiment, a passive element 12 is provided between every two chips 20 that are opposite each other after the flexible substrate 10 is folded. Therefore, each passive element 12 corresponds to two blocking positioning members 50.

[0039] Please refer to Figure 4The shielding portion 51 is tilted toward the chip 20. Specifically, the end of the shielding portion 51 closer to the flexible substrate 10 is farther away from the chip 20 than the end of the shielding portion 51 farther away from the flexible substrate 10. This increases the shielding effect on the splashed solder while reducing the length of the blocking positioning member 50 along the thickness direction of the flexible substrate 10. This reduces the size of the flexible substrate 10 along the length direction of the chip 20 after folding, making it easier for the flexible substrate 10 to fold to form more mounting surfaces 11 to mount more chips 20.

[0040] By providing the shielding part 51, when the solder on the chip 20 is melted by reflow soldering to solder the heat sink 221 to the chip 20, the shielding part 51 shields the liquid solder that may splash, reducing the damage of the splashed liquid solder to the passive component 12.

[0041] Please refer to Figure 2 and Figure 4 The blocking and positioning member 50 also includes a second blocking portion 52, which is closer to the passive element 12 than the first blocking portion 51. The length of the first blocking portion 51 is greater than that of the second blocking portion 52. The support member 40 has a protrusion 42 corresponding to the second blocking portion 52. When the support member 40 and the flexible substrate 10 are bonded, the protrusion 42 presses on the first blocking portion 51 and the second blocking portion 52, and the protrusion 42 is located between two adjacent first blocking portions 51. Specifically, the airflow cavity 41 and the first and second through slots 411 and 412 are all located on the protrusion 42.

[0042] With the provision of the second shielding part 52, due to the length difference between the second shielding part 52 and the first shielding part 51, the first shielding part 51 and the second shielding part 52 cooperate to form a slot, which facilitates the positioning of the support member 40 when the flexible substrate 10 is folded and bonded to the support member 40.

[0043] Specifically, in this embodiment, the blocking positioning element 50 is made of a metal or alloy material with good corrosion resistance to the metal layer material, such as gold, copper, aluminum, tungsten, etc. The blocking positioning elements 50 made of these materials can be glued to the flexible substrate 10.

[0044] The packaging process of the multi-chip package structure provided by this utility model includes: S1, soldering multiple chips 20 to the corresponding patterned circuit layers on the flexible substrate 10 through bumps 211 and making them electrically connected to the corresponding patterned circuit layers. Then, soldering the passive component 12 to the corresponding position on the flexible substrate 10.

[0045] S2. The heat sink 221 is soldered to the corresponding connection surface 22 of the chip 20 by reflow soldering, and then the encapsulation liquid is poured onto the chip 20 so that the encapsulation liquid cures and covers the outer surface of the chip 20.

[0046] S3. Fold the flexible substrate 10 so that multiple chips 20 are facing each other, with a gap between the heat dissipation covers 221 on the facing chips 20.

[0047] S4. Adhere the encapsulation board 30 and the support member 40 to the folded flexible substrate 10 with glue.

Claims

1. A multi-chip packaging structure, characterized in that, include: A flexible substrate, which is folded to form at least two opposing mounting surfaces, wherein the mounting surfaces are provided with patterned circuit layers; At least two chips, each corresponding to a patterned circuit layer and electrically connected to the patterned circuit layer, each chip having a first connection surface and a second connection surface, the first connection surface being connected to a mounting surface, the second connection surface having a heat sink, the second connection surfaces of the two chips being arranged opposite to each other, and a gap being left between the corresponding heat sinks of the two chips. At least two encapsulation plates are connected to the sidewall of the folded flexible substrate. The encapsulation plates are provided with ventilation slots, and the ventilation slots and the heat dissipation cover are connected to form convection. A support member is provided with an airflow cavity, and the airflow cavity is provided with a plurality of through slots corresponding to and communicating with the heat dissipation cover. The airflow cavity and the through slots are interconnected.

2. The multi-chip packaging structure according to claim 1, characterized in that: Passive components are connected to the flexible substrate.

3. The multi-chip packaging structure according to claim 2, characterized in that: The airflow cavity is provided with a through slot two corresponding to the passive element.

4. The multi-chip packaging structure according to claim 2, characterized in that: It also includes a blocking positioning component, which is disposed between the chip and the passive component. The blocking positioning component includes an inclined shielding part, the projection area of ​​which on the chip and the heat sink is larger than the range of solder splashes on the chip.

5. The multi-chip packaging structure according to claim 4, characterized in that: The blocking positioning member also includes a second blocking part, which is closer to the passive element than the first blocking part. The length of the first blocking part is greater than that of the second blocking part. The support member has a protrusion corresponding to the second blocking part. When the support member is bonded to the flexible substrate, the protrusion presses on the first and second blocking parts, and the protrusion is located between two adjacent first blocking parts.

6. The multi-chip packaging structure according to claim 1, characterized in that: The chip's second connection surface and the flexible substrate are connected by flip-chip bonding.

7. The multi-chip packaging structure according to claim 1, characterized in that: The flexible substrate is a flexible circuit substrate with patterned circuit layers on both sides.

8. The multi-chip packaging structure according to claim 6, characterized in that: The first connection surface is provided with bumps, and the chip is soldered to the mounting surface through the bumps. The second connection surface is provided with solder, and the chip is soldered to the heat sink through the solder.

9. The multi-chip packaging structure according to claim 1, characterized in that: The flexible substrate has a solder ball array on the side away from the chip, and the flexible substrate is connected to the PCB board through the solder ball array.

10. The multi-chip packaging structure according to claim 1, characterized in that: The mounting surface is also provided with a molding compound corresponding to the chip, and the molding compound can cover the outer surface of the chip.

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