Chip package structure for preventing solder splashing
Patent Information
- Application Number
- CN202522262855.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-27
- Publication Date
- 2026-09-18
- Estimated Expiration
- 2035-10-27
AI Technical Summary
[0003]但现有技术中的阻挡机构通常设置为固定高度,由于芯片上的焊料在焊接完成最终固化之前厚度并不能确定,若设置固定高度的阻挡机构,容易导致阻挡机构的高度过高或过低
[0019]The beneficial effects of this invention are as follows: By using a blocking mechanism formed by the overlapping of a relatively movable first and second barrier wall, the height of both the first and second barrier walls is lower than the sum of the heights of the chip and solder during solidification, thus reducing the risk of poor soldering results due to excessive height of the blocking mechanism. Furthermore, by adjusting the overlap of the first and second barrier walls, the blocking mechanism formed by their cooperation is matched to the final solidification height of the liquid solder. This ensures effective blocking of splashed liquid solder while avoiding the risk of short-circuit failure of the chip caused by excessive compression of the liquid solder due to insufficient height, as seen in existing technologies.
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Figure CN224775408U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of chip packaging technology, and specifically to a chip packaging structure that prevents solder splashing. Background Technology
[0002] FCBGA (Flip Chip Ball Grid Array) packaged products include a substrate, chips and passive components mounted on the substrate, and a heat dissipation structure, typically using a surface-mount heat sink. To improve heat dissipation efficiency, heat sinks with good thermal conductivity, such as indium foil, are usually used as solder. The chips and heat sinks are then soldered together via reflow soldering using flux, thereby improving heat dissipation. However, flux is volatile, and indium foil and other heat sinks have low melting points. During reflow, the flux continuously releases gases. These gases displace the molten solder, causing it to overflow and splash onto the passive components also located on the substrate, potentially leading to short circuits. Therefore, existing technologies often incorporate a blocking mechanism between the passive components and the chip to prevent the splashed molten solder.
[0003] However, existing blocking mechanisms are typically set to a fixed height. Since the thickness of the solder on the chip cannot be determined before final solidification, a fixed-height blocking mechanism can easily result in it being too high or too low. If the blocking mechanism is too high, exceeding the sum of the chip and solder heights at final solidification, there will still be a gap or void between the top of the liquid solder and the heatsink, leading to poor soldering and affecting the heatsink's heat dissipation effect on the chip. If the blocking mechanism is too low, below the sum of the chip and solder heights at final solidification, it may not effectively block splashed liquid solder. Furthermore, during bonding, the heatsink may squeeze the liquid solder downwards, causing the actual solidified height to be less than the preset solidification height. As the liquid solder solidifies, it becomes thinner, and excess liquid solder flows down along the chip's edge to the space between the chip and the substrate, creating unnecessary conductive paths and potentially causing a short circuit. Utility Model Content
[0004] The technical solution adopted by this utility model to solve its technical problem is: to provide a chip packaging structure that prevents solder splashing, comprising:
[0005] A substrate having a solder ball array on it, the substrate being connected to a PCB board via the solder ball array;
[0006] A chip, which is connected to a substrate and has solder on it;
[0007] At least one passive element, said passive element being connected to a substrate;
[0008] A heat sink cover is bonded to a substrate, and the projected area of the heat sink cover on the substrate is sufficient to cover the chip and passive components.
[0009] The first blocking mechanism includes a first blocking wall disposed on the heat sink cover and a second blocking wall disposed on the substrate. Both the first blocking wall and the second blocking wall are located between the chip and the passive component. The height of the first blocking wall and the height of the second blocking wall are both lower than the sum of the heights of the chip and the solder when they are solidified. When the heat sink cover is soldered to the chip with solder, the first blocking wall and the second blocking wall overlap each other, and the projected area of the first blocking wall and the second blocking wall on the chip and the solder is greater than the range of solder splash on the chip.
[0010] Furthermore, the first barrier is closer to the chip than the second barrier, and the side of the first barrier facing the chip has multiple storage slots.
[0011] Furthermore, there are gaps between the first blocking mechanism and the chip, and between the first blocking mechanism and the passive element.
[0012] Furthermore, an adhesive ring is pre-coated on the substrate, and the heat dissipation cover is bonded to the substrate through the adhesive ring.
[0013] Furthermore, it also includes a support mechanism, which includes a support member disposed between the adhesive ring and the passive component, the top of which is used to support the heat sink cover.
[0014] Furthermore, the support member is provided with a flow guiding surface, and the heat dissipation cover is provided with an injection hole corresponding to the flow guiding surface.
[0015] Furthermore, the height of the support member is equal to the height of the glue ring after curing.
[0016] Furthermore, the heat dissipation cover is also provided with an injection hole two, which corresponds to the periphery of the chip.
[0017] Furthermore, the chip has bumps at its bottom end, and the chip is soldered to the substrate through the bumps.
[0018] Furthermore, a filler layer is provided between the substrate and the chip, which is used to fill the gap between the bumps and the substrate.
[0019] The beneficial effects of this invention are as follows: By using a blocking mechanism formed by the overlapping of a relatively movable first and second barrier wall, the height of both the first and second barrier walls is lower than the sum of the heights of the chip and solder during solidification, thus reducing the risk of poor soldering results due to excessive height of the blocking mechanism. Furthermore, by adjusting the overlap of the first and second barrier walls, the blocking mechanism formed by their cooperation is matched to the final solidification height of the liquid solder. This ensures effective blocking of splashed liquid solder while avoiding the risk of short-circuit failure of the chip caused by excessive compression of the liquid solder due to insufficient height, as seen in existing technologies. Attached Figure Description
[0020] The present invention will be further described below with reference to the accompanying drawings and embodiments.
[0021] In the picture: Figure 1 An overall structural diagram of a chip packaging structure for preventing solder splashing provided by this utility model;
[0022] Figure 2 for Figure 1 A cross-sectional view of a chip package structure designed to prevent solder splashing;
[0023] Figure 3 for Figure 2 Enlarged view of point A in the middle;
[0024] Figure 4 for Figure 1 Top view of the structure shown;
[0025] Figure 5 for Figure 1 The diagram shows the overall structure of the chip packaging structure that prevents solder splashing, and the 3D structure diagram after hiding some parts of the structure.
[0026] Explanation of reference numerals in the attached drawings: 10, substrate; 11, solder ball array; 12, adhesive ring; 20, heat sink; 21, injection hole one; 22, injection hole two; 31, first barrier; 311, storage tank; 32, second barrier; 40, chip; 41, solder; 42, bump; 50, passive component; 60, filler adhesive layer; 71, support; 711, guide surface; Detailed Implementation
[0027] To make the technical problem to be solved, the technical solution, and the beneficial effects of this utility model clearer, the present utility model will now be described in detail with reference to the accompanying drawings. This drawing is a simplified schematic diagram, illustrating only the basic aspects of the present utility model, and therefore only shows the components relevant to the present utility model. Obviously, the described embodiments are only some, not all, of the embodiments of this utility model. All other embodiments obtained by those skilled in the art based on the embodiments of this utility model without creative effort are within the scope of protection of this utility model.
[0028] Please refer to Figure 1 and Figure 2 This utility model provides a chip packaging structure to prevent solder splashing, including a substrate 10, a heat sink 20, a first blocking mechanism, a chip 40 connected to the substrate 10, and a passive component 50. The substrate 10 is provided with a solder ball array 11, and the substrate 10 is connected to the PCB board through the solder ball array 11. At least one passive component 50 is provided.
[0029] Specifically, passive components 50 are typically resistors, capacitors, inductors, etc., which do not actively generate energy and usually function in the chip 40 package structure to adjust circuit parameters or as a component of the electronic system. Taking a capacitor as an example, the function of passive component 50 in this case is to provide signal coupling, filtering, isolation, tuning, switching, and multiplexing in the electronic circuit. The type of passive component 50 is not limited in this embodiment. In other embodiments not shown, some passive components 50 may be replaced by chip 40.
[0030] Please refer to Figure 2 The chip 40 has solder 41 on it and bumps 42 at its bottom end. The chip 40 is soldered to the substrate 10 through the bumps 42. Specifically, in this embodiment, the solder 41 and the bumps 42 are located at opposite ends of the chip 40 in the thickness direction. The bumps 42 are copper pillars bonded using a hot-pressing process.
[0031] Please refer to Figure 2 A filler layer 60 is also provided between the substrate 10 and the chip 40. The filler layer 60 is used to fill the gap between the bump 42 and the substrate 10. The filler layer 60 is made of epoxy resin.
[0032] Please refer to Figure 4 The heat sink 20 and the substrate 10 are bonded together, and the projected area of the heat sink 20 on the substrate 10 can cover the chip 40 and the passive component 50. Specifically, an adhesive ring 12 is pre-coated on the substrate 10, and the heat sink 20 is bonded to the substrate 10 through the adhesive ring 12. Specifically, the adhesive ring 12 is made of thermally conductive adhesive.
[0033] Please refer to Figure 2 and Figure 3The first blocking mechanism includes a first barrier 31 disposed on the heat sink 20 and a second barrier 32 disposed on the substrate 10. Both the first barrier 31 and the second barrier 32 are located between the chip 40 and the passive component 50. The height of the first barrier 31 and the height of the second barrier 32 are both lower than the sum of the heights of the chip 40 and the solder 41 when they are solidified. When the heat sink 20 is soldered to the chip 40 through the solder 41, the first barrier 31 and the second barrier 32 overlap each other, and the projected area of the first barrier 31 and the second barrier 32 on the chip 40 and the solder 41 is greater than the range of solder 41 splashing on the chip 40.
[0034] The blocking mechanism is formed by the overlapping of the relatively movable first baffle 31 and the second baffle 32. Since the height of the first baffle 31 and the height of the second baffle 32 are both lower than the sum of the heights of the chip 40 and the solder 41 when they are solidified, the problem of poor soldering effect caused by the excessive height of the blocking mechanism is not easily caused. At the same time, by adjusting the overlap of the first baffle 31 and the second baffle 32, the blocking mechanism formed by the first baffle 31 and the second baffle 32 is adapted to the final solidification height of the liquid solder 41. This ensures the blocking effect on the splashed liquid solder 41, while avoiding the risk of the liquid solder being excessively squeezed due to insufficient height in the blocking mechanism of the prior art, which would thin out and overflow during final solidification, causing short circuit failure of the chip.
[0035] Specifically, in this embodiment, the first barrier 31 and the second barrier 32 are made of metal or alloy materials with good corrosion resistance to metal layer materials, such as gold, copper, aluminum, tungsten, etc. The first barrier 31 and the second barrier 32 made of these materials can be glued to the heat dissipation cover 20 or the substrate 10.
[0036] Please refer to Figure 5 The first barrier 31 is closer to the chip 40 than the second barrier 32, and the side of the first barrier 31 facing the chip 40 is provided with multiple storage slots 311. The storage slots 311 increase the contact area of the first barrier 31 with the splashed liquid solder 41, thereby further improving the blocking effect on the splashed liquid solder 41.
[0037] Because the thermal expansion coefficients of chip 40, passive component 50, and the first blocking mechanism are different, they expand to different degrees when heated during reflow soldering, generating stress. If these components come into contact with each other, it can easily lead to breakage and failure at the contact points. Therefore, please refer to... Figure 4 There are gaps between the first blocking mechanism and the chip 40, and between the first blocking mechanism and the passive element 50.
[0038] To prevent the heat sink 20 from tilting relative to the substrate 10 before the solder 41 and adhesive ring 12 have fully cured, thus affecting heat dissipation efficiency, please refer to... Figure 2 and Figure 3The chip packaging structure for preventing solder splatter also includes a support mechanism. This support mechanism includes a support member 71 disposed between the adhesive ring 12 and the passive component 50. The top of the support member 71 is used to support the heat sink 20. Specifically, in this embodiment, there is one chip 40 and two passive components 50, with the two passive components 50 respectively disposed on both sides of the length of the chip 40. Correspondingly, to ensure stable support for the heat sink 20, two support members 71 and two passive components 50 are also provided.
[0039] Please refer to Figure 3 The support member 71 is provided with a flow guiding surface 711, and the heat sink 20 is provided with an injection hole 21 corresponding to the flow guiding surface 711. The heat sink 20 is also provided with an injection hole 22, which corresponds to the periphery of the chip 40. In this embodiment, the number of injection holes 21 and injection holes 22 is not limited, and the number of injection holes 21 and injection holes 22 in the figure is only for illustration.
[0040] The chip packaging structure for preventing solder splashing described in this embodiment also includes a molding compound (not shown in the figure). Molding liquid is injected along injection holes 21 and 22 on the heat sink 20, covering the chip 40, the passive component 50, and the top of the heat sink 20. After curing, the molding compound is finally formed. The molding compound protects the heat sink 20 and the chip 40 from external environmental influences. The molding compound uses epoxy resin molding material.
[0041] Specifically, the guide surface 711 is set at an angle, such as... Figure 3 As shown, the diameter of injection hole 21 is larger than the maximum width of the cross-section of support member 71 to ensure that when the encapsulating liquid is injected along injection hole 21, it is easy for the encapsulating liquid to be poured into the space between heat sink 20 and substrate 10 along the guide surface 711. Support member 71 has a U-shaped structure in top view. The top end of support member 71 contacts heat sink 20 and supports heat sink 20. There are two guide surfaces 711 on support member 71 in pairs about the vertical center line of cross-section of support member 71. The end of guide surface 711 closer to heat sink 20 is closer to the vertical center line of cross-section of support member 71 than the end of guide surface 711 further away from heat sink 20, so there is no need to set an additional injection hole for encapsulating liquid between adhesive ring 12 and support member 71. When the molding compound is injected from injection hole 21 between the heat sink 20 and the substrate 10, the two guiding surfaces 711 guide the molding compound to the space between the adhesive ring 12 and the support 71, and between the support 71 and the passive component 50, respectively, reducing the processing difficulty.
[0042] To avoid the problem of poor soldering results due to excessive height of the support component 71, which could lead to a gap or void between the top of the liquid solder 41 and the heat sink 20 after solidification, please refer to... Figure 3The height of the support member 71 is equal to the height of the adhesive ring 12 after curing, that is, the height of the support member 71 is equal to the sum of the heights of the chip 40 and the solder 41 when they are cured. Preferably, in this embodiment, the height of the support member 71 is equal to the height of the adhesive ring 12 after curing, and in order to leave space for the adhesive ring 12 to be squeezed and deformed by the heat sink 20, a gap is provided between the support member 71 and the adhesive ring 12.
Claims
1. A chip packaging structure for preventing solder splashing, characterized in that, include: A substrate having a solder ball array on it, the substrate being connected to a PCB board via the solder ball array; A chip, which is connected to a substrate and has solder on it; At least one passive element, said passive element being connected to a substrate; A heat sink cover is bonded to a substrate, and the projected area of the heat sink cover on the substrate is sufficient to cover the chip and passive components. The first blocking mechanism includes a first blocking wall disposed on the heat sink cover and a second blocking wall disposed on the substrate. Both the first blocking wall and the second blocking wall are located between the chip and the passive component. The height of the first blocking wall and the height of the second blocking wall are both lower than the sum of the heights of the chip and the solder when they are solidified. When the heat sink cover is soldered to the chip with solder, the first blocking wall and the second blocking wall overlap each other, and the projected area of the first blocking wall and the second blocking wall on the chip and the solder is greater than the range of solder splash on the chip.
2. The chip package structure for preventing solder splashing according to claim 1, wherein: The first barrier is closer to the chip than the second barrier, and the side of the first barrier facing the chip has multiple storage slots.
3. The chip package structure for preventing solder splashing according to claim 2, wherein: There are gaps between the first blocking mechanism and the chip, and between the first blocking mechanism and the passive element.
4. The solder splash prevention chip package structure of claim 1, wherein: The substrate is pre-coated with an adhesive ring, and the heat dissipation cover is bonded to the substrate through the adhesive ring.
5. The solder splash prevention chip package structure of claim 4, wherein: It also includes a support mechanism, which includes a support member disposed between the adhesive ring and the passive component, the top of which is used to support the heat sink cover.
6. The solder splash prevention chip package structure of claim 5, wherein: The support member is provided with a flow guiding surface, and the heat dissipation cover is provided with an injection hole corresponding to the flow guiding surface.
7. The solder splash prevention chip package structure of claim 6, wherein: The height of the support is equal to the height of the glue ring after it has cured.
8. The solder splash prevention chip package structure of claim 7, wherein: The heat sink is also provided with an injection hole two, which corresponds to the periphery of the chip.
9. The solder splash prevention chip package structure of claim 1, wherein: The chip has bumps at its bottom end, and the chip is soldered to the substrate through the bumps.
10. The chip package structure for preventing solder splashing according to claim 9, wherein: A filler layer is also provided between the substrate and the chip, which is used to fill the gap between the bumps and the substrate.