A chip test socket for metal coaxial connection

Abstract

The utility model relates to a kind of chip test socket of metal coaxial connection, including metal support part, with metal end face and signal needle passage, signal needle passage has the interconnection side hole end of through metal end face;Insulating support part is connected in signal needle passage, insulating support part has insulating end face, and insulating end face has the interconnection area of exposing interconnection side hole end;Difference pair is connected on insulating support part, and difference pair includes P end signal needle and N end signal needle;Wherein, when chip testing, the interconnection area of insulating end face is opposite to the pad of chip, and the outer edge of the orthographic projection of the pad of chip on set projection plane falls on the orthographic projection of the interconnection area of insulating end face on set projection plane.The utility model can avoid the pad of chip and the metal support part of test socket to produce larger capacitive coupling when chip testing, meet the continuity of passage impedance, to meet the requirement of high-speed rate test interconnection.

Description

Technical Field

[0001] This utility model relates to the field of chip testing technology, and in particular to a chip testing socket with a metal coaxial connection. Background Technology

[0002] Functional testing of chips is an indispensable and crucial step in chip research and development and production. Chip test sockets are essential fixtures for functional testing; their function is to fix the chip in a specific position and establish electronic signal and current transmission between the solder balls on the chip and the PCB circuit board through connecting conductive probes, thereby achieving the purpose of chip testing. With increasingly dense chip I / O interfaces and ever-increasing signal rates, higher demands are being placed on chip test sockets.

[0003] Chinese invention patent CN116990666A discloses a coaxial test socket for 224Gbps ultra-high speed applications. The socket includes a metal body and a cover. The body has mounting holes, within which a first polymer positioning member mates. The first polymer positioning member has a first insertion hole and a second insertion hole, each containing a test probe. A second polymer positioning member is fixedly mounted within the cover. This second member has a signal pin channel that mates with the first positioning member and another signal pin channel that communicates with and mates with the end of the test probe. The height of the first polymer positioning member is less than the length of the test probe, achieving high dynamic bandwidth and high isolation for the ultra-high speed coaxial test socket. This test socket is designed for BGA or LGA chip packaging applications. For small-pitch special pin testing applications and interconnects, such as module packaging, carrier-to-carrier interconnects, and non-standard circular or solder ball packages, impedance-capacitance mismatch caused by the metal at the contact pins will fail to meet the continuity of channel impedance, resulting in low application bandwidth and failing to meet the requirements of high-speed test interconnects. Utility Model Content

[0004] Therefore, this utility model provides a chip test socket with metal coaxial connection, which avoids large capacitive coupling between the chip pads and the metal support part of the test socket during chip testing, meets the continuity of channel impedance, and thus meets the requirements of high-speed test interconnection.

[0005] To solve the above technical problems, this utility model provides a chip test socket with metal coaxial connection, including a metal support part, the metal support part having a metal end face facing the positive X-axis direction and a signal pin channel extending along the X-axis direction, the signal pin channel having an interconnect side hole end that passes through the metal end face; An insulating support portion is connected in the signal needle channel, and the insulating support portion has an insulating end face facing the positive X-axis direction; The insulating support portion is connected to a differential pair, which includes a P-end signal pin and an N-end signal pin. Both the P-end signal pin and the N-end signal pin extend along the X-axis direction and are arranged along the Y-axis direction. Both the P-end signal pin and the N-end signal pin have a needle tip facing the positive X-axis direction and a needle tail facing the negative X-axis direction. The needle tips of the P-end signal pin and the N-end signal pin extend out of the insulating end face. The insulating end face has an interconnect area that exposes the interconnect side hole end. During chip testing, the interconnect area of ​​the insulating end face is opposite to the chip's pads. The outer edge of the orthographic projection of the chip's pads on a set projection surface falls on the orthographic projection of the interconnect area of ​​the insulating end face on the set projection surface, which is perpendicular to the X-axis direction.

[0006] Furthermore, during chip testing, the distance between the edge of the interconnect region of the insulating end face projected onto the set projection surface and the edge of the chip's pad projected onto the set projection surface is not less than 5 mils.

[0007] Furthermore, the insulating support portion includes two insulating parts, which are respectively close to the two ends of the signal needle channel along the X-axis direction. An air cavity is formed between the two insulating parts. The tip and tail of the P-end signal needle are respectively connected to the two insulating parts, and the tip and tail of the N-end signal needle are respectively connected to the two insulating parts. The middle sections of the P-end signal needle and the N-end signal needle are located in the air cavity.

[0008] Furthermore, the dimension of the air cavity along the X-axis is not less than half the dimension of the P-end signal needle and the N-end signal needle along the X-axis.

[0009] Furthermore, the dimension of the signal needle channel along the Y-axis is larger than the dimension along the Z-axis, and the Z-axis is perpendicular to both the X-axis and Y-axis.

[0010] Furthermore, the dielectric constant of the insulating support portion is <3.2, and the loss tangent of the insulating support portion is less than 0.01.

[0011] Furthermore, the metal support portion is also provided with a grounding pin channel, which extends along the X-axis direction. A grounding pin is connected in the grounding pin channel, which extends along the X-axis direction. The grounding pin and the metal support portion constitute the return path of the P-end signal pin and the N-end signal pin.

[0012] Furthermore, the diameter of the grounding pin channel is larger than the diameter of the grounding pin, and the difference in diameter between the mating area of ​​the grounding pin channel and the grounding pin is no more than 3 mils.

[0013] Furthermore, the metal support portion includes a socket body and a socket cover. The socket cover is detachably connected to the positive X-axis side of the socket body. Both the socket body and the socket cover are provided with signal pin channels. The insulating support portion connects the signal pin channels of the socket body and the socket cover.

[0014] Furthermore, both the socket body and the socket cover are provided with grounding pin channels for the chip test socket, and the grounding pin connects the grounding pin channels of the socket body and the socket cover.

[0015] Compared with the prior art, the above-mentioned technical solution of this utility model has the following advantages: On the one hand, the chip test socket of this utility model allows for high coupling of the same differential pair located in the same signal pin channel, and different differential pairs located in different signal pin channels, effectively isolating different differential pairs. At a transmission rate of 28GHz, the crosstalk performance can meet the requirement of below -50dB. On the other hand, by completely misaligning the chip's pads with the metal end face of the metal support portion, and with the interconnection area of ​​the chip's pads facing the insulating end face of the insulating support portion, the pads can be kept away from the metal support portion, avoiding large capacitive coupling between the chip's pads and the metal support portion of the test socket during chip testing, thus satisfying the continuity of channel impedance and meeting the requirements of high-speed test interconnection. Attached Figure Description

[0016] To make the content of this utility model easier to understand, the present utility model will be further described in detail below with reference to specific embodiments and accompanying drawings.

[0017] Figure 1 This is an exploded view of the chip test socket in this utility model; Figure 2 This is a schematic diagram of the chip test socket assembly at one angle in this utility model; Figure 3 This is an assembly diagram of the chip test socket from another angle in this utility model; Figure 4 This is a top view of the chip test socket in this utility model; Figure 5 for Figure 4 Schematic diagram of section AA; Figure 6 for Figure 5 A magnified view of a section at point B in the middle; Figure 7This is a schematic diagram of the interconnected area in this utility model; Figure 8 The return loss curves of the chip sockets of this utility model and the prior art are shown. Figure 9 The insertion loss curves of the chip sockets of this utility model and the prior art are shown.

[0018] Explanation of reference numerals in the accompanying drawings: 1. Metal support part; 11. Metal end face; 12. Air cavity; 13. Socket body; 14. Socket cover; 15. First positioning pin; 16. Locking screw; 17. Second positioning pin; 21. Interconnection area; 31. P-terminal signal pin; 32. N-terminal signal pin; 41. Grounding pin. Detailed Implementation

[0019] The present invention will be further described below with reference to the accompanying drawings and specific embodiments, so that those skilled in the art can better understand and implement the present invention. However, the embodiments are not intended to limit the present invention.

[0020] See Figures 1 to 7 The image shows an embodiment of the metal coaxial connection chip test socket disclosed in this utility model.

[0021] The aforementioned metal coaxial connection chip test socket includes a metal support portion 1, which has a metal end face 11 facing the positive X-axis direction and a signal pin channel extending along the X-axis direction. The signal pin channel has an interconnect side hole end that passes through the metal end face 11. An insulating support portion (not shown in the figure) is connected in the above signal pin channel. The insulating support portion has an insulating end face facing the positive X-axis direction. The insulating end face has an interconnection area 21 that exposes the interconnection side hole end. A differential pair is connected to the aforementioned insulating support portion. The differential pair includes a P-end signal pin 31 and an N-end signal pin 32. Both the P-end signal pin 31 and the N-end signal pin 32 extend along the X-axis direction and are arranged along the Y-axis direction. Both the P-end signal pin 31 and the N-end signal pin 32 have a needle tip facing the positive X-axis direction and a needle tail facing the negative X-axis direction. The needle tip of the P-end signal pin 31 and the needle tip of the N-end signal pin 32 extend out of the aforementioned insulating end face. During chip testing, the interconnect region 21 of the insulating end face is opposite to the chip's pads. The outer edge of the chip's pads' orthogonal projection on a set projection surface falls on the orthogonal projection of the interconnect region 21 of the insulating end face on the set projection surface, which is perpendicular to the X-axis direction.

[0022] The aforementioned metal support portion 1 serves as the mounting base for the chip test socket and also provides shielding. The aforementioned insulating support portion isolates the metal support portion 1, the P-terminal signal pin 31, and the N-terminal signal pin 32 to prevent short circuits. The P-terminal signal pin 31 and the N-terminal signal pin 32 have the same shape, with the diameter of the middle section being larger than the diameter of the pin tip and tail. The insulating support portion prevents the P-terminal signal pin 31 and the N-terminal signal pin 32 from detaching from the insulating support portion.

[0023] During testing, the chip test socket is close to the chip, and the tips of the P-end signal pin 31 and the N-end signal pin 32 are in contact with the pins on the chip. The chip pins are connected to the circuit board through pads. The size of the pads is larger than the size of the pins. The chip pads are offset from the metal end face 11, thereby increasing the distance between the chip pads and the metal end face 11.

[0024] On the one hand, the same differential pair is located in the same signal pin channel, achieving high coupling. Different differential pairs are located in different signal pin channels, which can effectively isolate different differential pairs. At a transmission rate of 28GHz, the crosstalk performance can meet the requirement of below -50dB. On the other hand, by completely offsetting the chip's pads from the metal end face 11 of the metal support portion 1, and aligning the chip's pads with the interconnection area 21 of the insulating end face of the insulating support portion, the pads can be kept away from the metal support portion 1. This avoids large capacitive coupling between the chip's pads and the metal support portion 1 of the test socket during chip testing, ensuring the continuity of the channel impedance and thus meeting the requirements of high-speed test interconnection.

[0025] In this embodiment, during chip testing, the distance between the edge of the orthographic projection of the interconnect region 21 of the insulating end face onto the set projection surface and the edge of the orthographic projection of the chip's pad onto the set projection surface is not less than 5 mils.

[0026] The metal support portion 1 is used to form a shield between different differential pairs, and the insulating support portion is used to prevent short circuits and avoid large capacitive coupling between the chip pads and the metal support portion 1 of the test socket. Therefore, the metal support portion 1 and the insulating support portion should be designed reasonably to take into account the functions of the metal support portion 1 and the insulating support portion.

[0027] By ensuring that the distance between the edge of the orthographic projection of the interconnect region 21 of the insulating end face on the aforementioned set projection surface and the edge of the orthographic projection of the chip's pad on the aforementioned set projection surface is not less than 5 mils, the functions of both the metal support portion 1 and the insulating support portion can be better optimized.

[0028] In this embodiment, the insulating support portion includes two insulating parts, which are respectively close to the two ends of the signal needle channel along the X-axis direction. An air cavity 12 is formed between the two insulating parts. The head and tail of the P-end signal needle 31 are respectively connected to the two insulating parts, and the head and tail of the N-end signal needle 32 are respectively connected to the two insulating parts. The middle sections of the P-end signal needle 31 and the N-end signal needle 32 are located in the air cavity 12.

[0029] In traditional chip test sockets, the P-end signal pins and N-end signal pins of the same differential pair are isolated by a hole wall. Therefore, when the distance between the P-end and N-end signal pins is fixed, there is a significant limitation on the diameter of the P-end and N-end signal pins. In the chip test socket of this invention, since the insulating part only connects the two ends of the P-end signal pin 31 and the N-end signal pin 32, there is no isolation between the middle sections of the P-end signal pin 31 and the N-end signal pin 32 of the same differential pair. This reduces the limitation on the diameter of the signal pins, and the P-end signal pin 31 and the N-end signal pin 32 can be designed to be thicker.

[0030] For example, for signal pins with a 0.55-pitch pin spacing, the wall thickness between the second and third mounting holes in a traditional chip test socket is typically 0.05 mm, and the maximum diameter of the second and third mounting holes is 0.5 mm. In the chip test socket of this invention, the hole edge diameter can be increased to 0.64 mm, and the diameter of the signal pin can be increased by 20%.

[0031] On the one hand, thicker signal pins can improve the lifespan and stability of the signal pins and enhance their impedance matching. On the other hand, air cavity 12 can reduce the dielectric loss of the chip test socket.

[0032] In this embodiment, the size of the air cavity 12 along the X-axis is not less than half the size of the P-end signal pin 31 and the N-end signal pin 32 along the X-axis.

[0033] Since the signal pin channel between the two insulating parts is filled with air, the dielectric loss of air is relatively small. The larger the dimension of the signal pin channel between the two insulating parts along the X-axis, the more air is contained in the signal pin channel between the two insulating parts, and the less likely dielectric loss will be introduced. Specifically, the dimension of the air cavity 12 along the X-axis is not less than one-half, two-thirds, three-quarters, or four-fifths of the dimension of the P-end signal pin 31 and the N-end signal pin 32 along the X-axis.

[0034] In this embodiment, the dimension of the signal needle channel along the Y-axis is greater than the dimension along the Z-axis, and the Z-axis is perpendicular to both the X-axis and the Y-axis.

[0035] The aforementioned signal pin channel is used to connect the insulating support portion, which in turn connects the P-end signal pin 31 and the N-end signal pin 32. Since the P-end signal pin 31 and the N-end signal pins are arranged along the Y-axis, it is reasonable for the dimension of the signal pin channel along the Y-axis to be larger than its dimension along the Z-axis. The aforementioned insulating support portion is injected into the signal pin channel using potting compound to position the P-end signal pin 31 and the N-end signal pins. The signal pin channel has a cross-section perpendicular to the X-axis, and this cross-section is either waist-shaped or gourd-shaped. When the cross-section is waist-shaped, it has two symmetrical semi-circular sides and two symmetrical straight sides, with the concave sides of the two semi-circular sides facing each other, and the two straight sides tangentially connecting the two semi-circular sides. When the cross-section is gourd-shaped, it has two symmetrically connected curved sides, with the concave sides of the two curved sides facing each other.

[0036] In this embodiment, the dielectric constant of the insulating support portion is <3.2, and the loss tangent of the insulating support portion is less than 0.01.

[0037] The aforementioned insulating support portion is made of a material with specific properties that is compatible with the probe tip and tail. Its dielectric constant is <3.2 and its loss tangent is <0.01. The aforementioned insulating support portion can ensure that the signal needle channel does not introduce high dielectric loss.

[0038] In this embodiment, the metal support portion 1 is further provided with a grounding pin channel, which extends along the X-axis direction. A grounding pin 41 is connected in the grounding pin channel, which extends along the X-axis direction. The grounding pin 41 and the metal support portion 1 constitute the return path of the P-end signal pin 31 and the N-end signal pin 32.

[0039] Between two adjacent signal pin channels, there are multiple grounding pin channels arranged sequentially along the Z-axis. The grounding pin 41 is directly installed in the metal support part 1 and the two are in contact with each other, ensuring good return current capability to ground for the P-end signal pin 31 and the N-end signal pin 32.

[0040] In this embodiment, the diameter of the grounding pin channel is larger than the diameter of the grounding pin 41, and the difference in diameter between the mating area of ​​the grounding pin channel and the grounding pin 41 is no more than 3 mils.

[0041] The diameter of the grounding pin channel is no greater than 3 mils of the diameter of the grounding pin 41, which can ensure that the grounding pin 41 can move normally in the grounding pin channel without getting stuck, and at the same time ensure reliable contact between the grounding pin 41 and the grounding pin channel to a certain extent.

[0042] In this embodiment, the metal support portion 1 includes a socket body 13 and a socket cover 14. The socket cover 14 is detachably connected to the positive X-axis side of the socket body 13. The socket body 13 and the socket cover 14 are provided with the signal pin channel and the grounding pin channel. The insulating support portion connects the signal pin channel of the socket body 13 and the socket cover 14. The grounding pin 41 connects the grounding pin channel of the socket body 13 and the socket cover 14.

[0043] Since the P-end signal pin 31, N-end signal pin 32 and grounding pin 41 are all thin at both ends and thick in the middle, the metal support part 1 is set as a split structure for easy assembly. The socket body 13 and the socket cover 14 are positioned to each other by the first positioning pin 15 and are connected and fixed by the locking screw 16. The socket cover 14 is connected with a second positioning pin 17 for positioning.

[0044] See Figure 8 As shown, when the interconnection return loss is controlled below -50dB, the existing chip test socket only supports 1.9GHz signal transmission, while the chip test socket of this invention can achieve 28GHz signal transmission.

[0045] See Figure 9 As shown, when the interconnect insertion loss is controlled below -1dB, the existing chip test socket only supports 10GHz signal transmission, while the chip test socket of this invention can reach over 40GHz.

[0046] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the protection scope of this invention.

Claims

1. A chip test socket with a metal coaxial connection, characterized in that, Includes a metal support portion, the metal support portion having a metal end face facing the positive X-axis direction and a signal needle channel extending along the X-axis direction, the signal needle channel having an interconnecting side hole end that penetrates the metal end face; An insulating support portion is connected in the signal pin channel. The insulating support portion has an insulating end face facing the positive X-axis direction. The insulating end face has an interconnection area that exposes the interconnection side hole end. The insulating support portion is connected to a differential pair, which includes a P-end signal pin and an N-end signal pin. Both the P-end signal pin and the N-end signal pin extend along the X-axis direction and are arranged along the Y-axis direction. Both the P-end signal pin and the N-end signal pin have a needle tip facing the positive X-axis direction and a needle tail facing the negative X-axis direction. The needle tips of the P-end signal pin and the N-end signal pin extend out of the insulating end face. During chip testing, the interconnect region of the insulating end face is opposite to the chip's pads. The outer edge of the chip's pads' orthogonal projection onto a set projection surface falls on the orthogonal projection of the interconnect region of the insulating end face onto the set projection surface, which is perpendicular to the X-axis direction.

2. The chip test socket according to claim 1, characterized in that, During chip testing, the distance between the edge of the interconnect region of the insulating end face projected onto the set projection surface and the edge of the chip's pad projected onto the set projection surface is not less than 5 mils.

3. The chip test socket according to claim 1, characterized in that, The insulating support portion includes two insulating parts, which are respectively located near the two ends of the signal needle channel along the X-axis. An air cavity is formed between the two insulating parts. The tip and tail of the P-end signal needle are respectively connected to the two insulating parts, and the tip and tail of the N-end signal needle are respectively connected to the two insulating parts. The middle sections of the P-end signal needle and the N-end signal needle are located in the air cavity.

4. The chip test socket according to claim 3, characterized in that, The dimension of the air cavity along the X-axis is not less than half the dimension of the P-end signal needle and the N-end signal needle along the X-axis.

5. The chip test socket according to claim 3, characterized in that, The dimension of the signal needle channel along the Y-axis is greater than the dimension along the Z-axis, and the Z-axis is perpendicular to both the X-axis and the Y-axis.

6. The chip test socket according to claim 1, characterized in that, The dielectric constant of the insulating support portion is <3.2, and the loss tangent of the insulating support portion is less than 0.

01.

7. The chip test socket according to claim 1, characterized in that, The metal support portion is also provided with a grounding pin channel, which extends along the X-axis direction. A grounding pin is connected in the grounding pin channel, which extends along the X-axis direction. The grounding pin and the metal support portion constitute the return path of the P-end signal pin and the N-end signal pin.

8. The chip test socket according to claim 7, characterized in that, The diameter of the grounding pin channel is larger than the diameter of the grounding pin, and the difference in diameter between the mating area of ​​the grounding pin channel and the grounding pin is no more than 3 mils.

9. The chip test socket according to claim 7, characterized in that, The metal support portion includes a socket body and a socket cover. The socket cover is detachably connected to the positive X-axis side of the socket body. Both the socket body and the socket cover are provided with signal pin channels. The insulating support portion connects the signal pin channels of the socket body and the socket cover.

10. The chip test socket according to claim 9, characterized in that, Both the socket body and the socket cover are provided with grounding pin channels for the chip test socket, and the grounding pin connects the grounding pin channels of the socket body and the socket cover.

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