A voltage sampling circuit

Abstract

The utility model discloses a voltage sampling circuit, include: voltage acquisition end LOAD, voltage feedback output end T1, T2, power supply end +15V, -15V, +5V, -5V, photo -coupler U1, operate and send U2, U3, U4, triode Q1, Q2, diode D1, D3, resistance R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R19, R20. The utility model discloses a voltage sampling circuit, it can utilize the method that sampling output feedback to input, guarantees that sampling output is in the safe voltage range.

Description

Technical Field

[0001] This utility model relates to a voltage sampling circuit. Background Technology

[0002] For power supplies with a wide voltage output range and precise measurements, establishing multiple ranges is significantly more advantageous than a single range. However, during range switching, there is often a situation where a high-voltage input to a low-voltage range sampling circuit can lead to chip breakdown. Therefore, it is necessary to design a circuit that uses the sampling output feedback to the input to ensure that the sampling output is within a safe voltage range. Summary of the Invention

[0003] To address the shortcomings of existing technologies, this utility model provides a voltage sampling circuit, comprising: a voltage acquisition terminal LOAD, voltage feedback output terminals T1 and T2, power supply terminals +15V, -15V, +5V, and -5V, an optocoupler U1, operational amplifiers U2, U3, and U4, transistors Q1 and Q2, diodes D1 and D3, and resistors R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R19, and R20. The voltage acquisition terminal LOAD is connected to the non-inverting input terminal of operational amplifier U4. The inverting input terminal of operational amplifier U4 is connected to the output terminal of operational amplifier U4. The output terminal of operational amplifier U4 is connected to the voltage feedback output terminal T1 through resistors R11 and R10. The output terminal of operational amplifier U4 is also connected to the secondary input terminal of optocoupler U1. The inverting input terminal of operational amplifier U2 is connected between resistors R11 and R10. The non-inverting input terminal of operational amplifier U2 is grounded. The output terminal of operational amplifier U2 is connected to the voltage feedback output terminal T1. The secondary output terminal of optocoupler U1 is connected to the voltage feedback output terminal T2 through resistors R20 and R19. The inverting input terminal of operational amplifier U3 is connected between resistors R20 and R19. The non-inverting input terminal of operational amplifier U3 is grounded. The output terminal of operational amplifier U3 is connected to the voltage feedback output terminal T2. The primary side of optocoupler U1... The positive terminal is connected to the collector of transistor Q1 through resistor R9. The emitter of transistor Q1 is connected to the +15V power supply through resistor R4. The emitter of transistor Q1 is also connected to the +5V power supply through resistors R2, R1, and R3. The base of transistor Q1 is connected between resistors R2 and R1. The voltage feedback output terminal T2 is also connected between resistors R1 and R3 through diode D1. The negative terminal of the primary side of optocoupler U1 is connected to the collector of transistor Q2. The emitter of transistor Q2 is connected to the -15V power supply through resistor R5. The emitter of transistor Q2 is also connected to the -5V power supply through resistors R8, R7, and R6. The base of transistor Q2 is connected between resistors R8 and R7. The voltage feedback output terminal T2 is also connected between resistors R7 and R6 through diode D3.

[0004] Preferably, the transistor Q1 is a PNP transistor.

[0005] Preferably, the transistor Q2 is an NPN transistor.

[0006] Preferably, the operational amplifiers U2, U3, and U4 are of model AD712.

[0007] The advantages and beneficial effects of this utility model are as follows: It provides a voltage sampling circuit that can ensure that the sampling output is within a safe voltage range by using the sampling output to feed back to the input.

[0008] The voltage sampling circuit of this invention also has the following features: 1. The circuit structure can meet the requirements of dual-quadrant voltage measurement without the need for software control; 2. The circuit structure can be expanded in multiple stages to meet the measurement needs of more ranges. Attached Figure Description

[0009] Figure 1 This is the circuit diagram of this utility model. Detailed Implementation

[0010] The specific embodiments of this utility model will be further described below with reference to the accompanying drawings and examples. The following examples are only used to more clearly illustrate the technical solution of this utility model and should not be construed as limiting the scope of protection of this utility model.

[0011] The specific technical solution of this utility model is as follows: like Figure 1 As shown, this utility model provides a voltage sampling circuit, including: a voltage acquisition terminal LOAD, voltage feedback output terminals T1 and T2, power supply terminals +15V, -15V, +5V, and -5V, an optocoupler U1, operational amplifiers U2, U3, and U4, transistors Q1 and Q2, diodes D1 and D3, and resistors R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R19, and R20. The optocoupler U1 is model AQV214S; the operational amplifiers U2, U3, and U4 are model AD712; transistor Q1 is a PNP transistor (model MMBT3906), and transistor Q2 is an NPN transistor (model MMBT3904); the resistor values ​​are: R1 2.2KΩ, R2 47KΩ, R3 2KΩ, R4 5.49KΩ, R5 5.49KΩ, R6 2KΩ, R7 2.2KΩ, R8 47KΩ, R9 3.65KΩ, R10 30KΩ, R11 750KΩ, R19 30KΩ, and R20 150KΩ. The voltage acquisition terminal LOAD is connected to the non-inverting input terminal of operational amplifier U4. The inverting input terminal of operational amplifier U4 is connected to the output terminal of operational amplifier U4. The output terminal of operational amplifier U4 is connected to the voltage feedback output terminal T1 through resistors R11 and R10. The output terminal of operational amplifier U4 is also connected to the secondary input terminal of optocoupler U1. The inverting input terminal of operational amplifier U2 is connected between resistors R11 and R10. The non-inverting input terminal of operational amplifier U2 is grounded. The output terminal of operational amplifier U2 is connected to the voltage feedback output terminal T1. The secondary output terminal of optocoupler U1 is connected to the voltage feedback output terminal T2 through resistors R20 and R19. The inverting input terminal of operational amplifier U3 is connected between resistors R20 and R19. The non-inverting input terminal of operational amplifier U3 is grounded. The output terminal of operational amplifier U3 is connected to the voltage feedback output terminal T2. The primary side of optocoupler U1... The positive terminal is connected to the collector of transistor Q1 through resistor R9. The emitter of transistor Q1 is connected to the +15V power supply through resistor R4. The emitter of transistor Q1 is also connected to the +5V power supply through resistors R2, R1, and R3. The base of transistor Q1 is connected between resistors R2 and R1. The voltage feedback output terminal T2 is also connected between resistors R1 and R3 through diode D1. The negative terminal of the primary side of optocoupler U1 is connected to the collector of transistor Q2. The emitter of transistor Q2 is connected to the -15V power supply through resistor R5. The emitter of transistor Q2 is also connected to the -5V power supply through resistors R8, R7, and R6. The base of transistor Q2 is connected between resistors R8 and R7. The voltage feedback output terminal T2 is also connected between resistors R7 and R6 through diode D3.

[0012] The working principle of the voltage sampling circuit of this utility model includes: The voltage range of the voltage acquisition terminal LOAD (i.e., the power output port load) is -200V to +200V; 1) U4 is a voltage follower; 2) U2, R10, and R11 form a co-directional proportional attenuator. The output (voltage feedback output terminal T1) is connected to a 24-bit ADC, which can sample the output voltage across the entire voltage range (-200V to +200V). However, for smaller output voltages (within 2V), the sampling accuracy is relatively poor. 3) U1 is an optocoupler, which can safely isolate 200V voltage; 4) Ron of U1 (Ron is the equivalent impedance between the output terminals of U1) together with R20 and R19 form a non-inverting proportional amplifier. The output (voltage feedback output terminal T2) is connected to a 24-bit ADC, which can sample voltages up to 2V. 5) Ron of U1 is affected by its IF (IF is the positive current of the primary LED of U1), forming a negative feedback circuit here: When D1 and D3 are not conducting, Q1 and Q2 are fully conducting, U1 is also conducting, and Ron is 0; When the positive voltage of LOAD increases, HI (HI is the sampling point of the secondary input terminal of U1) increases, the output of U3 increases, Q1 clamps, U1 is not fully turned on, Ron increases, and the output of U3 decreases. When the negative voltage of LOAD increases, Q2 begins to clamp, U1 is not fully turned on, Ron increases, causing the output of U3 to decrease.

[0013] The voltage sampling circuit of this invention also has the following features: 1. The circuit structure can meet the requirements of dual-quadrant voltage measurement without the need for software control; 2. The circuit structure can be expanded in multiple stages to meet the measurement needs of more ranges.

[0014] The above description is only a preferred embodiment of the present utility model. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present utility model, and these improvements and modifications should also be considered within the protection scope of the present utility model.

Claims

1. A voltage sampling circuit, characterized in that, include: Voltage acquisition terminal LOAD, voltage feedback output terminals T1 and T2, power supply terminals +15V, -15V, +5V, -5V, optocoupler U1, operational amplifiers U2, U3, and U4, transistors Q1 and Q2, diodes D1 and D3, and resistors R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R19, and R20. The voltage acquisition terminal LOAD is connected to the non-inverting input terminal of operational amplifier U4. The inverting input terminal of operational amplifier U4 is connected to the output terminal of operational amplifier U4. The output terminal of operational amplifier U4 is connected to the voltage feedback output terminal T1 through resistors R11 and R10. The output terminal of operational amplifier U4 is also connected to the secondary input terminal of optocoupler U1. The inverting input terminal of operational amplifier U2 is connected between resistors R11 and R10. The non-inverting input terminal of operational amplifier U2 is grounded. The output terminal of operational amplifier U2 is connected to the voltage feedback output terminal T1. The secondary output terminal of optocoupler U1 is connected to the voltage feedback output terminal T2 through resistors R20 and R19. The inverting input terminal of operational amplifier U3 is connected between resistors R20 and R19. The non-inverting input terminal of operational amplifier U3 is grounded. The output terminal of operational amplifier U3 is connected to the voltage feedback output terminal T2. The primary side of optocoupler U1... The positive terminal is connected to the collector of transistor Q1 through resistor R9. The emitter of transistor Q1 is connected to the +15V power supply through resistor R4. The emitter of transistor Q1 is also connected to the +5V power supply through resistors R2, R1, and R3. The base of transistor Q1 is connected between resistors R2 and R1. The voltage feedback output terminal T2 is also connected between resistors R1 and R3 through diode D1. The negative terminal of the primary side of optocoupler U1 is connected to the collector of transistor Q2. The emitter of transistor Q2 is connected to the -15V power supply through resistor R5. The emitter of transistor Q2 is also connected to the -5V power supply through resistors R8, R7, and R6. The base of transistor Q2 is connected between resistors R8 and R7. The voltage feedback output terminal T2 is also connected between resistors R7 and R6 through diode D3.

2. The voltage sampling circuit according to claim 1, characterized in that, The transistor Q1 is a PNP transistor.

3. The voltage sampling circuit according to claim 1, characterized in that, The transistor Q2 is an NPN transistor.

4. The voltage sampling circuit according to claim 1, characterized in that, The operational amplifiers U2, U3, and U4 are model AD712.

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