A DC voltage measurement circuit

Abstract

This utility model discloses a DC voltage measurement circuit, including an ADC unit, an offset gain adjustment unit, a voltage gain buffer unit, a voltage measurement channel selection unit, a reference voltage unit, a first range selection unit, a second range selection unit, a voltage regulation circuit unit, and a ground buffer and isolation unit. This DC voltage measurement circuit combines high testing accuracy, fast testing speed, sufficiently wide measurement range, simple circuitry, and high cost-effectiveness, thus solving the problem of existing DC voltage measurement circuits failing to balance performance and price.

Description

Technical Field

[0001] This utility model belongs to the field of electronic measurement technology, specifically relating to a DC voltage measurement circuit. Background Technology

[0002] DC voltage, as one of the most fundamental and crucial physical quantities in electronic measurement technology, is a core basis for analyzing and evaluating the performance of various electronic devices and systems. In modern electronic systems, whether it is integrated circuits, high-precision sensors, or various power management modules and embedded processors, their operating status and performance are mostly monitored and judged through DC voltage parameters. For example, in analog integrated circuits, the operating point voltage determines the linear range of the amplifier; in digital systems, the voltage level is a key standard for judging the logic state "0" and "1".

[0003] Furthermore, the quantitative evaluation of many key performance indicators also relies on voltage measurement. For example, AC voltage measurement must first be converted to DC voltage before measurement; system efficiency can be indirectly obtained through the joint measurement of input and output voltage and current; parameters such as noise figure, distortion, and stability also depend on high-precision DC voltage measurement. In addition, component fault diagnosis and circuit dynamic response characteristic analysis are inseparable from DC voltage measurement. It can be seen that DC voltage measurement is not only an important part of metrological calibration in the laboratory, but also a key means of fault diagnosis, system debugging, and performance optimization in engineering practice. It is a fundamental supporting technology that runs through the entire process of electronic technology from design verification to practical application.

[0004] However, existing DC voltage measurement circuits still have some shortcomings, such as low measurement accuracy and slow testing speed in some circuits, or complex structure and high cost despite good circuit performance. To enrich the types of DC voltage measurement circuits and meet the needs of different scenarios for high-performance, high-reliability, and wide-range DC voltage measurement, this invention proposes a DC voltage measurement circuit. Utility Model Content

[0005] The main purpose of this utility model is to provide a DC voltage measurement circuit that combines high testing accuracy, fast testing speed, sufficiently wide measurement range, simple circuit, and high cost performance, so as to solve the problem that existing DC voltage measurement circuits cannot balance performance and price.

[0006] To achieve the above objectives, this utility model provides a DC voltage measurement circuit, including an ADC unit, an offset gain adjustment unit, a voltage gain buffer unit, a voltage measurement channel selection unit, a reference voltage unit, a first range selection unit, a second range selection unit, a voltage regulation circuit unit, and a ground buffer and isolation unit, wherein: The output of the ADC unit is connected to the host computer, which is used to read the digital signal after the voltage measurement value is converted by the ADC unit. The ADC unit is connected to the offset gain adjustment unit, which is used to adjust the offset error and gain error of the ADC unit. The analog input terminal of the ADC unit is connected to the output terminal of the voltage gain buffer unit, and the input terminal of the voltage gain buffer unit is connected to the output terminal of the voltage measurement channel selection unit. The input terminal of the first range selection unit is connected to the voltage to be measured, VM-IN. The output terminal of the first range selection unit is connected to the input terminal of the second range selection unit. The output terminal of the second range selection unit is connected to the input terminal of the voltage measurement channel selection unit. The OTHER_1 channel of the voltage measurement channel selection unit is connected to the output terminal of the reference voltage unit.

[0007] As a further preferred embodiment of the above technical solution, the voltage gain buffer unit includes an operational amplifier IC1, and the output terminal of the operational amplifier IC1 is connected to the analog input terminal of the ADC unit. The non-inverting input of operational amplifier IC1 is connected to analog ground through capacitor C2 and through resistors R1 and R2. The inverting input of operational amplifier IC1 is connected to the output through capacitor C1 and through the common terminal of resistors R1 and R2.

[0008] As a further preferred embodiment of the above technical solution, the voltage measurement channel selection unit includes switches IC7B to IC13B, wherein: The first terminals of switches IC7B to IC13B are interconnected and are all connected to the input terminal VIN2 of the voltage gain buffer unit. The second terminal of switch IC7B is connected to input channel OTHER_1, the second terminal of switch IC8B is connected to input channel S+H, the second terminal of switch IC9B is connected to input channel VM2-1, the second terminal of switch IC10B is connected to input channel OTHER_2, the second terminal of switch IC11B is connected to input channel OTHER_3, the second terminal of switch IC12B is connected to analog ground, and the second terminal of switch IC13B is connected to input channel VM1-1. The second terminal of switch IC13B is connected to the cathode of diode D1, the anode of diode D2, and one end of resistor R3.

[0009] As a further preferred embodiment of the above technical solution, the reference voltage unit includes a reference source IC2, pin 13 of the reference source IC2 is connected to the seventh terminal of switch K1A and the first terminal of switch K1A is connected to the seventh terminal of switch K3A, pin 2 of the reference source IC2 is connected to the seventh terminal of switch K2A and the first terminal of switch K2A is connected to the seventh terminal of switch K3A, and the fourteenth terminal of switch K3A is connected to the input channel OTHER_1.

[0010] As a further preferred embodiment of the above technical solution, the first range selection unit includes switch K4A and switch K5A, wherein: The seventh terminal of switch K4A is connected to the input voltage VM-IN being measured. The fourteenth terminal of switch K4A is connected to the analog ground through resistors R4 and R5 in sequence, and the common terminal of resistors R4 and R5 is connected to the fourteenth terminal of switch K5A. The first terminal of switch K4A is connected to the first terminal of resistor R6. The second terminal of resistor R6 is connected to the first terminal of switch K5A, the source and drain of field-effect transistor T1, and the gate of field-effect transistor T2. A capacitor C3 is connected in parallel across the two terminals of resistor R6.

[0011] As a further preferred embodiment of the above technical solution, the second range selection unit includes operational amplifier IC3 and switches K6A to K10A, wherein: The non-inverting input of operational amplifier IC3 is connected to the cathode of diode D3, the anode of diode D4, and the output VOUT5 of the first range selection unit, respectively, and the inverting input of operational amplifier IC3 is connected to the anode of diode D3 and the cathode of diode D4, respectively. The inverting input of operational amplifier IC3 is also connected to the seventh terminal of switch K6A, the seventh and eighth terminals of switch K7A, the seventh terminal of switch K8A, the seventh terminal of switch K9A, and the seventh terminal of switch K10A, respectively. The first terminal of switch K6A is connected to the second terminal of capacitor C5 and the fourteenth terminal of switch K7A. The first terminal of switch K7A is connected to the second terminal of capacitor C4. The first terminal of switch K8A is connected to the first terminal of capacitor C4, the first terminal of capacitor C5, the output terminal of operational amplifier IC3, the second terminal of resistor R11, and the first terminal of resistor R12, respectively. The output terminal of operational amplifier IC3 is connected to the input channel VM1-1 of the voltage measurement channel selection unit. The first terminal of resistor R11 is connected to the second terminal of resistor R10 and the first terminal of switch K9A. The first terminal of resistor R10 is connected to the second terminal of resistor R9 and the first terminal of switch K10A; the first terminal of resistor R9 is connected to analog ground; the second terminal of resistor R12 is connected to the first terminal of resistor R13 and is connected to the input channel VM2-1 of the voltage measurement channel selection unit; the second terminal of resistor R13 is connected to analog ground; the fifth terminal of operational amplifier IC3 is connected to the first terminal of resistor R7, and the first terminal of operational amplifier IC3 is connected to the first terminal of resistor R8; the second terminal of resistor R7 is connected to the second terminal of fine-tuning resistor P3, and the second terminal of resistor R8 is connected to the first terminal of fine-tuning resistor P3; the third terminal of fine-tuning resistor P3 is connected to the positive power supply +20V; the seventh terminal of operational amplifier IC3 is connected to the positive power supply +20V, and the fourth terminal of operational amplifier IC3 is connected to the negative power supply -20V.

[0012] As a further preferred embodiment of the above technical solution, the voltage regulator circuit unit includes integrated voltage regulator IC4 and integrated voltage regulator IC5, wherein: The third terminal of the integrated voltage regulator IC4 is connected to the positive power supply +30V, the second terminal of the integrated voltage regulator IC4 is connected to the negative terminal of the Zener diode D5, and the positive terminal of the Zener diode D5 is connected to the analog ground; capacitors C6 and C7 are connected in parallel, one end of which is connected to the analog ground and the other end is connected to the first terminal of the integrated voltage regulator IC4. The second terminal of the integrated voltage regulator IC5 is connected to the negative power supply -30V. The first terminal of the integrated voltage regulator IC5 is connected to the positive terminal of the Zener diode D6, and the negative terminal of the Zener diode D6 is connected to the analog ground. Capacitors C8 and C9 are connected in parallel, with one end connected to the analog ground and the other end connected to the third terminal of the integrated voltage regulator IC5.

[0013] As a further preferred embodiment of the above technical solution, the buffer and isolation unit includes an operational amplifier IC6 and a fine-tuning resistor P4, wherein: The non-inverting input of operational amplifier IC6 is connected to the first terminal of capacitor C16 and to the ground detection terminal GNDSENSE; the inverting input of operational amplifier IC6 is connected to the second terminal of capacitor C16, the second terminal of resistor R15, the first terminal of resistor R14, and analog ground, respectively, with the second terminal of resistor R14 connected to digital ground; the output of operational amplifier IC6 is connected to the first terminal of resistor R15; the two zero-adjustment terminals of operational amplifier IC6 are connected to the first terminals of resistor R16 and resistor R17, respectively. The second terminal of the fine-tuning resistor P4 is connected to the second terminal of the resistor R16, the first terminal of the fine-tuning resistor P4 is connected to the second terminal of the resistor R17, and the third terminal of the fine-tuning resistor P4 is connected to the positive 15V voltage A+15V; the two power supply terminals of the operational amplifier IC6 are connected to the positive voltage A+15V and the negative voltage A-15V, respectively.

[0014] The beneficial effects of this utility model are as follows: 1. High measurement accuracy: The use of a 16-bit high-precision ADC, precision resistors and low-temperature drift reference voltage source, combined with multi-stage precision calibration and filtering design, effectively improves the overall accuracy and stability of voltage measurement; the use of opto-FET and JFET devices improves input impedance and channel isolation performance, reduces noise and interference, and can also achieve high accuracy in the measurement of high internal resistance signal sources.

[0015] 2. Wide measurement range: Through the cooperation of the first range selection unit and the second range selection unit, the high input voltage can be attenuated to the optimal operating range of the ADC, realizing a wide range of DC voltage measurement, which can meet the measurement needs in different scenarios.

[0016] 3. Good stability: The ground buffer and isolation unit eliminates the error introduced by the ground wire path, ensuring measurement accuracy across the entire range; the entire system can maintain low temperature drift and excellent linearity over a wide temperature range, ensuring the stability of measurement results.

[0017] 4. High testing speed: The use of a fast analog-to-digital converter, channel switching via an opto-FET coupler, high-speed range amplifier circuit, and fast range switching via a fast relay all improve the testing speed of this circuit. This circuit is suitable for use as a programmable DC voltage measurement unit, such as a DC voltage measurement unit in a component testing system with high testing speed requirements.

[0018] 5. High cost performance: The overall circuit structure is simple and the selected components are easy to obtain. While ensuring high measurement performance, the cost is effectively controlled, providing a practical engineering solution for achieving high cost performance and high reliability in a wide range of DC voltage measurement. Attached Figure Description

[0019] Figure 1 An overall circuit block diagram of the DC voltage measurement circuit provided in this embodiment of the utility model; Figure 2 A circuit diagram of a voltage gain buffer unit provided for an embodiment of this utility model; Figure 3 A circuit diagram of a voltage measurement channel selection unit provided in an embodiment of this utility model; Figure 4 A circuit diagram of a reference voltage unit provided for an embodiment of this utility model; Figure 5 A circuit diagram of the first range selection unit provided in an embodiment of this utility model; Figure 6 A circuit diagram of the second range selection unit provided in an embodiment of this utility model; Figure 7 A circuit diagram of the voltage regulator circuit unit provided in an embodiment of this utility model; Figure 8 The circuit diagram of the ground buffer and isolation unit provided in the embodiment of this utility model. Detailed Implementation

[0020] The following description is intended to disclose the present invention so that those skilled in the art can implement it. The preferred embodiments described below are merely examples, and other obvious variations will occur to those skilled in the art. The basic principles of the present invention defined in the following description can be applied to other embodiments, modifications, improvements, equivalents, and other technical solutions that do not depart from the spirit and scope of the present invention.

[0021] This utility model discloses a DC voltage measurement circuit. The specific embodiments of the utility model are further described below with reference to preferred embodiments.

[0022] In the embodiments of this utility model, those skilled in the art will note that the ADC unit and host computer involved in this utility model can be regarded as prior art.

[0023] Preferred embodiment.

[0024] like Figure 1 As shown, this utility model discloses a DC voltage measurement circuit, including an ADC unit, an offset gain adjustment unit, a voltage gain buffer unit, a voltage measurement channel selection unit, a reference voltage unit, a first range selection unit, a second range selection unit, a voltage regulator circuit unit, and a ground buffer and isolation unit, wherein: The output of the ADC unit is connected to the host computer, which is used to read the digital signal after the voltage measurement value is converted by the ADC unit (the ADC unit is a 16-bit high-precision analog-to-digital converter and uses the input voltage range of ±10V). The ADC unit is connected to the offset gain adjustment unit, which is used to adjust the offset error and gain error of the ADC unit. The analog input terminal of the ADC unit is connected to the output terminal of the voltage gain buffer unit, and the input terminal of the voltage gain buffer unit is connected to the output terminal of the voltage measurement channel selection unit to select different voltage channels. The input terminal of the first range selection unit is connected to the voltage to be measured, VM-IN. The output terminal of the first range selection unit is connected to the input terminal of the second range selection unit. The output terminal of the second range selection unit is connected to the input terminal of the voltage measurement channel selection unit. The OTHER_1 channel of the voltage measurement channel selection unit is connected to the output terminal of the reference voltage unit to obtain a ±10V precision reference source voltage to calibrate the ADC unit.

[0025] like Figure 2 As shown, the voltage gain buffer unit includes an operational amplifier IC1, and the output terminal (VOUT2) of the operational amplifier IC1 is connected to the analog input terminal of the ADC unit; The non-inverting input of operational amplifier IC1 is connected to analog ground A-GND through capacitor C2, and the other is connected to resistors R1 and R2. The inverting input of operational amplifier IC1 is connected to the output through one channel, and the other is connected to the common terminal of resistors R1 and R2 through capacitor C1. (Capacitors C1 and C2 form a filter network, which can effectively filter out noise in the signal and reduce the impact of noise on measurement accuracy. Operational amplifier IC1 forms a voltage follower with high input impedance and low output impedance. It can effectively isolate the input of the front-end signal source from the input of the ADC unit, ensuring stable transmission of the measured voltage and ensuring that the measured voltage is sampled stably without attenuation, thus improving test accuracy and reliability.)

[0026] like Figure 3 As shown, the voltage measurement channel selection unit includes switches IC7B to IC13B, wherein: The first terminals (VOUT3) of switches IC7B to IC13B are interconnected and are all connected to the input terminal VIN2 of the voltage gain buffer unit (i.e., the end of resistor R2 away from resistor R1). The second terminal of switch IC7B is connected to input channel OTHER_1, the second terminal of switch IC8B is connected to input channel S+H, the second terminal of switch IC9B is connected to input channel VM2-1, the second terminal of switch IC10B is connected to input channel OTHER_2, the second terminal of switch IC11B is connected to input channel OTHER_3, the second terminal of switch IC12B is connected to analog ground A-GND, and the second terminal of switch IC13B is connected to input channel VM1-1 through R3; The second terminal of switch IC13B is connected to the cathode of diode D1, the anode of diode D2, and one end of resistor R3, respectively. Switches IC7B to IC13B use optoFET ​​couplers, which have advantages such as high impedance, high isolation, anti-interference, and high speed. The anode of diode D1 and the cathode of diode D2 are connected to +15V and -15V, respectively. Diodes D1 and D2 are protection diodes that can provide voltage clamping protection for operational amplifier IC1, preventing damage to the operational amplifier due to excessive voltage. In addition, input channel S+H can be directly connected to the output of the sample-and-hold circuit, allowing for dynamic voltage value testing without range selection. Input channel A-GND can be used for precise zero-potential calibration. Input channel VM2-1 is connected to the second range selection unit, allowing the measured voltage to be tested after range selection. Input channel OTHER_1 is connected to the output of the reference voltage unit, providing a ±10V precision reference voltage for calibrating the ADC unit.

[0027] like Figure 3 and 4As shown, the reference voltage unit includes a reference source IC2. Pin 13 of the reference source IC2 is connected to the seventh terminal of switch K1A, and the first terminal of switch K1A is connected to the seventh terminal of switch K3A. Pin 2 of the reference source IC2 is connected to the seventh terminal of switch K2A, and the first terminal of switch K2A is connected to the seventh terminal of switch K3A. The fourteenth terminal of switch K3A is connected to the input channel OTHER_1. The first terminal of the fine-tuning resistor P1 is connected to pin 1 of the reference source IC2, and the second terminal of the fine-tuning resistor P1 is connected to... Pin 3 of the reference source IC2 is connected as follows: the third terminal of the fine-tuning resistor P1 is connected to the -PS terminal of the reference source IC2 and to the negative 15V power supply A-15V; the first terminal of the fine-tuning resistor P2 is connected to pin 14 of the reference source IC2, the second terminal of the fine-tuning resistor P2 is connected to pin 12 of the reference source IC2, and the third terminal of the fine-tuning resistor P2 is connected to the REFGND and GND terminals of the reference source IC2, and to the analog ground A-GND; the +PS terminal of the reference source IC2 is connected to the positive 15V power supply A+15V. When switch K1A is closed, switch K2A is open, and switch K3A is switched, the reference voltage unit outputs a precise positive reference voltage; when switch K1A is open, switch K2A is closed, and switch K3A is switched, a precise negative reference voltage is output. Fine-tuning resistors P1 and P2 can respectively perform precise calibration of the positive and negative reference voltages of the reference voltage unit to ensure the accuracy of the reference voltage. Specifically, a reference source of model VRE102C can be selected.

[0028] like Figure 5 As shown, the first range selection unit includes switch K4A and switch K5A, wherein: The seventh terminal of switch K4A is connected to the input voltage VM-IN being measured. The fourteenth terminal of switch K4A is connected to the analog ground through resistors R4 and R5 in sequence, and the common terminal of resistors R4 and R5 is connected to the fourteenth terminal of switch K5A. The first terminal of switch K4A is connected to the first terminal of resistor R6. The second terminal of resistor R6 is connected to the first terminal of switch K5A, the source and drain of MOSFET T1, and the gate of MOSFET T2. A capacitor C3 is connected in parallel across resistor R6. The gate of MOSFET T1 is connected to the negative power supply -20V, and the source and drain of MOSFET T2 are connected to the positive power supply +20V. When switch K4A and switch K5A are switched, the measured input voltage VM-IN is divided by resistors R4 and R5. At this time, the input voltage VM-IN is attenuated to VOUT5 = 0.2xVM-IN, and then connected to the second range selection unit for voltage measurement in the high range ±85V. When switches K4A and K5A are in the initial state, the measured input voltage VM-IN is connected to the second range selection unit without attenuation. Field-effect transistors T1 and T2 form a bidirectional protection circuit, providing extremely high input impedance within a voltage range of ±20V, which improves the testing accuracy of the measured signal, especially the measurement accuracy of high internal resistance signal sources. In practice, this path is used for voltage measurement within a range of ±17V. Resistor R6 is used for current limiting and forms a low-pass filter with capacitor C3 to suppress high-frequency noise. Capacitor C3 also has an acceleration function, which can improve the response speed.

[0029] like Figure 3 and 6 As shown, the second range selection unit includes operational amplifier IC3 and switches K6A to K10A, wherein: The non-inverting input of operational amplifier IC3 is connected to the cathode of diode D3, the anode of diode D4, and the output terminal VOUT5 of the first range selection unit (i.e., the seventh terminal of switch K5A), and the inverting input of operational amplifier IC3 is connected to the anode of diode D3 and the cathode of diode D4, respectively. The inverting input of operational amplifier IC3 is also connected to the seventh terminal of switch K6A, the seventh and eighth terminals of switch K7A, the seventh terminal of switch K8A, the seventh terminal of switch K9A, and the seventh terminal of switch K10A, respectively; the first terminal of switch K6A is connected to the second terminal of capacitor C5 and the fourteenth terminal of switch K7A; the first terminal of switch K7A is connected to the second terminal of capacitor C4; the first terminal of switch K8A is connected to the first terminal of capacitor C4, the first terminal of capacitor C5, the output terminal of operational amplifier IC3, the second terminal of resistor R11, and the first terminal of resistor R12, respectively, and the output terminal of operational amplifier IC3 is connected to the input channel VM1-1 of the voltage measurement channel selection unit (i.e., the other end of resistor R3); The first terminal of resistor R11 is connected to the second terminal of resistor R10 and the first terminal of switch K9A; the first terminal of resistor R10 is connected to the second terminal of resistor R9 and the first terminal of switch K10A; the first terminal of resistor R9 is connected to analog ground A-GND; the second terminal of resistor R12 is connected to the first terminal of resistor R13 and to the input channel VM2-1 of the voltage measurement channel selection unit; the second terminal of resistor R13 is connected to analog ground A-GND; the fifth terminal of operational amplifier IC3 is connected to the first terminal of resistor R7, and the first terminal of operational amplifier IC3 is connected to the first terminal of resistor R8; the second terminal of resistor R7 is connected to the second terminal of fine-tuning resistor P3, and the second terminal of resistor R8 is connected to the first terminal of fine-tuning resistor P3; the fifth terminal of fine-tuning resistor P3 is connected to the second terminal of resistor R7, and the second terminal of resistor R8 is connected to the first terminal of fine-tuning resistor P3; the fifth terminal of fine-tuning resistor P3 is connected to the second terminal of resistor R7, and the second terminal of resistor R8 is connected to the first terminal of fine-tuning resistor P3; the fifth terminal of fine-tuning resistor P3 is connected to the second terminal of resistor R7, and the second terminal of resistor R8 is connected to the first terminal of fine-tuning resistor P3; the second terminal of resistor R7 is connected to the second terminal of fine-tuning resistor P3 ... resistor R8, and the second terminal of resistor R9 is connected to the first terminal of fine-tuning resistor P3; the second terminal of resistor R7 is connected to the second terminal of resistor R9, and the second terminal of resistor R8 is connected to the first terminal The three terminals are connected to the positive power supply +20V; the seventh terminal of operational amplifier IC3 is connected to the positive power supply +20V, and the fourth terminal of operational amplifier IC3 is connected to the negative power supply -20V. (Operational amplifier IC3 forms a non-inverting proportional amplifier with a gain Avo = 1 + Rf / Rg. When switch K9A is closed and switch K10A is open, the gain is 10; when switch K9A is open and switch K10A is closed, the gain is 100; when switch K9A is open, switch K10A is open, and switch K8A is closed, operational amplifier IC3 forms a voltage follower with a gain of 1. By controlling the state of different switches, different ranges can be selected. Diodes D3 and D4 are protection diodes to prevent excessive voltage.) The operational amplifier IC3 is damaged. When the amplification factor of IC3 is increased (low range), capacitors C4 and C5 can be used as compensation capacitors to suppress high-frequency noise, reduce the impact of high-frequency interference on the measurement, and improve the stability of the amplifier. Resistors R7, R8, and trimming resistor P3 constitute a zero-point calibration circuit for accurately calibrating the zero-point voltage of the voltage measurement system. Resistors R12 and R13 constitute a resistor divider circuit with a division ratio of R13 / (R12+R13). This voltage divider expands the input voltage range. Since the output voltage of the non-inverting amplifier formed by operational amplifier IC3 is in the linear region within ±17V, the voltage can be reduced to within ±10V after the voltage divider, matching the input voltage range of the ADC unit.The operational amplifier IC3 can be the LT1022 model, which is a high-speed, precision, JFET input operational amplifier with extremely high input impedance and features such as low offset voltage, low temperature drift, and low noise.

[0030] like Figure 6 and 7 As shown, the voltage regulator circuit unit includes integrated voltage regulator IC4 and integrated voltage regulator IC5, wherein: The third terminal of the integrated voltage regulator IC4 is connected to the positive power supply +30V, the second terminal of the integrated voltage regulator IC4 is connected to the negative terminal of the Zener diode D5, and the positive terminal of the Zener diode D5 is connected to the analog ground; capacitors C6 and C7 are connected in parallel, one end of which is connected to the analog ground and the other end is connected to the first terminal of the integrated voltage regulator IC4. The second terminal of the integrated voltage regulator IC5 is connected to the negative power supply -30V, and the first terminal of the integrated voltage regulator IC5 is connected to the positive terminal of the Zener diode D6. The negative terminal of the Zener diode D6 is connected to analog ground. Capacitors C8 and C9 are connected in parallel, with one end connected to analog ground and the other end connected to the third terminal of the integrated voltage regulator IC5. The voltage regulation circuit unit mainly provides a ±20V power supply voltage for the second range selection unit. Zener diodes D5 and D6 are used for voltage offset to ensure that the output voltage is stable at ±20V. Capacitors C6, C7, C8, and C9 are used for coupling filtering, which can filter out impurity signals in the power supply, making the ±20V output voltage more stable and ensuring the normal operation of the second range selection unit.

[0031] like Figure 8 As shown, the buffer and isolation unit includes operational amplifier IC6 and trimming resistor P4, wherein: The non-inverting input of operational amplifier IC6 is connected to the first terminal of capacitor C16 and to the ground detection terminal GNDSENSE; the inverting input of operational amplifier IC6 is connected to the second terminal of capacitor C16, the second terminal of resistor R15, the first terminal of resistor R14, and analog ground A-GND, respectively, with the second terminal of resistor R14 connected to digital ground; the output of operational amplifier IC6 is connected to the first terminal of resistor R15; the two zero-adjustment terminals (pin 1 and pin 8) of operational amplifier IC6 are connected to the first terminals of resistor R16 and resistor R17, respectively. The second terminal of the fine-tuning resistor P4 is connected to the second terminal of resistor R16, the first terminal of the fine-tuning resistor P4 is connected to the second terminal of resistor R17, and the third terminal of the fine-tuning resistor P4 is connected to the positive 15V voltage A+15V. The two power supply terminals (pins 7 and 4) of operational amplifier IC6 are connected to the positive voltage A+15V and the negative voltage A-15V, respectively. Operational amplifier IC6 forms a voltage follower. Utilizing the virtual short characteristic of the non-inverting and inverting input terminals of the operational amplifier, the non-inverting input terminal (connected to the ground terminal GNDSENSE) and the inverting input terminal (connected to analog ground A-GND) are made to have the same potential, thereby eliminating DC measurement errors caused by ground path resistance and current, and improving measurement accuracy. Capacitor C16 and resistor R15 form a low-pass filter, which can filter out high-frequency noise that may exist on GNDSENSE; resistor R14, as an isolation resistor, can prevent high-frequency digital noise from directly flowing into the A-GND region, significantly improving the signal-to-noise ratio and accuracy of voltage measurement.

[0032] For the present utility model, refer to Figures 1-8 The voltage measurement circuit provided in this embodiment of the invention has high measurement accuracy and fast testing speed. Specifically, the ADC unit uses a 16-bit high-precision analog-to-digital converter ADS7809 with a linear error of ±1LSB(max) and a sampling rate of 100KHz. The resistors used in the second range selection unit are all 0.02% precision resistors with a temperature coefficient of 5ppm. The reference voltage unit uses a VRE102C reference source with a ±10V output voltage accuracy of ±1.0mV and extremely low temperature drift of 1.09ppm / ºC (-55ºC to +125ºC). Each sensitive part of the unit uses a filtering circuit to eliminate errors introduced by signal noise. The voltage measurement channel selection unit uses an optoFET ​​coupler for its switch, which has advantages such as high impedance, high isolation, anti-interference, and high speed. The first range selection unit uses a J... The FET junction field-effect transistors T1 and T2 provide extremely high input impedance. The second range selection unit operational amplifier IC3 uses the LT1022, a high-speed, precision JFET input operational amplifier with extremely high input impedance and features low offset voltage, low temperature drift, and low noise. The use of these high-impedance components improves the measurement accuracy of the measured signal, especially for high internal resistance signal sources. The ground buffer and isolation unit eliminates DC measurement errors caused by ground path resistance and current, improving measurement accuracy. The ADC unit is precisely calibrated, including offset gain and linearity correction. The reference voltage unit is precisely calibrated. The second range selection unit is precisely calibrated, including zero-point correction, positive and negative voltage correction, and symmetry correction for each range. The ground potential of the ground buffer and isolation unit is precisely calibrated. These calibrations greatly improve the accuracy of voltage measurement.

[0033] It is worth mentioning that the technical features such as the ADC unit and host computer involved in this utility model patent application should be regarded as prior art. The specific structure, working principle and possible control method and spatial arrangement of these technical features can be adopted by conventional choices in the field and should not be regarded as the inventive point of this utility model patent. This utility model patent will not be further elaborated in detail.

[0034] For those skilled in the art, modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the protection scope of this utility model.

Claims

1. A DC voltage measurement circuit, characterized in that, It includes an ADC unit, an offset gain adjustment unit, a voltage gain buffer unit, a voltage measurement channel selection unit, a reference voltage unit, a first range selection unit, a second range selection unit, a voltage regulation circuit unit, and a ground buffer and isolation unit, wherein: The output of the ADC unit is connected to the host computer, which is used to read the digital signal after the voltage measurement value is converted by the ADC unit. The ADC unit is connected to the offset gain adjustment unit, which is used to adjust the offset error and gain error of the ADC unit. The analog input terminal of the ADC unit is connected to the output terminal of the voltage gain buffer unit, and the input terminal of the voltage gain buffer unit is connected to the output terminal of the voltage measurement channel selection unit. The input terminal of the first range selection unit is connected to the voltage to be measured, VM-IN. The output terminal of the first range selection unit is connected to the input terminal of the second range selection unit. The output terminal of the second range selection unit is connected to the input terminal of the voltage measurement channel selection unit. The OTHER_1 channel of the voltage measurement channel selection unit is connected to the output terminal of the reference voltage unit.

2. The DC voltage measuring circuit according to claim 1, characterized in that, The voltage gain buffer unit includes an operational amplifier IC1, the output of which is connected to the analog input of the ADC unit. The non-inverting input of operational amplifier IC1 is connected to analog ground through capacitor C2 and through resistors R1 and R2. The inverting input of operational amplifier IC1 is connected to the output through capacitor C1 and through the common terminal of resistors R1 and R2.

3. The DC voltage measuring circuit according to claim 2, characterized in that, The voltage measurement channel selection unit includes switches IC7B to IC13B, wherein: The first terminals of switches IC7B to IC13B are interconnected and are all connected to the input terminal VIN2 of the voltage gain buffer unit. The second terminal of switch IC7B is connected to input channel OTHER_1, the second terminal of switch IC8B is connected to input channel S+H, the second terminal of switch IC9B is connected to input channel VM2-1, the second terminal of switch IC10B is connected to input channel OTHER_2, the second terminal of switch IC11B is connected to input channel OTHER_3, the second terminal of switch IC12B is connected to analog ground, and the second terminal of switch IC13B is connected to input channel VM1-1. The second terminal of switch IC13B is connected to the cathode of diode D1, the anode of diode D2, and one end of resistor R3, respectively. The anode of diode D1 and the cathode of diode D2 are connected to +15V and -15V, respectively.

4. A DC voltage measuring circuit according to claim 3, characterized in that, The reference voltage unit includes a reference source IC2. Pin 13 of the reference source IC2 is connected to the seventh terminal of switch K1A, and the first terminal of switch K1A is connected to the seventh terminal of switch K3A. Pin 2 of the reference source IC2 is connected to the seventh terminal of switch K2A, and the first terminal of switch K2A is connected to the seventh terminal of switch K3A. The fourteenth terminal of switch K3A is connected to the input channel OTHER_1.

5. A DC voltage measuring circuit according to claim 4, characterized in that, The first range selection unit includes switch K4A and switch K5A, wherein: The seventh terminal of switch K4A is connected to the input voltage VM-IN being measured. The fourteenth terminal of switch K4A is connected to the analog ground through resistors R4 and R5 in sequence, and the common terminal of resistors R4 and R5 is connected to the fourteenth terminal of switch K5A. The first terminal of switch K4A is connected to the first terminal of resistor R6. The second terminal of resistor R6 is connected to the first terminal of switch K5A, the source and drain of field-effect transistor T1, and the gate of field-effect transistor T2. A capacitor C3 is connected in parallel across the two terminals of resistor R6.

6. A DC voltage measuring circuit according to claim 5, characterized in that, The second range selection unit includes operational amplifier IC3 and switches K6A to K10A, wherein: The non-inverting input of operational amplifier IC3 is connected to the cathode of diode D3, the anode of diode D4, and the output VOUT5 of the first range selection unit, respectively, and the inverting input of operational amplifier IC3 is connected to the anode of diode D3 and the cathode of diode D4, respectively. The inverting input of operational amplifier IC3 is also connected to the seventh terminal of switch K6A, the seventh and eighth terminals of switch K7A, the seventh terminal of switch K8A, the seventh terminal of switch K9A, and the seventh terminal of switch K10A, respectively. The first terminal of switch K6A is connected to the second terminal of capacitor C5 and the fourteenth terminal of switch K7A. The first terminal of switch K7A is connected to the second terminal of capacitor C4. The first terminal of switch K8A is connected to the first terminal of capacitor C4, the first terminal of capacitor C5, the output terminal of operational amplifier IC3, the second terminal of resistor R11, and the first terminal of resistor R12, respectively. The output terminal of operational amplifier IC3 is connected to the input channel VM1-1 of the voltage measurement channel selection unit. The first terminal of resistor R11 is connected to the second terminal of resistor R10 and the first terminal of switch K9A. The first terminal of resistor R10 is connected to the second terminal of resistor R9 and the first terminal of switch K10A; the first terminal of resistor R9 is connected to analog ground; the second terminal of resistor R12 is connected to the first terminal of resistor R13 and is connected to the input channel VM2-1 of the voltage measurement channel selection unit; the second terminal of resistor R13 is connected to analog ground; the fifth terminal of operational amplifier IC3 is connected to the first terminal of resistor R7, and the first terminal of operational amplifier IC3 is connected to the first terminal of resistor R8; the second terminal of resistor R7 is connected to the second terminal of fine-tuning resistor P3, and the second terminal of resistor R8 is connected to the first terminal of fine-tuning resistor P3; the third terminal of fine-tuning resistor P3 is connected to the positive power supply +20V; the seventh terminal of operational amplifier IC3 is connected to the positive power supply +20V, and the fourth terminal of operational amplifier IC3 is connected to the negative power supply -20V.

7. A DC voltage measuring circuit according to claim 6, characterized in that, The voltage regulator circuit unit includes integrated voltage regulator IC4 and integrated voltage regulator IC5, wherein: The third terminal of the integrated voltage regulator IC4 is connected to the positive power supply +30V, the second terminal of the integrated voltage regulator IC4 is connected to the negative terminal of the Zener diode D5, and the positive terminal of the Zener diode D5 is connected to the analog ground; capacitors C6 and C7 are connected in parallel, one end of which is connected to the analog ground and the other end is connected to the first terminal of the integrated voltage regulator IC4. The second terminal of the integrated voltage regulator IC5 is connected to the negative power supply -30V. The first terminal of the integrated voltage regulator IC5 is connected to the positive terminal of the Zener diode D6, and the negative terminal of the Zener diode D6 is connected to the analog ground. Capacitors C8 and C9 are connected in parallel, with one end connected to the analog ground and the other end connected to the third terminal of the integrated voltage regulator IC5.

8. A DC voltage measuring circuit according to claim 7, characterized in that, The buffer and isolation unit includes an operational amplifier IC6 and a fine-tuning resistor P4, wherein: The non-inverting input of operational amplifier IC6 is connected to the first terminal of capacitor C16 and to the ground detection terminal GNDSENSE; the inverting input of operational amplifier IC6 is connected to the second terminal of capacitor C16, the second terminal of resistor R15, the first terminal of resistor R14, and analog ground, respectively, with the second terminal of resistor R14 connected to digital ground; the output of operational amplifier IC6 is connected to the first terminal of resistor R15; the two zero-adjustment terminals of operational amplifier IC6 are connected to the first terminals of resistor R16 and resistor R17, respectively. The second terminal of the fine-tuning resistor P4 is connected to the second terminal of the resistor R16, the first terminal of the fine-tuning resistor P4 is connected to the second terminal of the resistor R17, and the third terminal of the fine-tuning resistor P4 is connected to the positive 15V voltage A+15V; the two power supply terminals of the operational amplifier IC6 are connected to the positive voltage A+15V and the negative voltage A-15V, respectively.

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