Display module and display device
Patent Information
- Application Number
- CN202521790718.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-21
- Publication Date
- 2026-09-22
- Estimated Expiration
- 2035-08-21
AI Technical Summary
[0024]本公开提供了一种显示模组，由于第二接口和第三接口相对，因此第一导线无需倾斜布置，故第一导线的走线路径较短。进而使得第一导线受到第二导线的干扰越少，有利于提高显示模组的抗干扰性能和信号质量。
Smart Images
Figure CN224789322U_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of display device technology, and in particular to a display module and a display device. Background Technology
[0002] With the continuous iteration of smart display devices (such as mobile phones), major manufacturers are also constantly improving the performance and quality of display devices through technological iteration. Utility Model Content
[0003] This disclosure provides a display module and a display device that can improve the anti-interference capability of the display module. The technical solutions of the display module and the display device are as follows.
[0004] In a first aspect, this disclosure provides a display module, which includes a processor, a circuit board display chip, and a display panel;
[0005] The display chip is disposed on the display panel, and the display chip has a first interface;
[0006] The circuit board includes a first board body and a second board body. The first board body has a second interface, which is connected to the first interface. The second board body is connected to the side of the first board body away from the display chip and is located on one side of the centerline of the first board body.
[0007] The second board has a third interface on the side away from the first board. The second interface and the third interface are opposite to each other and are electrically connected by a first wire. The third interface is used to connect to the processor.
[0008] In one possible implementation, the display chip includes a first interface, and the first interface and the second interface are located on the same side of the centerline.
[0009] In one possible implementation, the display chip includes two first interfaces, which are respectively located on both sides of the center line;
[0010] The second interface is used to interface with any of the first interfaces.
[0011] In one possible implementation, the display chip further includes a control module, a first switching circuit, and a second switching circuit;
[0012] The first switching circuit is electrically connected to one of the first interfaces, and the second switching circuit is electrically connected to another of the first interfaces. The control module controls one of the first interfaces and the second interface to be turned on through the first switching circuit, or controls another of the first interfaces and the second interface to be turned on through the second switching circuit.
[0013] In one possible implementation, the control module includes a fifth interface and a selection circuit;
[0014] The fifth interface is electrically connected to the circuit board and the selection circuit. The selection circuit is also electrically connected to the first switch circuit and the second switch circuit. The processor sends a control signal to the selection circuit through the circuit board and the fifth interface. The selection circuit controls one of the first interfaces and the second interface to be turned on through the first switch circuit, or the selection circuit controls another of the first interfaces and the second interface to be turned on through the second switch circuit.
[0015] In one possible implementation, when the control signal is high, the selection circuit controls one of the first interfaces and the second interface to be turned on via the first switching circuit; when the control signal is low, the selection circuit controls the other of the first interface and the second interface to be turned on via the second switching circuit.
[0016] In one possible implementation, the control module includes registers;
[0017] The register is located in the display chip, and the register is used to control the conduction of either the first interface or the second interface.
[0018] In one possible implementation, the circuit board has a fingerprint hole for avoiding a fingerprint recognition chip;
[0019] The connection between the second interface and the third interface does not intersect with the fingerprint hole.
[0020] In one possible implementation, let the distance between the first end and the second end of the display chip be L. Then, the distance between one of the first interfaces and the first end is 1 / 4L, and the distance between the other first interface and the first end is 3 / 4L. The first end and the second end are located on opposite sides of the center line, respectively.
[0021] In one possible implementation, the first conductor and the second conductor are perpendicular.
[0022] Secondly, this disclosure also provides a display device, the display device comprising a display module as described in any of the first aspects.
[0023] The technical solution provided in this disclosure includes at least the following beneficial effects:
[0024] This disclosure provides a display module in which, because the second and third interfaces are opposite each other, the first conductor does not need to be arranged at an angle, thus resulting in a shorter routing path for the first conductor. This reduces interference to the first conductor from the second conductor, improving the anti-interference performance and signal quality of the display module.
[0025] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description
[0026] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. In the drawings:
[0027] Figure 1 This is a schematic diagram of the structure of a display module shown in an embodiment of this disclosure;
[0028] Figure 2 This is a schematic diagram of the structure of a display module in a related art, as shown in an embodiment of this disclosure;
[0029] Figure 3 This is a schematic diagram of the structure of a display module in a related art, as shown in an embodiment of this disclosure;
[0030] Figure 4 This is a schematic diagram illustrating a signal interference scenario according to an embodiment of this disclosure;
[0031] Figure 5 This is a schematic diagram of the structure of a display module shown in an embodiment of this disclosure;
[0032] Figure 6 This is a schematic diagram of the structure of a display module shown in an embodiment of this disclosure;
[0033] Figure 7 This is a schematic diagram of the structure of a display module shown in an embodiment of this disclosure;
[0034] Figure 8 This is a schematic diagram of a register shown in an embodiment of this disclosure;
[0035] Figure 9 This is a schematic diagram of the structure of a display chip shown in an embodiment of this disclosure;
[0036] Figure 10 This is a schematic diagram of the structure of a first conductor and a second conductor shown in an embodiment of this disclosure;
[0037] Figure 11 This is a schematic diagram of the structure of a first conductor and a second conductor in a related art, as shown in an embodiment of this disclosure.
[0038] Legend:
[0039] 1. Processor;
[0040] 2. Circuit board; 20. Fingerprint hole; 21. First board body; 211. Second interface; 22. Second board body; 221. Third interface;
[0041] 3. Display chip, 3a. First terminal, 3b. Second terminal, 31. First interface, 32. Control module, 321. Fifth interface, 322. Selection circuit, 323. Register, 33. First switch circuit, 34. Second switch circuit;
[0042] 4. Display panel;
[0043] 100. First conductor;
[0044] 200. Second conductor.
[0045] The accompanying drawings have illustrated specific embodiments of this disclosure, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concepts of this disclosure to those skilled in the art through reference to particular embodiments. Detailed Implementation
[0046] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be further described in detail below with reference to the accompanying drawings.
[0047] The terminology used in the embodiments of this disclosure is for illustrative purposes only and is not intended to limit the disclosure. Unless otherwise defined, the technical or scientific terms used herein should be understood in their ordinary sense by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” “third,” and similar terms used in this patent application specification and claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “a” or “one,” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “comprising,” “including,” and similar terms mean that the elements or objects preceding “comprising” or “including” encompass the elements or objects listed following “comprising” or “including” and their equivalents, and do not exclude other elements or objects. The terms “connected,” “linked,” and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” “right,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described object changes.
[0048] With the continuous iteration of smart display devices (such as mobile phones), major manufacturers are also constantly improving the performance and quality of display devices through technological advancements. For example... Figures 1-3 As shown, the display module in the display device includes a processor 1, a circuit board 2, a display chip 3, and a display panel 4. The display chip 3 is disposed on the display panel 4. The circuit board includes a first board 21 and a second board 22 connected together. Due to the internal stacking of the display device, the second board 22 is located on the side of the first board 21 away from the display chip 3, and is located on the side of the center line I of the first board 21. The side of the second board 22 closer to the center line I is used to house the battery. The display chip 3 has a first interface 31, and the first board 21 has a second interface 211, which is connected to the first interface 31. The end of the second board 22 away from the first board 21 has a third interface 221. The second interface 211 and the third interface 221 are connected by a first wire 100, and the third interface 221 is used to connect to the processor 1. Processor 1 transmits MIPIData (Mobile Industry Processor Interface Data) to display chip 3 via circuit board 2. The MIPI-DSI (Display Serial Interface) module in display chip 3 decodes and encodes MIPIData to form the signals required for Source Single (final driving panel pixels) and GOA Single (line scanning circuit) and transmits them to display panel 4, thereby forming a display image on display panel 4.
[0049] In related technologies, such as Figure 2 As shown, the centerline of the first interface 31 and the centerline of the second interface 211 coincide with the centerline I of the first plate 21, and the third interface 221 is located on one side of the centerline I. Therefore, the first conductor 100 needs to be arranged at an angle, resulting in a longer routing path for the first conductor 100.
[0050] like Figure 4 As shown, the signal transmission model mainly consists of a transmitter, a transmission path, and a receiver. The longer the external interference path, the more severe the signal distortion at the receiver. Therefore, a longer path for the first conductor 100 increases the risk of MIPI interference.
[0051] In view of the above-mentioned technical problems, embodiments of this disclosure provide a display module, such as... Figure 5 and Figure 6As shown, the display module includes a processor 1, a circuit board 2, a display chip 3, and a display panel 4. The display chip 3 is disposed on the display panel 4 and has a first interface 31. The circuit board 2 includes a first board body 21 and a second board body 22. The first board body 21 has a second interface 211, which is connected to the first interface 31. The second board body 22 is connected to the side of the first board body 21 away from the display chip 3 and is located on one side of the center line I of the first board body 21. The side of the second board body 22 away from the first board body 21 has a third interface 221. The second interface 211 and the third interface 221 are opposite each other and are electrically connected through a first wire 100. The third interface 221 is used to connect to the processor 1.
[0052] The circuit board 2 can be an FPC (Flexible Printed Circuit). The end of the second board 22 away from the first board 21 has a connector, which has a third interface 221.
[0053] The display chip 3 has a MIPI-DSI module 30. The first interface 31 is used to connect to the MIPI-DSI module, so that MIPIData can be transmitted to the MIPI-DSI module 30 through the first interface 31, and the MIPI-DSI module 30 can decode and encode the MIPIData to finally form Source Single and GOA Single, and transmit them to the display panel 4.
[0054] The display chip 3 can also have a Power interface and an I / O interface. The circuit board 2 is connected to the Power interface and the I / O interface. The Power interface is used to supply power to the display chip 3, and the I / O interface is used to realize signal transmission between the circuit board 2 and the display chip 3.
[0055] The technical solution provided in this embodiment eliminates the need for the first conductor 100 to be angled due to the relative positions of the second interface 211 and the third interface 221, resulting in a shorter routing path for the first conductor 100. This reduces interference from other signals to the first conductor 100, thereby improving the anti-interference performance and signal quality of the display module.
[0056] In some examples, the display chip 3 includes a first interface 31, and the first interface 31 and the second interface 211 are located on the same side of the center line I. For the shape of the circuit board 2, the second board body 22 can be located on either side of the center line I. If the second board body 22 is located to the left of the center line I, then the first interface 31, the second interface 211, and the third interface 221 are all located to the left of the center line I. If the second board body 22 is located to the right of the center line I, then the first interface 31, the second interface 211, and the third interface 221 are all located to the right of the center line I.
[0057] If the display chip 3 has only one first interface 31, then two types of display chips 3 need to be set up: one type of display chip 3 with its first interface 31 located to the left of the center line I, and the other type of display chip 3 with its first interface 31 located to the right of the center line I, so that different shaped circuit boards 2 need to be adapted to different display chips 3.
[0058] To broaden the applicability of the same display chip 3, in some examples, such as Figures 5-7 As shown, the display chip 3 includes two first interfaces 31, located on opposite sides of the center line I. A second interface 211 is used to interface with either of the first interfaces 31. If the second board 22 is located on the right side of the center line I, the second interface 211 connects to the first interface 31 on the right side of the center line I. If the second board 22 is located on the left side of the center line I, the second interface 211 connects to the first interface 31 on the left side of the center line I. In this way, regardless of whether the second board 22 is located on the left or right side of the center line I, it can be adapted to the same display chip 3.
[0059] In related technologies, such as Figure 3 As shown, since the display chip 3 has only one first interface 31 in the center position, the first interface 31 is always on. Since this embodiment of the present disclosure has two first interfaces 31, it is necessary to control the first interface 31 connected to the second interface 211 to be on and to control the other first interface 31 to be off.
[0060] In some examples, such as Figure 6 As shown, the display chip 3 also includes a control module 32, a first switching circuit 33, and a second switching circuit 34. The first switching circuit 33 is electrically connected to a first interface 31, and the second switching circuit 34 is electrically connected to another first interface 31. The control module 32 controls one first interface 31 and the second interface 211 to be turned on via the first switching circuit 33, or controls the other first interface 31 and the second interface 211 to be turned on via the second switching circuit 34. The first switching circuit 33 and the second switching circuit 34 are also electrically connected to the MIPI-DSI module 30.
[0061] When the second board 22 is located to the left of center line I, the second interface 211 is connected to the first interface 31 located to the left of center line I, and the first switching circuit 33 controls the first interface 31 to be connected to the MIPI-DSI module 30, so that MIPIDate is transmitted to the MIPI-DSI module 30. When the second board 22 is located to the right of center line I, the second interface 211 is connected to the first interface 31 located to the right of center line I, and the first switching circuit 33 controls the first interface 31 to be connected to the MIPI-DSI module 30, so that MIPIDate is transmitted to the MIPI-DSI module 30.
[0062] In some examples, such as Figure 6 As shown, the control module 32 includes a fifth interface 321 and a selection circuit 322. The fifth interface 321 is electrically connected to the circuit board 2 and the selection circuit 322. The selection circuit 322 is also electrically connected to the first switch circuit 33 and the second switch circuit 34. The processor 1 sends control signals to the selection circuit 322 through the circuit board 2 and the fifth interface 321. The selection circuit 322 controls one first interface 31 and the second interface 211 to be turned on through the first switch circuit 33, or the selection circuit 322 controls the other first interface 31 and the second interface 211 to be turned on through the second switch circuit 34.
[0063] For example, when the control signal is high, the selection circuit 322 controls the first interface 31 and the second interface 211 to be turned on via the first switch circuit 33. When the control signal is low, the selection circuit 322 controls the first interface 31 and the second interface 211 to be turned on via the second switch circuit 34.
[0064] Alternatively, in other examples, when the control signal is low, the selection circuit 322 controls one first interface 31 and the second interface 211 to be turned on via the first switch circuit 33. When the control signal is high, the selection circuit 322 controls the other first interface 31 and the second interface 211 to be turned on via the second switch circuit 34.
[0065] In some examples, such as Figure 8 As shown, the control module 32 includes a register 323, which is located on the display chip 3. The register 323 is used to control the conduction of either the first interface 31 or the second interface 211. By controlling the conduction of either the first interface 31 or the second interface 211 through the register 323, the display chip 3 does not need to have a fifth interface 321.
[0066] Bit D7 of register 323 is used to select between the first switching circuit 33 and the second switching circuit 34. Bit D7 is a writable register. When D7=0, the switch is closed; when D7=1, the switch is open. Bit D6 is the selection bit for the first switching circuit 33 and the second switching circuit 34. Bit D6 is a writable register. When D6=0, the first switching circuit 33 is on; when D6=1, the second switching circuit 34 is on. Bit D5 is a detection flag and is a read-only register. Bit D5 is used to automatically detect whether the first switching circuit 33 or the second switching circuit is on. When the detection result is correct, it remains low (D5=0). When the detection result is incorrect, it reports an error and sets err high (D5=1). When the first switching circuit 33 needs to be on, D7=1 and D6=0.
[0067] In some examples, such as Figure 5 and Figure 7As shown, circuit board 2 has a fingerprint hole 20, which is used to avoid the fingerprint recognition chip. The connection between the second interface 211 and the third interface 221 does not intersect with the fingerprint hole 20.
[0068] When a user uses the display device, their finger presses on the area opposite the display panel and the fingerprint sensor 20, allowing the fingerprint recognition chip to unlock the device by recognizing the fingerprint. Therefore, the first guide wire 100 needs to avoid the fingerprint sensor 20. In related technologies, such as... Figure 3 As shown, the line connecting the second interface 211 and the third interface 221 intersects the fingerprint hole 20. Therefore, the first wire 100 needs to bypass the fingerprint hole 20, which further lengthens the routing path of the first wire 100. In this embodiment of the present disclosure, the line connecting the second interface 211 and the third interface 221 is set to not intersect the fingerprint hole 20, which allows the first wire 100 to be distributed in a straight line without bypassing the fingerprint hole 20, thereby making the routing length of the first wire 100 unaffected by the fingerprint hole 20.
[0069] In some examples, such as Figure 9 As shown, let L be the distance between the first end 3a and the second end 3b of the display chip 3. Then, the distance between one first interface 31 and the first end 3a is 1 / 4L, and the distance between the other first interface 31 and the first end 3a is 3 / 4L. The first end 3a and the second end 3b are located on opposite sides of the center line I. This ensures that the two first interfaces 31 are evenly distributed on the display chip 3, and when the first interface 31 and the second interface 211 are connected, the display chip 3 is positioned as close as possible to the center of the first board 21.
[0070] In some examples, the display chip 3 may also include multiple evenly distributed first interfaces 31.
[0071] In some examples, such as Figure 10 As shown, the circuit board 2 is also provided with at least one second wire 200, and the first wire 100 and the second wire 200 are perpendicular to each other.
[0072] Let the widths of the first conductor 100 and the second conductor 200 be X and Y, respectively. For example... Figure 11 As shown, in related technologies, if the included angle between the first conductor 100 and the second conductor 200 is α, then the overlapping area between the first conductor 100 and each of the second conductors 200 is XY / (sinα). Figure 10 As shown in the embodiment of this disclosure, the first conductor 100 and the second conductor 200 are perpendicular, and the overlap area between the first conductor 100 and each of the second conductors 200 is XY. Therefore, the overlap area of the first conductor 100 and the second conductor 200 in this embodiment of the disclosure is small, thereby reducing the interference of the first conductor 100 with the second conductor 200, which is beneficial to improving the anti-interference performance and signal quality of the display device.
[0073] This disclosure also provides a display device, characterized in that the display device includes the above-described display module.
[0074] The display device can be a mobile phone or a tablet computer, etc.
[0075] The above description is merely an optional embodiment of this disclosure and is not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the principles of this disclosure should be included within the protection scope of this disclosure.
Claims
1. A display module, characterized in that, The display module includes a processor (1), a circuit board (2), a display chip (3), and a display panel (4); The display chip (3) is disposed on the display panel (4), and the display chip (3) has a first interface (31); The circuit board (2) includes a first board body (21) and a second board body (22). The first board body (21) has a second interface (211), which is connected to the first interface (31). The second board body (22) is connected to the side of the first board body (21) away from the display chip (3) and is located on one side of the center line (I) of the first board body (21). The second board (22) has a third interface (221) on the side away from the first board (21). The second interface (211) and the third interface (221) are opposite to each other and are electrically connected by a first wire (100). The third interface (221) is used to connect the processor (1).
2. The display module according to claim 1, characterized in that, The display chip (3) includes a first interface (31), and the first interface (31) and the second interface (211) are located on the same side of the centerline (I).
3. The display module according to claim 1, characterized in that, The display chip (3) includes two first interfaces (31), which are located on both sides of the center line (I); The second interface (211) is used to interface with any of the first interfaces (31).
4. The display module according to claim 3, characterized in that, The display chip (3) also has a control module (32), a first switch circuit (33), and a second switch circuit (34); The first switching circuit (33) is electrically connected to one of the first interfaces (31), and the second switching circuit (34) is electrically connected to another of the first interfaces (31). The control module (32) controls one of the first interfaces (31) and the second interface (211) to be turned on through the first switching circuit (33), or controls another of the first interfaces (31) and the second interface (211) to be turned on through the second switching circuit (34).
5. The display module according to claim 4, characterized in that, The control module (32) includes a fifth interface (321) and a selection circuit (322); The fifth interface (321) is electrically connected to the circuit board (2) and the selection circuit (322). The selection circuit (322) is also electrically connected to the first switch circuit (33) and the second switch circuit (34). The processor (1) sends a control signal to the selection circuit (322) through the circuit board (2) and the fifth interface (321). The selection circuit (322) controls one of the first interfaces (31) and the second interface (211) to be turned on through the first switch circuit (33), or the selection circuit (322) controls another of the first interfaces (31) and the second interface (211) to be turned on through the second switch circuit (34).
6. The display module according to claim 5, characterized in that, When the control signal is high, the selection circuit (322) controls one of the first interfaces (31) and the second interface (211) to be turned on through the first switch circuit (33). When the control signal is low, the selection circuit (322) controls another of the first interfaces (31) and the second interface (211) to be turned on through the second switch circuit (34).
7. The display module according to claim 4, characterized in that, The control module (32) includes a register (323); The register (323) is located on the display chip (3), and the register (323) is used to control the conduction of either the first interface (31) or the second interface (211).
8. The display module according to claim 1, characterized in that, The circuit board (2) has a fingerprint hole (20) for avoiding the fingerprint recognition chip; The connection between the second interface (211) and the third interface (221) does not intersect with the fingerprint hole (20).
9. The display module according to any one of claims 3-8, characterized in that, Let L be the distance between the first end (3a) and the second end (3b) of the display chip (3). Then the distance between one of the first interfaces (31) and the first end (3a) is 1 / 4L, and the distance between the other first interface (31) and the first end (3a) is 3 / 4L. The first end (3a) and the second end (3b) are located on both sides of the center line (I).
10. The display module according to any one of claims 1-8, characterized in that, The circuit board (2) is also provided with at least one second wire (200), and the first wire (100) and the second wire (200) are perpendicular to each other.
11. A display device, characterized in that, The display device includes the display module as described in any one of claims 1-10.