Solar charger voltage boosting and stabilizing module

CN224790551UActive Publication Date: 2026-09-22GUANGDONG YIBANG ELECTRONIC TECH CO LTD
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Patent Information

Application Number
CN202522129976.5
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-10-09
Publication Date
2026-09-22
Estimated Expiration
2035-10-09

AI Technical Summary

Technical Problem

[0002]现有的太阳能充电系统普遍存在升压效率低、输出纹波大、抗干扰能力差等问题

Benefits of technology

高效率能量转换:本实用新型采用集成同步整流功能的控制芯片(U5),替代了传统的外部肖特基二极管整流方案减少了整流损耗。同时,控制芯片(U5)的多个开关引脚(SW)并联连接到储能电感(LX1),降低了功率回路的等效电阻和寄生电感,减少了开关过程中的损耗和震荡。此外,通过频率设置电阻(R31)可以根据实际应用需求优化开关频率,在不同负载条件下保持较高效率。上述设置使模块整体效率可达85-92%。

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Abstract

The utility model discloses a kind of solar charger boost voltage stabilizing module, comprising: battery input end;Multi-stage input filter network is set to battery input end, and multi-stage input filter network includes parallelly connected medium capacity capacitor and small capacity capacitor;Control chip with integrated synchronous rectification function;Energy storage inductance, one end is connected battery input end, and the other end is connected the multiple switch pins of control chip;External compensation network is set to the periphery of control chip;Feedback network is set to control chip, and feedback network includes first voltage dividing resistor and second voltage dividing resistor;Multi-stage output filter network is set to output end, and multi-stage output filter network includes multiple ceramic capacitors and electrolytic capacitor;Overvoltage protection element is set to the vicinity of output interface;Output interface, for providing stable voltage output to external device.This solar charger boost voltage stabilizing module has the characteristics of high efficiency, high stability, strong protection function and low EMI characteristics.
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Description

Technical Field

[0001] This utility model relates to a boost and voltage stabilization module for a solar charger. Background Technology

[0002] Existing solar charging systems generally suffer from low boost efficiency, large output ripple, and poor anti-interference capabilities. Particularly when using batteries as the input source, traditional boost regulator modules often employ diode rectification, resulting in significant power losses. Furthermore, they are prone to voltage overshoot during sudden changes in output load, affecting the safety and reliability of connected devices. In addition, existing modules have insufficient protection features, leading to poor stability in applications with large input voltage fluctuations, such as solar power. Utility Model Content

[0003] The purpose of this invention is to provide a boost and voltage regulator module for a solar charger. This boost and voltage regulator module for a solar charger features high efficiency, high stability, strong protection functions, and low EMI characteristics.

[0004] The above-mentioned technical objective of this utility model is achieved through the following technical solution: A solar charger boost and voltage regulator module includes: a battery input terminal (BAT+); a multi-stage input filter network disposed at the battery input terminal, the multi-stage input filter network including medium-capacity capacitors (C30, C31) and small-capacity capacitors (C11) connected in parallel; a control chip (U5) with integrated synchronous rectification function, the control chip (U5) including multiple switch pins (SW), an enable pin (EN), a frequency setting pin (FSW), and a soft-start pin (SS); an energy storage inductor (LX1), one end of which is connected to the battery input terminal (BAT+), and the other end is connected to multiple switch pins (SW) of the control chip (U5); disposed at the battery input terminal (BAT+); a multi-stage input filter network disposed at the battery input terminal (BAT+); a multi-stage input filter network including medium-capacity capacitors (C30, C31) and small-capacity capacitors (C11) connected in parallel; a control chip (U5) with integrated synchronous rectification function, the control chip (U5) including multiple switch pins (SW), an enable pin (EN), a frequency setting pin (FSW), and a soft-start pin (SS); and an energy storage inductor (LX1), one end of which is connected to the battery input terminal (BAT+), and the other end of which is connected to multiple switch pins (SW) of the control chip (U5); and a multi-stage input filter network disposed at the battery input terminal (BAT+); a multi-stage input filter network including medium-capacity capacitors (C30, C31) and small-capacity capacitors (C11) connected in parallel; and a control chip (U5) with integrated synchronous rectification function, the control chip (U5) including multiple switch pins (SW), an enable pin (EN), a frequency setting pin (FSW), and a soft-start pin (SS); and an energy storage inductor (LX1), one end of which is connected to the battery input terminal (BAT+); and a multi-stage input filter network disposed at the battery input terminal (BAT+); a multi-stage input An external compensation network surrounds the control chip (U5), including a resistor (R28) and multiple capacitors (C40, C46, ​​C41); a feedback network is located on the control chip (U5), including a first voltage divider resistor (R29) and a second voltage divider resistor (R30); a multi-stage output filter network is located at the output terminal, including multiple ceramic capacitors (C42, C43, C44, C45) and an electrolytic capacitor (EC3); an overvoltage protection element (DZ1) is located near the output interface (CON1); and the output interface (CON1) is used to provide a stable voltage output to external devices.

[0005] The present invention is further configured such that the enable pin (EN) of the control chip (U5) is connected to the battery input terminal (BAT+) through a pull-up resistor (R26).

[0006] The present invention is further configured such that the frequency setting pin (FSW) of the control chip (U5) is connected to ground through the frequency setting resistor (R31).

[0007] The present invention is further configured such that a soft-start capacitor (C12) is connected to the soft-start pin (SS) of the control chip (U5).

[0008] The present invention is further configured such that: the control chip (U5) includes a bootstrap pin (BOOT), and a bootstrap capacitor (C10) is connected between the bootstrap pin (BOOT) and the input pin (VIN).

[0009] The present invention is further configured such that the resistor (R28) and multiple capacitors (C40, C46, ​​C41) in the external compensation network constitute Type-II or III compensation.

[0010] The present invention is further configured such that the resistance ratio of the first voltage divider resistor (R29) and the second voltage divider resistor (R30) is set to stabilize the output voltage at 12V.

[0011] The present invention is further configured such that the overvoltage protection element (DZ1) is a 12V Zener diode, which is directly connected in parallel near the output interface (CON1) to form the shortest protection circuit.

[0012] The present invention is further configured such that the analog ground (AGND) and power ground (PGND) of the control chip (U5) are connected at a single point near the chip.

[0013] The present invention is further configured such that the output interface (CON1) is connected to a multi-stage output filter network through a series resistor (R36).

[0014] In summary, this utility model has the following beneficial effects: High-efficiency energy conversion: This invention employs a control chip (U5) with integrated synchronous rectification function, replacing the traditional external Schottky diode rectification scheme and reducing rectification losses. Simultaneously, multiple switching pins (SW) of the control chip (U5) are connected in parallel to the energy storage inductor (LX1), reducing the equivalent resistance and parasitic inductance of the power circuit and minimizing losses and oscillations during switching. Furthermore, the switching frequency can be optimized according to actual application requirements via the frequency setting resistor (R31), maintaining high efficiency under different load conditions. These features enable the overall module efficiency to reach 85-92%.

[0015] Multiple Protection and Stable Output: This invention employs a triple protection structure consisting of multiple ceramic capacitors, one electrolytic capacitor, and a Zener diode. Multiple ceramic capacitors (C42, C43, C44, C45) effectively suppress high-frequency ripple due to their low ESR characteristics; a large-capacity electrolytic capacitor EC3 (220μF or 16V) provides low-frequency energy storage and absorption capabilities; and a 12V Zener diode (DZ1) is placed directly near the output interface (CON1), forming a local clamping protection structure. This triple protection setup keeps the output ripple under full load conditions below 50mVp-p, while limiting output voltage overshoot within a safe range during hot-swapping and load surges, significantly improving the system's compatibility and protection against external devices. Furthermore, the soft-start capacitor (C12) ensures a slow rise in output voltage upon power-up, preventing voltage overshoot and battery drain during startup.

[0016] Highly Adaptive External Compensation Network: This invention employs an external Type-II or Type-III compensation network composed of a resistor (R28) and multiple capacitors (C40, C46, ​​C41), instead of relying on the fixed internal compensation of the control chip. This setup increases system flexibility, allowing for rapid parameter adjustment under different battery internal resistances and load conditions, making it more suitable for solar energy systems with large variations in solar radiation or load. The external compensation network provides sufficient phase margin for the control loop, ensuring system stability under various load conditions and enabling rapid response to load changes; the typical load step recovery time is less than 50μs.

[0017] Optimized EMI performance: This invention employs a ground segmentation and single-point connection setup. The analog ground (AGND) and power ground (PGND) of the control chip (U5) are connected at a single point near the chip, reducing ground loop interference. Simultaneously, the power loop from U5 to SW to LX1 to VOUT capacitor group to GND to U5 utilizes a short-distance layout, reducing loop area and lowering parasitic inductance and EMI radiation. Compared to traditional layouts, this optimized setup can reduce radiated EMI levels by approximately 6-10 dB, improving system reliability in complex electromagnetic environments. Attached Figure Description

[0018] Figure 1 This is the overall circuit schematic diagram of this utility model. Detailed Implementation

[0019] In the description of this utility model, it should be noted that directional terms such as "up", "down", "front", "back", "left", and "right" are used only for the convenience of describing and understanding this utility model, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0020] like Figure 1 As shown, this utility model provides a solar charger boost and voltage regulator module. This module employs a synchronous boost topology to boost and regulate the battery terminal BAT+ (typically 2.5-4.35V or single-cell lithium, or 6-9V or multiple cells) to 12V, supplying power to the external load through the CON1 round hole DC interface. The module can be divided into four main functional blocks: battery input and filtering area, power conversion area, control and compensation network area, and output filtering and protection area.

[0021] A multi-stage input filtering network is installed at the battery input terminal (BAT+), which includes medium-capacity capacitors (C30, C31) and small-capacity capacitors (C11) connected in parallel. Specifically, C30 and C31 are both 22μF capacitors, and C11 is a 0.1μF capacitor. This three-stage decoupling setup creates a wideband filtering effect. The medium-capacity capacitors handle low-to-mid-frequency ripple, while the small-capacity capacitors handle high-frequency noise, effectively suppressing voltage drops and high-frequency spikes caused by line resistance or pulsating current, thus ensuring the stability of the battery input voltage.

[0022] The core of the module is a control chip (U5) with integrated synchronous rectification function, model SCT12A0DHKR. This chip integrates the main switch and synchronous rectification MOSFET, reducing the number of external components and improving efficiency. The control chip (U5) includes multiple functional pins: multiple switch pins (SW) (pins 4-8), enable pin (EN) (pin 2), frequency setting pin (FSW) (pin 3), and soft-start pin (SS), etc.

[0023] The enable pin (EN) is connected to the battery input terminal (BAT+) via a pull-up resistor (R26), where R26 has a resistance of 100kΩ, enabling automatic power-on enable. The frequency setting pin (FSW) is connected to ground via a frequency setting resistor (R31), where R31 has a resistance of 130kΩ, used to set the switching frequency. The soft-start pin (SS) is connected to a soft-start capacitor (C12), with a capacitance of 10nF, which determines the output rise time, preventing power-on overcharge and battery drain.

[0024] The control chip (U5) also includes a bootstrap pin (BOOT) (pin 11). A bootstrap capacitor (C10) is connected between the bootstrap pin (BOOT) and the input pin (VIN) (pin 10). The capacitance of C10 is 0.1μF, which provides bootstrap voltage for the high-side gate, ensuring that the high-side MOSFET receives sufficient gate drive voltage, reducing conduction losses and improving efficiency.

[0025] The energy storage inductor (LX1) has an inductance of 4.7μH. One end is connected to the battery input (BAT+), and the other end is connected to multiple switch pins (SW) of the control chip (U5). This multi-pin parallel connection reduces pin resistance and lead inductance, improves the efficiency of the power circuit, and reduces switching losses and heat generation. When the internal switch of U5 is turned on, LX1 accumulates energy at a specific rate; when the switch is turned off, the energy is transferred to the output through the synchronous rectifier MOSFET inside U5, achieving a boost function.

[0026] An external compensation network is arranged around the control chip (U5), which includes a resistor (R28) and multiple capacitors (C40, C46, ​​C41). Specifically, R28 has a resistance of 10kΩ, C40 has a capacitance of 68pF, C46 has a capacitance of 22nF, and C41 has a capacitance of 10μF. These components are connected around the COMP or FB pin of U5 to form a Type-II or III compensation network, ensuring loop phase margin and dynamic response, and guaranteeing system stability under various load conditions.

[0027] The feedback network includes a first voltage divider resistor (R29) and a second voltage divider resistor (R30), where R29 has a resistance of 536kΩ and R30 has a resistance of 59kΩ. These two resistors divide the output voltage VOUT to the FB pin, setting the target voltage. According to the formula VOUT = VREF × (1 + R29 or R30), when VREF is approximately 1.19V, the output voltage VOUT stabilizes at approximately 12V. This high-resistance voltage divider configuration reduces static power consumption while maintaining sufficient signal strength to ensure accurate voltage control.

[0028] A multi-stage output filter network is installed at the output end, comprising multiple ceramic capacitors (C42, C43, C44, C45) and one electrolytic capacitor (EC3). Specifically, C42 has a capacitance of 10μF, C43, C44, and C45 are all 22μF, and EC3 is 220μF or 16V. This combination of multiple ceramic capacitors and one electrolytic capacitor creates a wide-bandwidth filtering effect. The ceramic capacitors effectively suppress high-frequency ripple due to their low ESR characteristics, while the electrolytic capacitor provides large-capacity energy storage, suppressing low-frequency ripple and voltage fluctuations caused by load changes.

[0029] An overvoltage protection element (DZ1) is located near the output interface (CON1). DZ1 is a 12V Zener diode, directly connected in parallel near the CON1 interface to form a local clamping protection structure. When a hot-plugging or load change causes a voltage overshoot, DZ1 immediately conducts, limiting the overshoot voltage to a safe range and providing effective protection for connected external devices. CON1 is a round-hole DC interface with dimensions of 5.5×2.1mm, connected to a multi-stage output filter network via a series resistor (R36). R36 serves as a measurable and disconnectable solder bridge for easy debugging and maintenance.

[0030] The analog ground (AGND) and power ground (PGND) of the control chip (U5) are connected at a single point near the chip. This arrangement avoids interference from high-current loops that affect analog signals, thus improving control accuracy and system stability. Meanwhile, the short loop between the CON1 casing ground and EC3 ensures output stability and interference immunity.

[0031] The module operates as follows: When BAT+ is powered on, the EN pin is pulled high via R26, and U5 enters the working state; capacitor C12 in the SS phase charges, causing the output voltage to rise slowly and avoiding startup overshoot. U5 uses PWM control at the frequency set by R31 via the FSW pin: when the internal switch of U5 is on, inductor LX1 accumulates energy at a rate of di / dt = (VIN / L); when the switch is off, the energy is transferred to the output through the internal synchronous rectifier MOSFET, and the inductor current decreases at a rate of di / dt = -(VOUT-VIN) / L. The voltage at the FB terminal after being divided by R29 and R30 is compared with the internal reference. The error is processed by the COMP network and the PWM duty cycle is adjusted to keep the output stable at 12V. When the load changes abruptly, the output capacitor group first provides energy or absorbs excess energy, and then the control loop adjusts the PWM duty cycle to restore the system to stability. If a plug-in or load change causes voltage overshoot, DZ1 clamps the voltage near 12V, and EC3 absorbs excess energy to protect external devices.

[0032] Through the above structural design and working process, this utility model realizes a solar charger boost and voltage regulator module with high efficiency, high stability, strong protection function and low EMI characteristics, which is suitable for the application needs of various solar power supply systems.

[0033] This application provides the following experiments to test the technical effectiveness of the solar charger boost and voltage regulator module. 1. A comparative testing method was used to directly compare the module of this utility model with a boost module using traditional diode rectification. The testing equipment included: a high-precision power analyzer (0.1% accuracy), a 500MHz oscilloscope, an EMI receiver (9kHz-1GHz), a programmable electronic load, an adjustable DC power supply (simulating battery input), and a thermal imager. Experimental conditions included: standard input (3.7V), low voltage input (2.5V), load surge (0.1A to 0.5A, 100μs edge), and hot-plug testing. Each test was repeated 20 times to ensure data reliability. The sample consisted of 10 modules of this utility model and 10 traditional modules.

[0034] 2. Technical Effect Comparison Table 3. Verification Conclusion Experimental results show that the solar charger boost and voltage regulation module of this invention is significantly superior to traditional solutions in all core technical indicators.

[0035] In efficiency tests, this novel module consistently maintained a conversion efficiency of 85-92% under various load conditions, which is 7-12% higher than traditional diode rectification solutions. The efficiency difference is even more pronounced at low voltage inputs (2.5V), where the efficiency of traditional modules drops sharply to below 75%, while this novel module maintains a high efficiency of over 82%, demonstrating superior low-voltage operating capability. This efficiency improvement is particularly important in solar energy systems, potentially extending effective operating time by approximately 10-15%.

[0036] In output stability testing, the triple protection structure of this invention—multi-ceramic + single-electrolytic + port Zener—performed well. Under full load conditions, the output ripple was only 40-50mVp-p, a 67% reduction compared to the 120-150mVp-p of traditional solutions. More importantly, in hot-swap testing, the maximum voltage overshoot of this module was only 1.0V, far lower than the 3.5V of traditional modules, effectively protecting downstream equipment. Thermal imaging analysis showed that the hotspot temperature of this invention was 12-15℃ lower than that of traditional solutions, further confirming higher efficiency and lower power loss.

[0037] Load adaptability tests demonstrate that the external Type-II or III compensation network significantly improves the system's dynamic response capability. Under a load step change (0.1A to 0.5A), the recovery time of this novel module is only 30-50μs, with voltage drop controlled within 3%; while traditional modules require 150-200μs to recover stability, with voltage drop reaching 8%. This performance improvement enables the module to adapt to application scenarios with frequent load changes, making it particularly suitable for solar power systems.

[0038] EMI test results show that the ground-segmented single-point connection and shortest power loop layout of this invention effectively reduce EMI radiation. In the 9kHz-30MHz frequency band, the radiation level is reduced by an average of 6-10dB, significantly improving electromagnetic compatibility and reducing interference to surrounding equipment. This improvement enables the module to operate stably in complex electromagnetic environments, broadening its applicability.

[0039] In summary, the solar charger boost and voltage regulation module of this utility model, through synchronous rectification, triple protection structure, external compensation network and optimized layout, comprehensively improves efficiency, stability, adaptability and electromagnetic compatibility, providing a higher performance power solution for solar power supply systems and has broad application prospects.

Claims

1. A solar charger boost and voltage regulator module, characterized in that, include: Battery input terminal (BAT+); A multi-stage input filter network is provided at the battery input terminal, the multi-stage input filter network including a medium-capacity capacitor (C30, C31) and a small-capacity capacitor (C11) connected in parallel; A control chip (U5) with integrated synchronous rectification function includes multiple switch pins (SW), enable pins (EN), frequency setting pins (FSW), and soft-start pins (SS). The energy storage inductor (LX1) has one end connected to the battery input terminal (BAT+) and the other end connected to multiple switch pins (SW) of the control chip (U5). An external compensation network is disposed around the control chip (U5), the external compensation network including a resistor (R28) and multiple capacitors (C40, C46, ​​C41); The feedback network configured in the control chip (U5) includes a first voltage divider resistor (R29) and a second voltage divider resistor (R30). A multi-stage output filter network is set at the output end, the multi-stage output filter network including multiple ceramic capacitors (C42, C43, C44, C45) and electrolytic capacitor (EC3); Overvoltage protection element (DZ1) is located near the output interface (CON1); The output interface (CON1) is used to provide a stable voltage output to external devices.

2. The solar charger boost and voltage regulator module according to claim 1, characterized in that, The enable pin (EN) of the control chip (U5) is connected to the battery input terminal (BAT+) via a pull-up resistor (R26).

3. The solar charger boost and voltage regulator module according to claim 1, characterized in that, The frequency setting pin (FSW) of the control chip (U5) is connected to ground via a frequency setting resistor (R31).

4. The solar charger boost and voltage regulator module according to claim 1, characterized in that, The soft-start pin (SS) of the control chip (U5) is connected to a soft-start capacitor (C12).

5. The solar charger boost and voltage regulator module according to claim 1, characterized in that, The control chip (U5) includes a bootstrap pin (BOOT), and a bootstrap capacitor (C10) is connected between the bootstrap pin (BOOT) and the input pin (VIN).

6. The solar charger boost and voltage regulator module according to claim 1, characterized in that, The resistor (R28) and multiple capacitors (C40, C46, ​​C41) in the external compensation network constitute Type-II or III compensation.

7. The solar charger boost and voltage regulator module according to claim 1, characterized in that, The resistance ratio of the first voltage divider resistor (R29) and the second voltage divider resistor (R30) is set to stabilize the output voltage at 12V.

8. The solar charger boost and voltage regulator module according to claim 1, characterized in that, The overvoltage protection element (DZ1) is a 12V Zener diode, which is directly connected in parallel near the output interface (CON1) to form the shortest protection loop.

9. The solar charger boost and voltage regulator module according to claim 1, characterized in that, The analog ground (AGND) and power ground (PGND) of the control chip (U5) are connected at a single point near the chip.

10. The solar charger boost and voltage regulator module according to claim 1, characterized in that, The output interface (CON1) is connected to the multi-stage output filter network via a series resistor (R36).