H4 bridge inverter circuit and photovoltaic power generation device using same

Abstract

The utility model discloses a kind of H4 bridge inverter circuits, including input module, first switch module, second switch module, third switch module, fourth switch module, main control module and output module, the control signal output by the third drive output end is mutually exclusive with the control signal output by the first drive output end, the control signal output by the fourth drive output end is mutually exclusive with the control signal output by the second drive output end.The utility model embodiment is mutually exclusive by main control module output drive signal control switch module, in sine wave positive and negative half week alternation switch drive signal and set off state, combined with the switch module of complementary conduction forms current loop, effectively balanced power device operating state, reduce switching loss and thermal stress, simultaneously through filter module improve output waveform continuity, with the advantages of balanced power device heat distribution, reduce output harmonic content, improve system operation stability and prolong the service life of key device.

Description

Technical Field

[0001] This utility model relates to the field of photovoltaic power generation and AC-DC conversion technology, specifically to an H4 bridge inverter circuit. Background Technology

[0002] With the rapid development of photovoltaic power generation, energy storage converters, and small-to-medium power inverters, inverter circuits, as the core unit for DC-to-AC energy conversion, have seen their topology and driving methods become crucial factors affecting system efficiency and output quality. Among these, the H-bridge structure is widely used due to its ability to achieve full-cycle voltage reverse output. To reduce device costs while maintaining output quality, some systems employ a simplified H4-bridge topology, using four power switches to achieve unipolar modulation output.

[0003] However, the high-frequency switching transistors of the existing H4 bridge inverter circuit are under high thermal stress for a long time, which causes uneven heating and unbalanced heat distribution of various power devices, affecting system stability and lifespan. Secondly, in unipolar modulation mode, the output modulation wave exhibits discontinuity in the drive waveform at the zero-crossing point, which can easily cause sudden changes in output voltage and increased harmonics. Furthermore, to avoid shoot-through between the upper and lower transistors, a dead time is usually required, leading to waveform distortion and reduced efficiency. In summary, the existing H4 bridge inverter circuit still has room for improvement in terms of heat dissipation balance and zero-crossing smoothness. Utility Model Content

[0004] The purpose of this utility model is to address the shortcomings and deficiencies of existing technologies. On one hand, it provides an H4 bridge inverter circuit, including an input module, a first switch module, a second switch module, a third switch module, a fourth switch module, a main control module, and an output module. The first terminal of the output module is connected to the input terminals of the first and second switch modules; the second terminal of the output module is connected to the output terminals of the third and fourth switch modules; the main control module includes a first drive output terminal, a second drive output terminal, a third drive output terminal, and a fourth drive output terminal. The first drive output terminal is connected to the control terminal of the first switch module; the second drive output terminal is connected to the control terminal of the second switch module; the third drive output terminal is connected to the control terminal of the third switch module; and the fourth drive output terminal is connected to the control terminal of the fourth switch module. Wherein: The control signal output by the third drive output terminal is the inverse of the control signal output by the first drive output terminal, and the control signal output by the fourth drive output terminal is the inverse of the control signal output by the second drive output terminal.

[0005] Furthermore, during the positive half-cycle of the sinusoidal modulation wave, the second drive output terminal is turned off, and the first drive output terminal outputs a drive signal. During the negative half-cycle of the sinusoidal modulation wave, the first drive output terminal is turned off, and the second drive output terminal outputs a drive signal.

[0006] Furthermore, when the output module is in a positive and negative half-cycle switching state, the main control module is configured to turn off the first drive output terminal and the second drive output terminal. Furthermore, the driving signal is a unipolar PWM signal.

[0007] Furthermore, the third switch module and the fourth switch module form a conduction path, and the conduction path provides a current loop for the output module when the first switch module and the second switch module are turned off.

[0008] Furthermore, the output module also includes a filtering module. The first input terminal of the filtering module is connected to the output terminal of the first switch module and the input terminal of the third switch module. The second input terminal of the filtering module is connected to the output terminal of the second switch module and the input terminal of the fourth switch module. The first output terminal of the filtering module is connected to the first terminal of the output module, and the second output terminal of the filtering module is connected to the second terminal of the output module.

[0009] Furthermore, the first switch module, the second switch module, the third switch module, and the fourth switch module all employ MOSFET devices or IGBT devices.

[0010] Furthermore, the first switch module includes a first switch transistor Q1, the second switch module includes a second switch transistor Q2, the third switch module includes a third switch transistor Q3, and the fourth switch module includes a fourth switch transistor Q4.

[0011] On the other hand, a photovoltaic power generation device is provided, including the H4 bridge inverter circuit as described above.

[0012] This utility model embodiment controls the switching module by outputting mutually inverted drive signals from the main control module. The drive signals are alternately switched during the positive and negative half-cycles of the sine wave and the off state is set. Combined with the complementary conduction of the switching modules, a current loop is formed, which effectively balances the working state of the power devices, reduces switching losses and thermal stress, and improves the continuity of the output waveform through the filtering module. It has the advantages of balancing the heat distribution of the power devices, reducing the output harmonic content, improving the system's operational stability, and extending the service life of key components. Attached Figure Description

[0013] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0014] Figure 1 This is a circuit structure block diagram of an embodiment of the present utility model; Figure 2 This is a circuit structure block diagram of another embodiment of the present invention; Figure 3 This is a schematic diagram of the circuit principle of an embodiment of this utility model; Figure 4 This is a schematic diagram of the current flow direction during the positive half-cycle of a sinusoidal modulation wave according to an embodiment of this utility model; Figure 5 This is a schematic diagram of the current flow direction when switching from the positive half-cycle to the negative half-cycle according to an embodiment of this utility model; Figure 6 This is a schematic diagram of the current flow direction during the negative half-cycle of a sinusoidal modulation wave according to an embodiment of this utility model; Figure 7 This is a schematic diagram of the current flow direction when switching from the negative half-cycle to the positive half-cycle according to an embodiment of this utility model; Figure 8 This is a schematic diagram of the switching transistor drive signal waveform according to an embodiment of the present invention; Figure 9 This is a schematic diagram showing the relationship between the modulation wave and the carrier waveform in an embodiment of this utility model.

[0015] Figure label: 100. Input module; 200. First switch module; 300. Second switch module; 400. Third switch module; 500. Fourth switch module; 600. Output module; 700. Main control module; A. First drive output terminal; B. Second drive output terminal; C. Third drive output terminal; D. Fourth drive output terminal. Detailed Implementation

[0016] The present invention will be further described in detail below with reference to the accompanying drawings.

[0017] This specific embodiment is merely an explanation of the present utility model and is not intended to limit the present utility model. After reading this specification, those skilled in the art can make modifications to this embodiment without contributing any inventive element, but as long as they are within the scope of the claims of the present utility model, they are protected by patent law.

[0018] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. The components of the embodiments of this utility model described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention. In existing technologies, with the development of photovoltaic power generation and small-to-medium power inverter equipment, the H-bridge structure is widely used because it can achieve full-cycle voltage reverse output. However, the existing H4 bridge topology suffers from uneven heating due to the high-frequency switching transistors being under high thermal stress for extended periods. Furthermore, in unipolar modulation mode, the output modulation wave exhibits discontinuous drive waveforms at zero-crossing points, easily causing voltage spikes and increased harmonics. The dead time setting further exacerbates waveform distortion. For example, in photovoltaic energy storage systems, the inverter circuit needs to operate for extended periods, but existing solutions may lead to shortened device lifespan due to uneven heat distribution, and waveform distortion during zero-crossing switching affects power quality.

[0019] To address the aforementioned issues, an inverter circuit capable of balancing the thermal distribution of power devices and improving zero-crossing smoothness is needed. Analysis reveals that distributing high-frequency switching actions across different devices reduces the thermal stress on individual devices; simultaneously, maintaining current loop continuity at zero-crossing points reduces harmonic interference. Based on this, the switching logic is optimized using the inverse complementary relationship of control signals, allowing some switches to maintain low-frequency switching during a specific half-cycle, while others handle high-frequency modulation, thereby balancing the device operating states.

[0020] Therefore, refer to Figure 1This application proposes an H4 bridge inverter circuit, including an input module 100, a first switch module 200, a second switch module 300, a third switch module 400, a fourth switch module 500, a main control module 700, and an output module 600. The first terminal of the output module 600 is connected to the input terminals of the first switch module 200 and the second switch module 300, and the second terminal is connected to the output terminals of the third switch module 400 and the fourth switch module 500. The first terminal of the output module 600 is also connected to the output terminals of the first switch module 200 and the third switch module 400, and the second terminal is connected to the output terminals of the second switch module 300 and the fourth switch module 500. The main control module 700 includes four drive output terminals, which are respectively connected to the control terminals of the four switch modules. The control signal of the third drive output terminal C is inverted with that of the first drive output terminal A, and the control signal of the fourth drive output terminal D is inverted with that of the second drive output terminal B.

[0021] The input module 100 refers to the interface part that receives DC power, which can be implemented using a terminal block or copper busbar structure, and is used to transfer external DC power to the switching module. The reverse complementary control signal of the main control module 700 refers to two sets of drive signals with a phase difference of 180 degrees, which can be implemented using a logic inverter or a complementary PWM generation circuit to ensure that the upper and lower transistors of the same bridge arm will not be turned on at the same time.

[0022] In specific implementation, the input module 100 transmits DC power to the H-bridge structure composed of the first switch module 200 to the fourth switch module 500. The main control module 700 controls the first switch module 200 and the third switch module 400, and the second switch module 300 and the fourth switch module 500 to alternately conduct through complementary reverse drive signals. During the positive half-cycle, the first switch module 200 receives a high-frequency PWM signal for modulation, while the third switch module 400 remains normally on or switches at a low frequency. During the negative half-cycle, the second switch module 300 receives a high-frequency signal, and the fourth switch module 500 operates synchronously in the opposite direction. The filtering section of the output module 600 smooths the modulated pulsating voltage to generate sinusoidal alternating current. Since the third switch module 400 and the fourth switch module 500 operate at low frequencies during their respective half-cycles, their thermal stress is significantly reduced, while the high-frequency operation of the first and second switch modules 300 is distributed to different half-cycles through complementary control, achieving balanced heat distribution.

[0023] Compared to existing technologies, traditional H4 bridge circuits require high-frequency switching for all four switching transistors, leading to concentrated temperature rise in the devices. This solution employs a reverse complementary drive strategy, enabling the third and fourth switching modules 500 to operate at low frequencies only within their respective half-cycles, reducing switching losses and temperature rise. Simultaneously, the current loop of the output module 600 is maintained on by a low-frequency switching transistor during zero-crossing switching, avoiding current discontinuity issues introduced by dead time and thus reducing harmonic components.

[0024] Through the above technical solutions, this embodiment achieves a balanced distribution of thermal stress in power devices, extending the service life of key components. Simultaneously, the continuity of the current loop is ensured during zero-crossing switching, improving the smoothness of the output voltage waveform and effectively suppressing harmonic interference. Furthermore, complementary drive logic reduces the risk of shoot-through between the upper and lower transistors on the same bridge arm, lowers the dependence on dead time, and further improves system efficiency.

[0025] It should be noted that, in this embodiment, the main control module 700 is a circuit system that includes sensor signal acquisition and various control execution components working together, including an embedded processor, a sensor signal input interface, a device component control signal output interface, and related electronic circuits.

[0026] Reference Figures 4-8 This application further proposes that during the positive half-cycle of the sinusoidal modulation wave, the second drive output terminal B is turned off and the first drive output terminal A outputs a drive signal; during the negative half-cycle of the sinusoidal modulation wave, the first drive output terminal A is turned off and the second drive output terminal B outputs a drive signal.

[0027] The positive half-cycle of the sinusoidal modulation wave refers to the half-cycle interval of the voltage waveform above the zero axis. This can be achieved by using a voltage comparator or a digital signal processor to determine the polarity of the sine wave, which is then used to determine the output timing of the drive signal. The drive signal is the level signal that controls the switching module to turn on or off. It can be implemented using a unipolar PWM signal, generated by the main control module 700 based on the polarity of the modulation wave, and used to adjust the amplitude and frequency of the output waveform. The time-division multiplexing of the first drive output terminal A and the second drive output terminal B means that the two output terminals alternately stop outputting signals during the positive and negative half-cycles. This can be achieved through interlocking control using logic circuits or software algorithms to prevent the upper and lower bridge arm switches from turning on simultaneously.

[0028] Specifically, when the sinusoidal modulation wave is in the positive half-cycle, the main control module 700 sends a PWM signal to the first drive output terminal A to control the duty cycle of the first switch module 200, while simultaneously forcibly turning off the second drive output terminal B to keep the second switch module 300 in the off state. When the sinusoidal modulation wave enters the negative half-cycle, the main control module 700 switches to sending a PWM signal to the second drive output terminal B, while simultaneously turning off the first drive output terminal A.

[0029] During the zero-crossing interval of the positive and negative half-cycle switching, the main control module 700 simultaneously shuts down the first drive output terminal A and the second drive output terminal B, so that the upper bridge arm is temporarily not conducting, while the third switch module 400 and the fourth switch module 500 remain conducting, forming a continuous current path for the output current, thereby avoiding instantaneous current interruption or short circuit, and ensuring the continuity and smooth transition of the output voltage waveform.

[0030] This embodiment ensures that the current path during the positive half-cycle is formed only through the first switching module 200 and the fourth switching module 500, and during the negative half-cycle, the current path is formed only through the second switching module 300 and the third switching module 400. Furthermore, the two sets of bridge arms share the high-frequency switching task in different half-cycles, achieving an alternating distribution of heat from the switching transistors and significantly improving heat dissipation uniformity. It solves the problem of discontinuous drive signals at zero-crossing points under unipolar modulation, ensuring a smooth transition of the output voltage during polarity switching and reducing harmonic distortion. Simultaneously, the alternating drive and zero-crossing freewheeling design reduce the phenomenon of high-frequency switching concentrated on a single bridge arm, thereby extending device lifespan, improving system stability, and simplifying dead-time control logic. It has the advantages of simple structure, reliable control, and ease of implementation.

[0031] It should be noted that the above descriptions of positive half-cycle drive, negative half-cycle drive, and zero-crossing switching are only used to illustrate the structural coordination relationship between the main control module 700 and each switching module, to characterize the conduction state of different bridge arms in different cycles, and do not involve specific control methods or algorithm processes. The content protected in this application pertains to an H4 bridge inverter circuit based on circuit structure configuration, whose drive output switching relationship is implemented by hardware structure and logic interlocking circuits.

[0032] This application further proposes that when the output module 600 is in the positive and negative half-cycle switching state, the main control module 700 is configured to turn off the first drive output terminal A and the second drive output terminal B.

[0033] Specifically, during the transition from the positive to the negative half-cycle of the sinusoidal modulation wave, the timing circuit or zero-crossing detection circuit within the main control module 700 can identify the current switching state. Upon detecting the switching state, it simultaneously controls the first drive output terminal A and the second drive output terminal B to shut off the output signals, thus putting the corresponding first switch module 200 and second switch module 300 in the off state. At this time, the third switch module 400 and the fourth switch module 500 remain conducting, forming a freewheeling loop for the output current to maintain current continuity until another set of drive signals switches and is output again.

[0034] Through this structural relationship, the upper bridge arm can be physically disconnected during the positive and negative half-cycle switching, avoiding overlap of conduction signals between different bridge arms. Unlike existing H4 bridge inverter circuits that rely solely on dead time for signal isolation during zero-crossing switching, this application achieves bridge arm isolation control without setting a dead time by configuring the synchronous shutdown of the drive output terminal through the main control module 700. At the same time, the third and fourth switch modules 500 maintain the freewheeling path of the output current.

[0035] Therefore, the structure described in this application can effectively eliminate voltage surges at zero-crossing points in the output waveform, suppress harmonic components caused by discontinuous drive signals, and avoid heat loss and device stress caused by instantaneous shoot-through of power transistors, thereby improving the output waveform quality and operational reliability of the inverter circuit.

[0036] It should be noted that the above descriptions of drive output terminal shutdown and identification switching status are used to illustrate the structural and functional cooperation relationship between the main control module 700 and the switch module, so as to reflect the conduction and isolation characteristics of the circuit in different states, and do not constitute control methods or algorithm steps.

[0037] This application further proposes that the driving signal is a unipolar PWM signal. A unipolar PWM signal refers to a pulse width modulation signal that exists only during the positive or negative half-cycle of a sinusoidal modulation wave. Specifically, it can be implemented by superimposing a square wave signal of a fixed frequency onto a sinusoidal modulation signal, and its voltage polarity remains in a single direction within half a cycle. In this embodiment, the application of the unipolar PWM signal allows only the two switching modules of the corresponding half-bridge to be turned off when switching between positive and negative half-cycles, avoiding the current discontinuity problem caused by the simultaneous switching of four transistors.

[0038] This application further proposes that the third switch module 400 and the fourth switch module 500 form a conduction path, which provides a current loop for the output module 600 when the first switch module 200 and the second switch module 300 are in the off state. When the first switch module 200 and the second switch module 300 are off, the third switch module 400 and the fourth switch module 500 are in the conduction state, and the two form an output current loop through their conduction branches. The loop acts as a freewheeling current during the positive and negative half-cycle switching phase of the output module 600, allowing the current released by the energy storage element to transition smoothly and avoiding current surges caused by the main power switch being turned off.

[0039] For example, when the first switch module 200 and the second switch module 300 are in the off state near the zero-crossing point of the sinusoidal modulation wave, the conduction path formed by the third switch module 400 and the fourth switch module 500 undertakes the current transmission function, replacing the main power path to maintain continuous output current.

[0040] This embodiment can effectively reduce harmonic distortion of the output waveform near the zero crossing point, ensure the continuity of the current during the switching process, reduce the switching losses and voltage stress of power devices, suppress electromagnetic interference caused by current discontinuity, and improve the overall output quality and operational reliability of the inverter circuit.

[0041] It should be noted that the above descriptions of conduction and shutdown are used to illustrate the electrical connection relationship and functional coordination between the various switching modules, in order to characterize the formation of the current loop, and do not constitute a control method or algorithm step.

[0042] Reference Figures 2-3 This application further proposes that the output module 600 also includes a filtering module, the first input terminal of the filtering module is connected to the output terminal of the first switch module 200 and the input terminal of the third switch module 400, the second input terminal of the filtering module is connected to the output terminal of the second switch module 300 and the input terminal of the fourth switch module 500, the first output terminal of the filtering module is connected to the first terminal of the output module 600, and the second output terminal of the filtering module is connected to the second terminal of the output module 600.

[0043] The filtering module refers to a passive network used to filter out high-frequency harmonics. Specifically, it can be implemented using an LC filter, which consists of an inductor and a capacitor forming a second-order low-pass filter structure.

[0044] This embodiment solves the problem of high harmonic content in the output waveform of the H4 bridge inverter circuit, reduces the total harmonic distortion of the output voltage, avoids voltage surges during zero-crossing switching, and improves the output power quality of the inverter circuit and the stability of system operation.

[0045] This application further proposes that the first switch module 200, the second switch module 300, the third switch module 400 and the fourth switch module 500 all adopt MOSFET devices or IGBT devices.

[0046] The MOSFET device is a metal-oxide-semiconductor field-effect transistor, which can be either an enhancement-mode or depletion-mode power MOSFET. It features low on-resistance and fast switching speed, making it suitable for small and medium power inverter scenarios and effectively reducing switching and conduction losses.

[0047] Preferably, the IGBT device is an insulated gate bipolar transistor, which can be selected with a modular package structure integrating a fast recovery diode. It has high withstand voltage and current carrying capacity, and is suitable for high voltage and high current operating applications, which can improve the energy transmission efficiency and system reliability of the inverter.

[0048] Furthermore, the first switch module 200 includes a first switch transistor Q1, the second switch module 300 includes a second switch transistor Q2, the third switch module 400 includes a third switch transistor Q3, and the fourth switch module 500 includes a fourth switch transistor Q4. The first switch transistor Q1 and the third switch transistor Q3 form a first bridge arm, and the second switch transistor Q2 and the fourth switch transistor Q4 form a second bridge arm. The first bridge arm and the second bridge arm are cross-connected to form an H4 bridge topology, and their output terminals are respectively connected to the two ends of the output module 600.

[0049] In this embodiment, the control terminals of the four switching transistors are all electrically connected to the drive output terminal of the main control module 700 to achieve independent or complementary control of the conduction state of each bridge arm. This embodiment can flexibly select the device type according to the load type and power level to achieve optimized matching of power loss and withstand voltage performance, and has good versatility and scalability.

[0050] It should be noted that the above description of MOSFET and IGBT devices is used to define the structural form of each switching module to characterize their connection and cooperation relationship in the circuit topology, and does not involve the specific control process or driving algorithm.

[0051] Reference Figure 9 This embodiment shows a schematic diagram of the waveform relationship between the modulation wave and the carrier wave in the H4 bridge inverter circuit of this application.

[0052] The main control module 700 is internally equipped with a modulation signal generation unit and a comparison unit. The modulation signal generation unit is used to generate a sinusoidal modulation wave signal, and the comparison unit is used to generate a carrier signal and compare it with the modulation wave signal.

[0053] The modulating wave is a low-frequency sinusoidal signal that changes periodically with time, used to represent the amplitude variation trend of the target output voltage; the carrier wave is a periodic high-frequency triangular wave signal, whose frequency is more than an order of magnitude higher than the frequency of the modulating wave.

[0054] When the instantaneous voltage value of the modulated wave is higher than the carrier voltage value, the comparator unit outputs a high-level signal, and the corresponding drive output terminal of the main control module 700 generates a conduction signal; when the modulated wave is lower than the carrier voltage, it outputs a low-level signal, thereby forming a unipolar PWM drive signal.

[0055] By comparing the modulated wave with the carrier wave, a PWM control signal can be output at either the first drive output terminal A or the second drive output terminal B of the main control module 700 to achieve amplitude and frequency control of the output voltage.

[0056] During the positive half-cycle of the sinusoidal modulation wave, the PWM signal acts on the first switching module 200; during the negative half-cycle, the PWM signal acts on the second switching module 300, thereby realizing the alternation of positive and negative polarities of the output voltage.

[0057] This embodiment utilizes the method of generating a PWM signal by comparing the modulated wave with the carrier wave, which can achieve amplitude modulation control of the inverter output with a simpler circuit, avoiding complex digital algorithms, and is suitable for small and medium power inverter scenarios.

[0058] It should be noted that, Figure 9 The waveform shown is merely a functional illustration of the generation process of the output control signal of the main control module 700 in this application, used to illustrate the relative relationship between the modulated wave and the carrier wave, and does not constitute an independent control method step.

[0059] This application further proposes a photovoltaic power generation device, including an H4 bridge inverter circuit. Compared with existing technologies, traditional H4 bridge inverter circuits suffer from localized overheating due to continuous conduction of high-frequency switching transistors under unipolar modulation. This solution, however, uses complementary drive signals to enable the four switching modules to operate alternately in the positive and negative half-cycles, achieving a uniform distribution of power loss. In existing technologies, zero-crossing switching relies on dead time, leading to waveform distortion. This solution uses a filtering module to maintain the current path during switching, preventing sudden changes in output voltage.

[0060] The above is only used to illustrate the technical solution of this utility model and not to limit it. Any other modifications or equivalent substitutions made by those skilled in the art to the technical solution of this utility model, as long as they do not depart from the spirit and scope of the technical solution of this utility model, should be covered within the scope of the claims of this utility model.

Claims

1. An H4 bridge inverter circuit, characterized in that, The system includes an input module (100), a first switch module (200), a second switch module (300), a third switch module (400), a fourth switch module (500), a main control module (700), and an output module (600). The first end of the output module (600) is connected to the input end of the first switch module (200) and the input end of the second switch module (300). The second end of the output module (600) is connected to the output end of the third switch module (400) and the output end of the fourth switch module (500). The input terminal of the block (400), the second terminal of the output module (600) is connected to the output terminal of the second switch module (300) and the input terminal of the fourth switch module (500), the main control module (700) includes a first drive output terminal, a second drive output terminal, a third drive output terminal and a fourth drive output terminal, the first drive output terminal is connected to the control terminal of the first switch module (200), the second drive output terminal is connected to the control terminal of the second switch module (300), the third drive output terminal is connected to the control terminal of the third switch module (400), and the fourth drive output terminal is connected to the control terminal of the fourth switch module (500), wherein: The control signal output by the third drive output terminal is the inverse of the control signal output by the first drive output terminal, and the control signal output by the fourth drive output terminal is the inverse of the control signal output by the second drive output terminal.

2. The H4 bridge inverter circuit according to claim 1, characterized in that, During the positive half-cycle of the sinusoidal modulation wave, the second drive output terminal is turned off, and the first drive output terminal outputs a drive signal. During the negative half-cycle of the sinusoidal modulation wave, the first drive output terminal is turned off, and the second drive output terminal outputs a drive signal.

3. The H4 bridge inverter circuit according to claim 2, characterized in that, When the output module (600) is in the positive and negative half-cycle switching state, the main control module (700) is configured to turn off the first drive output terminal and the second drive output terminal.

4. The H4 bridge inverter circuit according to claim 2, characterized in that, The driving signal is a unipolar PWM signal.

5. The H4 bridge inverter circuit according to claim 2, characterized in that, The third switch module (400) and the fourth switch module (500) form a conduction path, which provides a current loop to the output module (600) when the first switch module (200) and the second switch module (300) are turned off.

6. The H4 bridge inverter circuit according to claim 1, characterized in that, The output module (600) further includes a filtering module. The first input terminal of the filtering module is connected to the output terminal of the first switch module (200) and the input terminal of the third switch module (400). The second input terminal of the filtering module is connected to the output terminal of the second switch module (300) and the input terminal of the fourth switch module (500). The first output terminal of the filtering module is connected to the first terminal of the output module (600), and the second output terminal of the filtering module is connected to the second terminal of the output module (600).

7. The H4 bridge inverter circuit according to claim 1, characterized in that, The first switch module (200), the second switch module (300), the third switch module (400) and the fourth switch module (500) all use MOSFET devices or IGBT devices.

8. The H4 bridge inverter circuit according to claim 7, characterized in that, The first switch module (200) includes a first switch transistor Q1, the second switch module (300) includes a second switch transistor Q2, the third switch module (400) includes a third switch transistor Q3, and the fourth switch module (500) includes a fourth switch transistor Q4.

9. A photovoltaic power generation device, characterized in that, Includes the H4 bridge inverter circuit as described in any one of claims 1-8.

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