A current sampling circuit applied to a servo motor, a servo driver control MCU and a control system

CN224790566UActive Publication Date: 2026-09-22GEEHY SEMICON CO LTD
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Patent Information

Application Number
CN202521108092.5
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-05-30
Publication Date
2026-09-22
Estimated Expiration
2035-05-30

AI Technical Summary

Technical Problem

[0005]有鉴于此,本申请提供一种应用于伺服电机的电流采样电路、伺服驱动器控制MCU和控制系统,以利于解决现有技术中量程浪费和对电机正常运行的影响的问题

Benefits of technology

[0012]所述滤波电路包括滤波电阻和滤波电容,所述滤波电阻的两端分别连接于放大电路的输出端和钳位二极管,所述滤波电容的两端分别连接于所述滤波电阻和所述接地端,所述滤波电阻与所述滤波电容公共端连接于所述采样信号端。本申请实施例通过将选通单元的输入端电压限制在安全电压范围内,有效防止输入信号电压过高导致选通单元损坏,从而显著降低器件的故障率;通过在采样信号输出之前增设一路滤波电路,有效降低了电路噪声,从而提升了系统的抗干扰能力。

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Abstract

The application embodiment provides a current sampling circuit applied to a servo motor, a servo driver control MCU and a control system.The circuit comprises: a sampling unit connected to the servo motor; a sampling amplification unit connected to the sampling unit and composed of at least two sampling amplification channels, the amplification coefficients of each sampling amplification channel are different, the sampling amplification unit comprises an amplification circuit and a bias circuit, the bias circuit is connected to the amplification circuit, wherein, for the channel with the amplification coefficient greater than a preset value, a voltage clamping circuit is further arranged and connected to the output end of the amplification circuit; and a gating unit is used for selecting a voltage signal from the multiple sampling amplification channels, processing and outputting data.The application embodiment improves the design of the conventional fixed current amplification gain current sampling circuit, achieves the effect of variable current resolution, can self-define the upper limit of the running current according to the actual operation, select the appropriate amplification coefficient, and is suitable for different operation scenes, so that the range waste is avoided.
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Description

Technical Field

[0001] This application relates to the field of electronic technology, specifically to a current sampling circuit for a servo motor, a servo driver control MCU, and a control system. Background Technology

[0002] Servo driver design typically uses the minimum maximum operating current of a hardware module or component as the maximum design current for the entire servo driver. To achieve this, the hardware design includes an amplifier circuit that maps the maximum current to a voltage range of 0-3.3V after a single bias.

[0003] Existing technologies have significant drawbacks, primarily in terms of wasted measurement range and impact on normal motor operation. Specifically, the maximum design current of servo drives is often far higher than actual requirements. For example, when the maximum current is set to 20A, but the rated current of the connected motor is only 3A, the motor's maximum overload multiple is 3 times, and the actual current of the entire system under maximum operating conditions is only 9A, resulting in a wasted 11A of the maximum current range. Furthermore, when a high-power servo drive drives a low-power motor, excessively high hardware design current can also affect the ADC's sampling resolution. When the operating current of a small motor is low, low resolution will cause poor motor operation and affect its performance. Therefore, existing technologies have shortcomings in both measurement range utilization and motor operating stability.

[0004] It should be noted that the information disclosed in the background section of this application is intended only to enhance the understanding of the general background of this application, and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention

[0005] In view of this, this application provides a current sampling circuit, a servo driver control MCU, and a control system for servo motors, in order to solve the problems of wasted measurement range and impact on normal motor operation in the prior art.

[0006] In a first aspect, embodiments of this application provide a current sampling circuit for a servo motor, comprising:

[0007] A sampling unit, wherein the sampling unit is connected to a servo motor;

[0008] A sampling amplification unit is connected to the sampling unit. The sampling amplification unit consists of at least two sampling amplification paths. Each sampling amplification path has a different amplification factor. Each sampling amplification path includes an amplification circuit and a bias circuit. The bias circuit is connected to the amplification circuit. For sampling amplification paths with an amplification factor greater than a preset value, a voltage clamping circuit is also provided. The voltage clamping circuit is connected to the output terminal of the amplification circuit.

[0009] A gating unit is used to select a voltage signal from multiple sampling and amplification paths for data processing and output. This embodiment improves the traditional fixed current amplification gain current sampling circuit design, achieving dynamic adjustment of current resolution and making current sampling more accurate. This design, through a reasonable hardware architecture, flexibly sets the current upper limit, effectively supporting application scenarios where high-power servo drivers drive low-power motors. Furthermore, users can freely define the current upper limit according to actual operating conditions and select paths with appropriate amplification coefficients to meet different operating requirements, thus avoiding range waste; at the same time, it ensures that the output voltage is not too high, preventing component damage. This solution has a simple overall structure, high feasibility, and requires minimal modification to existing general-purpose circuit designs, facilitating rapid integration and application.

[0010] In one possible implementation, the voltage clamping circuit includes a filter circuit, a protection circuit, and a sampling signal terminal; the filter circuit is connected to the sampling signal terminal, and the common terminal of the filter circuit and the protection circuit is connected to the output terminal of the amplifier circuit.

[0011] The protection circuit includes a clamping diode, which includes a first diode and a second diode. The first diode and the second diode are connected in series. The common terminal of the first diode and the second diode is connected to the sampling signal terminal. The negative terminal of the first diode is connected to the power supply terminal, and the positive terminal of the second diode is connected to the ground terminal.

[0012] The filtering circuit includes a filter resistor and a filter capacitor. The two ends of the filter resistor are connected to the output terminal of the amplifier circuit and a clamping diode, respectively. The two ends of the filter capacitor are connected to the filter resistor and the ground terminal, respectively. The common terminal of the filter resistor and the filter capacitor is connected to the sampling signal terminal. This embodiment of the application effectively prevents damage to the gating unit due to excessively high input signal voltage by limiting the input voltage of the gating unit within a safe voltage range, thereby significantly reducing the device failure rate. Furthermore, by adding a filter circuit before the sampling signal output, circuit noise is effectively reduced, thereby improving the system's anti-interference capability.

[0013] In one possible implementation, the gating unit includes a multiplexer and an A / D converter, wherein the multiplexer is connected to the sampling signal terminal of each sampling amplification path in the multiple sampling amplification path, and the A / D converter is connected to the multiplexer.

[0014] In this embodiment, the upper limit of the operating current can be defined according to different application scenarios, thereby determining a suitable amplification factor. Based on the set amplification factor, an appropriate gain adjustment path is selected to ensure the flexibility and adaptability of the circuit. Multiple ADC channels operate independently and simultaneously, enabling parallel data acquisition. Furthermore, the entire logic loop is carefully designed to ensure the circuit safety of each channel and prevent mutual interference. This ensures the stability and reliability of the system in different application scenarios, meeting various practical needs.

[0015] In one possible implementation, the amplification circuit includes a first amplifier, a third resistor, a fourth resistor, and a fifth resistor. The positive input terminal of the first amplifier is connected to the sampling unit, the output terminal of the first amplifier is connected to the first terminal of the third resistor, the two ends of the fourth resistor are respectively connected to the sampling unit and the negative input terminal of the first amplifier, and the two ends of the fifth resistor are respectively connected to the negative input terminal of the first amplifier and the second terminal of the third resistor.

[0016] In this embodiment, the amplification factor of the amplifier circuit is the ratio of the fifth resistor to the fourth resistor. The ratio of the fifth resistor to the fourth resistor in each sampling amplification path is set to a different value so that the amplification factor of the amplifier circuit in each sampling amplification path is different.

[0017] In one possible implementation, the resistance value of the fifth resistor can be adjusted by: the fifth resistor being a variable resistor and / or a node selected from a plurality of fixed resistors being shorted.

[0018] In this embodiment, the fifth resistor can be configured with different resistance values ​​by selecting the required amplification factor according to the defined upper limit of the operating current, thereby adjusting the gain.

[0019] In one possible implementation, the bias circuit includes a sixth resistor and a second capacitor connected in parallel. One common terminal of the sixth resistor and the second capacitor is connected to a preset bias voltage, and the other common terminal of the sixth resistor and the second capacitor is connected to the positive input terminal of the first amplifier. In this embodiment, the bias circuit generates a bias effect of a preset voltage value, ensuring that the final acquired voltage can be accurately characterized within the positive voltage range. This design effectively shifts the signal center point to the intermediate value, thereby ensuring the flexibility and effectiveness of the entire acquisition range, making subsequent data processing more accurate, and improving the system's adaptability.

[0020] In one possible implementation, the amplifier circuit further includes a second amplifier, a seventh resistor, an eighth resistor, and a ninth resistor. The positive input terminal of the second amplifier is connected to the second terminal of the third resistor, the output terminal of the second amplifier is connected to the first terminal of the seventh resistor, the second terminal of the seventh resistor is connected to the sampling signal terminal, the two ends of the eighth resistor are respectively connected to the sampling unit and the negative input terminal of the second amplifier, and the two ends of the ninth resistor are respectively connected to the negative input terminal of the second amplifier and the second terminal of the seventh resistor. The eighth resistor is equal to the ninth resistor.

[0021] The bias circuit also includes a sixth resistor and a second capacitor connected in parallel. One common terminal of the sixth resistor and the second capacitor is connected to a preset bias voltage, and the other common terminal of the sixth resistor and the second capacitor is connected to the positive input terminal of the second amplifier. In this embodiment, a bias circuit is connected to the newly added amplification circuit to generate a preset voltage bias effect, thereby enabling the final acquired voltage to be accurately characterized within the positive voltage range. This design effectively moves the signal center point to the intermediate value, ensuring the flexibility and effectiveness of the entire acquisition range, further improving the accuracy of subsequent data processing, and enhancing the system's adaptability, making it suitable for various application scenarios.

[0022] In one possible implementation, the sampling amplification path further includes a variable gain amplifier and a voltage control circuit. The variable gain amplifier is connected to the sampling unit, and the output of the voltage control circuit is connected to the gain control pin of the variable gain amplifier. The gain value of the variable gain amplifier varies with the voltage value at the output of the voltage control circuit. The output of the variable gain amplifier is connected to the input of the amplification circuit.

[0023] The embodiments of this application can adapt to both high-power and low-power sampling currents, successfully expanding the sampling current range. This design enables the system to flexibly adapt to application scenarios with different power levels, meeting diverse range and accuracy requirements, enhancing the circuit's versatility and adaptability, and greatly improving overall performance.

[0024] Secondly, embodiments of this application provide a servo driver control MCU, which includes a current sampling circuit as described in any one of the first aspects.

[0025] Thirdly, embodiments of this application provide a servo driver control system comprising a servo driver control MCU and a servo motor as described in any of the second aspects. Attached Figure Description

[0026] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 This is a schematic diagram of a sampling circuit structure used in servo motors in the prior art.

[0028] Figure 2 This is a block diagram of a current sampling circuit for a servo motor, provided as an embodiment of this application.

[0029] Figure 3 This is a schematic diagram of the circuit structure of a single-channel sampling amplification path of a sampling amplification unit for a current sampling circuit of a servo motor, provided in an embodiment of this application.

[0030] Figure 4 This is a block diagram of a gating unit for a current sampling circuit applied to a servo motor, provided as an embodiment of this application.

[0031] Figure 5 This is a schematic diagram of the circuit structure of a fifth resistor R5 in a single-channel sampling amplification path of a sampling amplification unit for a current sampling circuit of a servo motor, provided in an embodiment of this application.

[0032] Figure 6 This is a schematic diagram of the single-channel sampling amplification path of a sampling amplification unit for a current sampling circuit applied to a servo motor, as provided in the embodiments of this application.

[0033] Figure 7 A schematic diagram of the circuit structure of a single-channel sampling amplification path of a sampling amplification unit for a current sampling circuit of a servo motor, provided in the embodiments of this application.

[0034] Figure 8 The gain curve of the variable gain amplifier in the single-channel sampling amplification path of the sampling amplification unit of the current sampling circuit for a servo motor provided in the embodiments of this application.

[0035] Figure 9 This is a structural block diagram of a servo driver controlling an MCU, provided in an embodiment of this application.

[0036] Figure 10 This is a structural block diagram of a servo driver control system provided in an embodiment of this application. Detailed Implementation

[0037] To better understand the technical solution of this application, the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0038] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0039] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0040] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0041] It should be understood that, in the following description, "circuit" refers to a conductive loop consisting of at least one element or sub-circuit connected by an electrical or electromagnetic link. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it can be directly coupled or connected to the other element, or there may be intermediate elements. The connection between elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0042] Servo driver design typically uses the minimum maximum operating current of a hardware module or component as the maximum design current for the entire servo driver. To achieve this, the hardware design includes an amplifier circuit that maps the maximum current to a voltage range of 0-3.3V after a single bias.

[0043] like Figure 1 As shown, ISU is the input signal and ISV_U is the output signal.

[0044] The following formulas apply to ISU and ISV_U:

[0045]

[0046] ISU = I·R 采样 (2)

[0047] In the formula, I is the sampling current, and R采样 Let be the sampling resistor. Substituting equation (2) into equation (1), equation (1) can be further expressed as:

[0048]

[0049] Essentially, this design maps the current, through a certain amplification factor and bias, onto the 0–3.3V input range of the ADC. Subsequently, the 0–3.3V voltage signal corresponds to the 0–4096 register values ​​of the 12-bit ADC used by most chips.

[0050] The significant shortcomings of existing technologies lie primarily in the wasted range and the impact on normal motor operation. Specifically, the maximum design current of servo drives is often far higher than the actual requirement. For example, when the maximum current is set to 20A, but the rated current of the connected motor is only 3A, the maximum overload multiple of the motor is 3 times, and the actual current of the entire system under maximum operating conditions is only 9A, resulting in a wasted 11A of the maximum current range. Furthermore, when a high-power servo drive drives a low-power motor, excessively high hardware design current can also affect the sampling resolution of the ADC. When the operating current of a small motor is low, low resolution will cause poor motor operation and affect its performance. Therefore, existing technologies have shortcomings in both range utilization and motor operating stability.

[0051] In view of this, this application provides a current sampling circuit, a servo driver control MCU, and a control system for servo motors. The embodiments of this application improve upon the traditional fixed current amplification gain current sampling circuit design, achieving dynamic adjustment of current resolution and making current sampling more accurate. This design, through a reasonable hardware architecture, flexibly sets the current upper limit, effectively supporting application scenarios where high-power servo drivers drive low-power motors. Furthermore, users can freely define the current upper limit according to actual operating conditions and select appropriate amplification coefficient paths to meet different operating requirements, thus avoiding wasted measurement range. This solution has a simple overall structure, high feasibility, and requires minimal modification to existing general-purpose circuit designs, facilitating rapid integration and application.

[0052] The following explanation is based on the accompanying drawings.

[0053] See Figure 2 This is a block diagram of a current sampling circuit applied to a servo motor, provided in an embodiment of this application. Figure 2As shown, the current sampling circuit includes a sampling unit 100, a sampling amplification unit 200, and a gating unit 300. The input terminal of the sampling amplification unit 200 is electrically connected to the sampling unit and is used to acquire and amplify the differential signals IU and U from the sampling unit, representing the current magnitude based on the voltage difference. The sampling amplification path 200 consists of at least two sampling amplification paths, each with a different amplification factor. Paths with lower amplification factors are suitable for high-current industrial control scenarios, while paths with higher amplification factors are suitable for low-current industrial control scenarios. To ensure circuit safety, a voltage clamping circuit is added to the path with the higher amplification factor to prevent component damage due to excessive voltage when the path with the lower amplification factor is selected. Taking sampling amplification path 1 as an example, sampling amplification path 1 includes a bias circuit 410, an amplification circuit 420, and a voltage clamping circuit 430. The bias circuit 410 is connected to the amplification circuit 420 to provide voltage bias; the voltage clamping circuit 430 is connected to the output terminal of the amplification circuit 420. The output of the sampling amplification unit 200 is electrically connected to the gating unit 300. The gating unit 300 is used to select a voltage signal from the multi-channel sampling amplification path according to the amplification factor required by different driver power (different operating conditions), and to process and output the data.

[0054] See Figure 3 This is a schematic diagram of the circuit structure of a single-channel sampling amplification path of a sampling amplification unit applied to a current sampling circuit of a servo motor, provided in an embodiment of this application. Figure 3 As shown, the sampling unit can be a sampling resistor R1. The single-channel sampling amplification path includes an amplification circuit and a bias circuit 410. The amplification circuit amplifies the voltage difference across the sampling resistor R1 to a first voltage range (-1.65V to +1.65V). The bias circuit 110 is electrically connected to the amplification circuit and provides voltage bias to convert the first voltage range (-1.65V to +1.65V) into a second voltage range (0 to +3.3V). The output of the amplification circuit is connected to the sampling signal terminal (ADC-Uin). The sampling signal terminal (ADC-Uin) has a voltage clamping circuit connected to the output of the amplification circuit. The voltage clamping circuit includes a filter circuit 431 and a protection circuit 432, which protect the device when the path is selected.

[0055] In one possible implementation, such as Figure 3As shown, the protection circuit 432 includes clamping diodes, which include a first diode D1 and a second diode D2. The first diode D1 and the second diode D2 are connected in series. The common terminal of the first diode D1 and the second diode D2 is connected to the sampling signal terminal (ADC-Uin). The negative terminal of the first diode D1 is connected to the power supply terminal (3.3V), and the positive terminal of the second diode D2 is connected to the ground terminal (GND). During the operation of the current sampling circuit, the protection circuit 432 is used to limit the voltage of the sampling signal terminal (ADC-Uin) to 3.3V to prevent excessively high input signal voltage from damaging the A / D converter devices in the gating unit.

[0056] For example, with a 1000W high-power driver, a peak current of ±20A, and a sampling resistor R1 of 10mΩ, the target amplification factor for increasing the voltage from 0.4V to 3.3V is 8.25 times. Therefore, R4 is selected as 1kΩ and R5 as 8.25kΩ to meet the initial amplification circuit design requirements for path 1. In this case, only the data from ADC1_Uin needs to be collected as the actual current value for subsequent calculations.

[0057] For path 2, the amplification factor is also designed with R4 = 1kΩ and R5 = 55kΩ. In this case, the data of VOUT2 may exceed ±1.65V. To protect ADC2, a voltage clamping circuit is designed to ensure that the voltage output to ADC2 is not too high and to prevent damage.

[0058] The entire design ensures that the amplification factors of Path 1 and Path 2 are different. Path 1 has a smaller amplification factor to ensure safety, while Path 2 provides higher gain to meet the needs of different application scenarios. In this way, the system can flexibly respond to different current sampling requirements and ensure the safe operation of all ADC channels.

[0059] In one possible implementation, such as Figure 3 As shown, the filter circuit 431 includes a filter resistor R2 and a filter capacitor C1. The two ends of the filter resistor R2 are connected to the output terminal of the amplifier circuit and the clamping diode, respectively. The two ends of the filter capacitor C1 are connected to the filter resistor and the ground terminal (GND), respectively. The common terminal of the filter resistor R2 and the filter capacitor C1 is connected to the sampling signal terminal (ADC-Uin). By adding an RC filter circuit before the sampling signal output, circuit noise can be effectively reduced, and the circuit's anti-interference capability can be enhanced. This design ensures that the output sampling signal is more realistic and accurate, thereby improving the overall performance and reliability of the system.

[0060] In one possible implementation, such as Figure 3As shown, the amplifying circuit comprises a first amplifier U1, a third resistor R3, a fourth resistor R4 and a fifth resistor R5. Two input terminals of the first amplifier U1 are respectively connected to two ends of a sampling resistor R1, an output terminal of the first amplifier U1 is connected to one end of the third resistor R3, a second end of the third resistor R3 is connected to an output terminal of the amplifying circuit, two ends of the fourth resistor R4 are respectively connected to the other end of the sampling resistor R1 and a negative input terminal of the first amplifier U1, and two ends of the fifth resistor R5 are respectively connected to the negative input terminal of the first amplifier U1 and the second end of the third resistor R3. The amplification factor of the amplifying circuit is the ratio of the fifth resistor R5 to the fourth resistor R4, and the ratios of the fifth resistor R5 to the fourth resistor R4 in each sampling amplification path are set to different values, so that the amplification factors of the amplifying circuits of each sampling amplification path are different.

[0061] In a possible embodiment, as Figure 3 shown, the bias circuit 410 comprises a sixth resistor R6 and a second capacitor C2 which are connected in parallel with each other, one common end of the sixth resistor R6 and the second capacitor C2 is connected to a 1.65V power supply, and the other common end of the sixth resistor R6 and the second capacitor C2 is connected to a positive input terminal of the amplifier U1. The bias circuit 110 generates a 1.65V bias effect, so that the final collected voltage can be accurately characterized within the range of 0 to 3.3V. This design effectively shifts the signal center point to an intermediate value, thereby ensuring the flexibility and effectiveness of the entire acquisition range, making subsequent data processing more accurate, and improving the adaptability of the system.

[0062] The following describes the Figure 3 circuit structure of the circuit in further detail with reference to the accompanying drawings.

[0063] Refer to Figure 4 , which is a block diagram of a gating unit of a current sampling circuit applied to a servo motor provided by an embodiment of the present application. As Figure 4 shown, the software-controlled gating unit 300 comprises a multiplexer (MUX) 310 and an A / D converter (ADC) 320, the multiplexer 310 and the A / D converter 220 are connected in series with each other, the multiplexer 310 is connected to the sampling signal terminals (ADC-Uin) of n sampling amplification paths in the multi-channel sampling amplification paths, wherein the sampling signal terminal of the i-th sampling amplification circuit is ADCi_Uin, 1<i<n, n is a positive integer, and path selection is implemented by configuring the A / D converter 320.

[0064] For example, when the driver is connected to a small motor with a peak current of ±1A and a 3x overload capability, the maximum current is ±3A, which is equivalent to amplifying the voltage from 0.06V to 3.3V, requiring a magnification factor of 55x. By configuring amplification for path 2 with R4 = 1kΩ and R5 = 55kΩ, a 55x amplification effect can be directly achieved. In this case, only the data from ADC2_Uin needs to be collected as the actual current value for calculation.

[0065] This application embodiment improves upon the traditional current sampling circuit design, achieving dynamic adjustment of current resolution and significantly enhancing the accuracy of current sampling. The design employs a reasonable hardware architecture, allowing for more flexible setting of the current upper limit, effectively supporting applications where high-power servo drives operate on low-power motors. Users can freely define the current upper limit and select appropriate amplification paths based on actual operating conditions to meet diverse operational needs, avoiding wasted measurement range. The overall solution is simple in structure, highly feasible, and requires minimal modification to existing general-purpose circuit designs, making rapid integration and application more convenient.

[0066] In one possible implementation, the resistance value of the fifth resistor can be adjusted by: the fifth resistor being a variable resistor, where the amplification factor can be changed by changing the resistance value, or a node can be short-circuited among multiple fixed resistors.

[0067] See Figure 5 This is a schematic diagram of the circuit structure of a fifth resistor R5 in a single-channel sampling amplification path of a sampling amplification unit applied to a current sampling circuit of a servo motor, as provided in an embodiment of this application. Figure 5 As shown, multiple resistors (R51, R52, R53, R54) are connected in series, and multiple ports (A, B, C, D) are output. By shorting different ports, the resistance value between ports a and b is changed, thereby changing the amplification factor of the amplifier circuit.

[0068] This embodiment allows for gain adjustment by selecting the required amplification factor and configuring different resistor values ​​based on the defined upper limit of the operating current. For example, for a 1000W high-power driver with a peak current of ±20A, assuming a sampling resistor of 10 milliohms, the 0.4V voltage needs to be amplified to 3.3V, requiring an amplification factor of 8.25. According to the design, R4 is selected as 1kΩ and R51 as 8.25kΩ to ensure the initial amplification circuit requirement of ±20A peak current is met. Simultaneously, shorting A and D satisfies the condition that R7 / R6 is approximately equal to 8.25. When the driver is connected to a small motor with a peak current of ±1A and a 3x overload, the maximum current is ±3A, meaning that amplifying the 0.06V voltage to 3.3V requires an amplification factor of 55. Although R4 (1kΩ) and R51 (8.25kΩ) remain unchanged, the following adjustments are needed: R8 is set to 6.75kΩ, and both R9 and R10 are set to 20kΩ. By removing the short circuit between A and D, the required amplification factor of 55 can be achieved. Through these adjustments, the current value of the small motor within the ±3A range can be accurately represented on a 12-bit ADC of 0-3.3V, thereby improving the current resolution and effectively solving the problem of insufficient current control accuracy when a large driver drives a small motor.

[0069] See Figure 6 This is a schematic diagram of the single-channel sampling amplification path of the sampling amplification unit for a current sampling circuit applied to a servo motor, as provided in the embodiments of this application. Figure 6 As shown, in one possible implementation, the amplifier circuit further includes a second-stage amplifier circuit connected to the preamplifier circuit, including a second amplifier U2, a seventh resistor R7, an eighth resistor R8, and a ninth resistor R9. The positive input terminal of the second amplifier U2 is connected to the second terminal of the third resistor R3, the output terminal of the second amplifier U2 is connected to one end of the seventh resistor R7, the second terminal of the seventh resistor R7 is connected to the sampling signal terminal (ADC-Uin), the two ends of the eighth resistor R8 are respectively connected to the other end of the sampling resistor R1 and the negative input terminal of the second amplifier U2, the two ends of the ninth resistor R9 are respectively connected to the negative input terminal of the second amplifier U2 and the second terminal of the seventh resistor R7, the eighth resistor R8 is equal to the ninth resistor R9, and the amplification factor of the second-stage amplifier circuit is 1.

[0070] The bias circuit 410 also includes a sixth resistor R6 and a second capacitor C2 connected in parallel. One common terminal of the sixth resistor R6 and the second capacitor C2 is connected to a 1.65V power supply, and the other common terminal of the sixth resistor R6 and the second capacitor C2 is connected to the positive input terminal of the second amplifier U2. This embodiment differs from... Figure 3 A bias circuit is connected to the newly added second-stage amplifier circuit, which improves signal isolation and prevents the bias voltage from directly interfering with the previous stage amplifier circuit.

[0071] See Figure 7 This is a schematic diagram of the single-channel sampling amplification path of the sampling amplification unit for a current sampling circuit applied to a servo motor, as provided in the embodiments of this application. Figure 7 As shown, in one possible implementation, the sampling amplification path further includes a variable gain amplifier 440 and a voltage control circuit 450. The output of the voltage control circuit 450 is connected to the gain control pin of the variable gain amplifier 440. The two inputs of the variable gain amplifier 440 are respectively connected to the two ends of the sampling resistor R1, and the output of the variable gain amplifier 440 is connected to the input of the amplification circuit. The gain value of the variable gain amplifier changes with the voltage value at the output of the voltage control circuit, and its gain curve is shown in Figure 450. Figure 8 As shown, by adjusting the input voltage of the pin, a gain change of 0 to 10 times can be achieved.

[0072] For example, when connected to a 1000W high-power driver with a peak current of ±20A and a sampling resistor R1 of 10mΩ, the amplification factor for increasing a 0.4V voltage to 3.3V is 8.25. When the control voltage Vg is -0.8V, the amplification factor of the variable gain amplifier 440 is 0.9, and the ratio of R5 to R4 is approximately 9.17, thus meeting the initial amplifier circuit design requirement of a peak current of ±20A.

[0073] When the driver is connected to a small motor with a peak current of ±1A and a 3x overload capability, its maximum current is ±3A. In this case, the voltage needs to be amplified from 0.06V to 3.3V, resulting in a gain of 55. Keeping the hardware unchanged, R5 / R4 remains approximately 9.17 times, therefore the gain of the variable gain amplifier 440 should be adjusted to 6 times. Referring to the table, Vg needs to be set to 0.3V.

[0074] In summary, by modifying the current gain ratio in software, the operation of small motors can be controlled more precisely, improving the overall system performance. This design can simultaneously accommodate the 20A sampling current of a 1000W high-power driver and the 3A overload current of a 100W device, thus expanding the sampling current range. This flexibility allows the circuit to maintain good performance in different power application scenarios, meeting the needs of various operating conditions. This design effectively improves the system's adaptability and versatility, enabling it to function in a wide range of applications.

[0075] Corresponding to the above embodiments, this application provides a servo driver controlling an MCU.

[0076] See Figure 9 This is a structural block diagram of a servo driver controlling an MCU provided in an embodiment of this application. Figure 9As shown, the servo driver control MCU 500 includes a current sampling circuit 510. The specific details of the current sampling circuit 510 can be found in the description of the above embodiments; for the sake of brevity, they will not be repeated here.

[0077] Corresponding to the above embodiments, this application provides a servo driver control system.

[0078] See Figure 10 This is a structural block diagram of a servo driver control system provided in an embodiment of this application. Figure 10 As shown, the servo drive control system 600 includes a servo motor 700 and a servo drive control MCU 500. The specific details of the servo drive control MCU 500 can be found in the description of the above embodiments, and will not be repeated here for the sake of brevity.

[0079] Corresponding to the above embodiments, this application also provides a computer-readable storage medium, wherein the computer-readable storage medium may store a program, wherein when the program runs, it can control the device where the computer-readable storage medium is located to execute some or all of the steps in the above method embodiments. Specifically, the computer-readable storage medium may be a magnetic disk, an optical disk, read-only memory (ROM), or random access memory (RAM), etc.

[0080] Corresponding to the above embodiments, this application also provides a computer program product containing executable instructions that, when executed on a computer, cause the computer to perform some or all of the steps in the above method embodiments.

[0081] In this application embodiment, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent the existence of A alone, the simultaneous existence of A and B, or the existence of B alone. A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" and similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, and c can represent: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0082] Those skilled in the art will recognize that the units and algorithm steps described in the embodiments disclosed herein can be implemented using electronic hardware, computer software, or a combination of electronic hardware and software. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0083] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0084] In the several embodiments provided in this application, any function, if implemented as a software functional unit and sold or used as an independent product, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0085] The above description is merely a specific embodiment of this application. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the protection scope of this application. The protection scope of this application should be determined by the protection scope of the claims.

Claims

1. A current sampling circuit for a servo motor, characterized in that, include: A sampling unit, wherein the sampling unit is connected to a servo motor; A sampling amplification unit is connected to the sampling unit. The sampling amplification unit consists of at least two sampling amplification paths. Each sampling amplification path has a different amplification factor. Each sampling amplification path includes an amplification circuit and a bias circuit. The bias circuit is connected to the amplification circuit. For sampling amplification paths with an amplification factor greater than a preset value, a voltage clamping circuit is also provided. The voltage clamping circuit is connected to the output terminal of the amplification circuit. A gating unit is used to select a voltage signal from the multiple sampling amplification paths, process the data, and output it.

2. The current sampling circuit according to claim 1, characterized in that, The voltage clamping circuit includes a filter circuit, a protection circuit, and a sampling signal terminal; the filter circuit is connected to the sampling signal terminal, and the common terminal of the filter circuit and the protection circuit is connected to the output terminal of the amplifier circuit. The protection circuit includes a clamping diode, which includes a first diode and a second diode. The first diode and the second diode are connected in series. The common terminal of the first diode and the second diode is connected to the sampling signal terminal. The negative terminal of the first diode is connected to the power supply terminal, and the positive terminal of the second diode is connected to the ground terminal. The filtering circuit includes a filter resistor and a filter capacitor. The two ends of the filter resistor are connected to the output terminal of the amplifier circuit and the clamping diode, respectively. The two ends of the filter capacitor are connected to the filter resistor and the ground terminal, respectively. The common terminal of the filter resistor and the filter capacitor is connected to the sampling signal terminal.

3. The current sampling circuit according to claim 2, characterized in that, The gating unit includes a multiplexer and an A / D converter. The multiplexer is connected to the sampling signal terminal of each sampling amplification path in the multi-channel sampling amplification path, and the A / D converter is connected to the multiplexer.

4. The current sampling circuit according to claim 1, characterized in that, The amplification circuit includes a first amplifier, a third resistor, a fourth resistor, and a fifth resistor. The positive input terminal of the first amplifier is connected to the sampling unit, the output terminal of the first amplifier is connected to the first terminal of the third resistor, the two ends of the fourth resistor are respectively connected to the sampling unit and the negative input terminal of the first amplifier, and the two ends of the fifth resistor are respectively connected to the negative input terminal of the first amplifier and the second terminal of the third resistor.

5. The current sampling circuit according to claim 4, characterized in that, The resistance value adjustment method of the fifth resistor includes: the fifth resistor can be a variable resistor and / or a node can be shorted among multiple fixed resistors.

6. The current sampling circuit according to any one of claims 4 and 5, characterized in that, The bias circuit includes a sixth resistor and a second capacitor connected in parallel. One common terminal of the sixth resistor and the second capacitor is connected to a preset bias voltage, and the other common terminal of the sixth resistor and the second capacitor is connected to the positive input terminal of the first amplifier.

7. The current sampling circuit according to any one of claims 4 and 5, characterized in that, The amplifier circuit further includes a second amplifier, a seventh resistor, an eighth resistor, and a ninth resistor. The positive input terminal of the second amplifier is connected to the second terminal of the third resistor, the output terminal of the second amplifier is connected to the first terminal of the seventh resistor, the second terminal of the seventh resistor is connected to the sampling signal terminal, the two ends of the eighth resistor are respectively connected to the sampling unit and the negative input terminal of the second amplifier, and the two ends of the ninth resistor are respectively connected to the negative input terminal of the second amplifier and the second terminal of the seventh resistor. The eighth resistor is equal to the ninth resistor. The bias circuit also includes a sixth resistor and a second capacitor connected in parallel. One common terminal of the sixth resistor and the second capacitor is connected to a preset bias voltage, and the other common terminal of the sixth resistor and the second capacitor is connected to the positive input terminal of the second amplifier.

8. The current sampling circuit according to claim 4, characterized in that, The sampling amplification path further includes a variable gain amplifier and a voltage control circuit. The variable gain amplifier is connected to the sampling unit, and the output terminal of the voltage control circuit is connected to the gain control pin of the variable gain amplifier. The gain value of the variable gain amplifier changes with the voltage value at the output terminal of the voltage control circuit. The output terminal of the variable gain amplifier is connected to the input terminal of the amplification circuit.

9. A servo driver controlling an MCU, characterized in that, It has a current sampling circuit as described in any one of claims 1 to 8.

10. A servo drive control system, characterized in that, It includes a servo driver control MCU and a servo motor as described in claim 9.