A reset control circuit

Abstract

This utility model belongs to the technical field of reset circuits, and particularly relates to a reset circuit. The reset control circuit includes a power conversion module connected to the input power supply and a control chip, as well as a first reset circuit and a second reset circuit. The input terminal of the first reset circuit is connected to the input terminal and output terminal of the power conversion module, and the input terminal of the second reset circuit is connected to the input terminal of the power conversion module. The output terminals of the first and second reset circuits are connected in parallel to the reset terminal of the control chip. The first reset circuit compares the input terminal and the output terminal of the power conversion module to output a reset signal upon power-on. The second reset circuit detects the input terminal of the power conversion module to pull the reset signal low upon power-off. This avoids the situation where the reset signal remains high after a short power-off, preventing the device from powering on and thus preventing reset.

Description

Technical Field

[0001] This utility model belongs to the technical field of reset circuits, and in particular relates to a reset control circuit. Background Technology

[0002] In some electronic products, a reset chip is usually provided to provide a reset signal for the MCU. The reset chip does not output a reset signal when the MCU is started. After the power is turned off, the reset chip outputs a reset signal, so that the MCU is reset to the initial state that can be started.

[0003] When electronic products need to be repeatedly powered on and off for short periods, or during short-interruption power tests on electronic product docks, the load on the MCU's reset pin is usually light, causing the reset pin to lose power more slowly than the power supply. This means that even when the power supply is completely off, the MCU's reset pin remains at a high level. This issue can lead to the MCU failing to perform an initial reset and thus failing to boot properly when the electronic device attempts to restart quickly after a power outage, as the MCU's reset signal remains high. Utility Model Content

[0004] This utility model provides a reset control circuit through the following technical solution: In a first aspect, this utility model proposes a reset control circuit, comprising: The power conversion module is connected to the input power supply and the control chip. It is used to step down the input power supply and output it to the control chip for power supply. The system includes a reset module, which is equipped with a first reset circuit and a second reset circuit. The input terminal of the first reset circuit is connected to the input terminal and the output terminal of the power conversion module, the input terminal of the second reset circuit is connected to the input terminal of the power conversion module, and the output terminals of the first reset circuit and the second reset circuit are connected in parallel with the reset terminal of the control chip. Specifically, the first reset circuit compares the input terminal and the output terminal of the power conversion module to output a reset signal when the power is on, and the second reset circuit detects the input terminal of the power conversion module so that the reset signal is pulled low when the power is off.

[0005] The reset control circuit includes a power conversion module connected to the input power supply and control chip, as well as a reset module. It also includes a first reset circuit and a second reset circuit. The input of the first reset circuit is connected to the input and output of the power conversion module, and the input of the second reset circuit is also connected to the input of the power conversion module. The outputs of both the first and second reset circuits are connected in parallel to the reset terminal of the control chip. The first reset circuit compares the input and output of the power conversion module to output a reset signal upon power-up. The second reset circuit detects the input of the power conversion module to pull the reset signal low upon power-down. This prevents the reset signal from remaining high for a short period after power-up, which could lead to a failure to reset and prevent the device from powering on.

[0006] In some implementations, the first reset circuit includes a first comparator circuit, a first switch circuit, and a delay circuit; The first comparator circuit has a first input terminal, a second input terminal, and a first output terminal; the first input terminal is connected to the input terminal of the power conversion module, and the second input terminal is connected to the output terminal of the power conversion module; the first switch circuit is located between the reset terminal and the ground terminal, and has a first switch control terminal connected to the first output terminal to control the on / off state of the first switch circuit; the delay circuit is located between the first output terminal and the first switch circuit to delay the conduction of the first switch circuit when powered on, so that the reset terminal is connected to the ground terminal to output a reset signal.

[0007] The first reset circuit includes a first comparator circuit to compare the input and output terminals of the power conversion module, enabling input and output detection and timely circuit reset. A first switch circuit controls the connection between the reset terminal and ground, allowing the first comparator circuit to output a low-level reset signal when the reset terminal is grounded. A delay circuit provides a power-on reset function, preventing the first comparator circuit from initiating the reset process upon initial power-on.

[0008] In some embodiments, the first comparator circuit includes a first comparator, a first constant current source, a first reference voltage source, a first resistor, and a second resistor; the first comparator is provided with a first positive terminal, a first negative terminal, and a first comparator output terminal; The first positive terminal is connected to the input terminal of the power conversion module, and the first negative terminal is connected to the output terminal of the power conversion module. The output terminal of the first comparator is the first output terminal. The input terminal of the first constant current source is connected to the input terminal of the power conversion module, and the output terminal of the first constant current source, the first positive terminal, and the output terminal of the first reference voltage source are connected together. The input terminal of the first reference voltage source is connected to the ground terminal. The first resistor is placed between the output terminal of the power conversion module and the first negative terminal, and the second resistor is placed between the first negative terminal and the ground terminal.

[0009] The input and output terminals of the power conversion module are compared by the first comparator. By setting the first reference voltage source, the voltage at the output terminal of the power conversion module can be reduced and divided by the first and second resistors. If the voltage is lower than the first reference voltage, the first switching circuit is turned on to pull the reset terminal low.

[0010] In some embodiments, the delay circuit includes a delay chip and a first MOS transistor; the delay chip is provided with a delay input terminal, a delay output terminal, a delay control terminal, and an external delay input terminal; the delay input terminal is connected to the first output terminal, the delay output terminal is connected to the first switch control terminal, the delay control terminal is connected to the gate of the first MOS transistor, and the external delay input terminal is connected to an external delay control source; the first MOS transistor is an NMOS transistor, and the source of the first MOS transistor is connected to the ground terminal, and the drain of the first MOS transistor is connected to the external delay control source.

[0011] The delay circuit can force the first switch circuit to open for a certain period of time when the power is on, so as to realize the system power-on reset.

[0012] In some implementations, the first switching circuit includes a second MOSFET, the gate of which is connected to the delay input terminal, or the gate of which is connected to the first output terminal; the source of the second MOSFET is connected to the ground terminal, and the drain of the second MOSFET is connected to the reset terminal.

[0013] The first switching circuit uses a MOSFET to turn the circuit on and off, which enables the second MOSFET to control the connection between the ground terminal and the reset terminal, so that the reset terminal outputs a low-level reset signal.

[0014] In some implementations, the second reset circuit includes a second comparator circuit and a second switch circuit; The second comparator circuit has a third input terminal, a fourth input terminal, and a second output terminal; the third input terminal and the fourth input terminal are connected to the input terminals of the power conversion module; the second switch circuit is located between the reset terminal and the ground terminal, and has a second switch control terminal connected to the second output terminal to control the on / off state of the second switch circuit.

[0015] The second reset circuit includes a second comparator circuit, which can detect changes in the input terminal of the power conversion module. When the circuit is powered off, the second switch circuit grounds the reset terminal and pulls it low.

[0016] In some embodiments, the second comparator circuit includes a second comparator, a second constant current source, a second reference voltage source, a third resistor, and a fourth resistor; the second comparator is provided with a second positive terminal, a second negative terminal, and a second comparator output terminal; The second positive terminal is connected to the input terminal of the power conversion module, the second negative terminal is connected to the input terminal of the power conversion module, and the output terminal of the second comparator is the second output terminal; the input terminal of the second constant current source is connected to the input terminal of the power conversion module, and the output terminal of the second constant current source, the second positive terminal, and the output terminal of the second reference voltage source are connected; the input terminal of the second reference voltage source is connected to the ground terminal; the third resistor is set between the output terminal of the power conversion module and the second positive terminal, and the fourth resistor is set between the second negative terminal and the ground terminal.

[0017] When the input voltage of the power conversion module drops to the second reference voltage, the comparator detects the voltage drop and opens the second switching circuit to achieve the effect of pulling the reset terminal low.

[0018] In some implementations, the second switching circuit includes a third MOSFET, the gate of which is connected to the second output terminal; the source of the third MOSFET is connected to the ground terminal; and the drain of the third MOSFET is connected to the reset terminal.

[0019] The second switching circuit is turned on and off by a third MOSFET.

[0020] In some implementations, the power conversion module is provided with a first buck circuit and a second buck circuit; The input terminal of the first step-down circuit is connected to the input terminal of the power conversion module, and the output terminal of the first step-down circuit is connected to the first power input terminal of the control chip and the input terminal of the second step-down circuit; the output terminal of the second step-down circuit is connected to the second power input terminal of the control chip.

[0021] The high voltage at the input terminal of the power conversion module is stepped down to two low-level input control chips through the first step-down circuit and the second step-down circuit.

[0022] In some implementations, the reset terminal is connected to one end of the fifth resistor, and the other end of the fifth resistor is connected to the pull-up power supply.

[0023] At least one pull-up resistor and pull-up power supply are provided at the reset terminal so that the reset terminal is normally a high-level input.

[0024] The beneficial effects of this utility model's reset control circuit are: The reset control circuit includes a power conversion module connected to the input power supply and control chip, as well as a reset module. It also includes a first reset circuit and a second reset circuit. The input of the first reset circuit is connected to the input and output of the power conversion module, and the input of the second reset circuit is also connected to the input of the power conversion module. The outputs of both the first and second reset circuits are connected in parallel to the reset terminal of the control chip. The first reset circuit compares the input and output of the power conversion module to output a reset signal upon power-up. The second reset circuit detects the input of the power conversion module to pull the reset signal low upon power-down. This prevents the reset signal from remaining high for a short period after power-up, which could lead to a failure to reset and prevent the device from powering on. Attached Figure Description

[0025] Figure 1 This is the framework of Embodiment 1 of the reset control circuit of this utility model. Figure 1 ; Figure 2 This forms the framework for Embodiments 2 and 3 of the reset control circuit of this utility model. Figure 2 ; Figure 3 The circuit diagrams are for Embodiments 2 and 3 of the reset control circuit of this utility model.

[0026] Figure label: R1, the first resistor; R2, the second resistor; R3, the third resistor; R4, the fourth resistor; R5, the fifth resistor; U1, first constant current source; U2, second constant current source; Vref1, first reference voltage source; Vref2, second reference voltage source; Q1, first MOSFET; Q2, second MOSFET; Q3, third MOSFET; A1, First comparator; A2, Second comparator; 2_1, Reset terminal; VCC, Pull-up power supply; 1_1, Input terminal of power conversion module; 52_1, Output terminal of power conversion module; DF, External delay input terminal; 1. Input power supply; 2. Control chip; 3. Reset module; 31. First reset circuit; 311. First comparator circuit; 312. First switch circuit; 313. Delay circuit; 32. Second reset circuit; 321. Second comparator circuit; 322. Second switch circuit; 5. Power conversion module; 51. First step-down circuit; 52. Second step-down circuit. Detailed Implementation

[0027] The preferred embodiments of this application will now be described in detail with reference to the accompanying drawings, so that the advantages and features of this application can be more easily understood by those skilled in the art, thereby providing a clearer definition of the scope of protection of this application.

[0028] Please refer to the diagrams, where the same component symbols represent the same components. The principles of this application are illustrated by way of example implementation in a suitable computing environment. The following description is based on the specific embodiments of this application exemplified, and should not be construed as limiting other specific embodiments not detailed herein.

[0029] As used herein, the term "module" can refer to a software or hardware object that executes on the computing system. The various components, modules, engines, and services described herein can be implementations on the computing system. The apparatuses and methods described herein can be implemented in software or hardware, both of which are within the scope of this application.

[0030] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0031] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0032] Example 1: like Figure 1 As shown, this utility model proposes a reset control circuit, including: The power conversion module 5 is connected to the input power supply 1 and the control chip 2, and is used to step down the input power supply 1 and output it to the control chip 2 for power supply. And a reset module 3, which is provided with a first reset circuit 31 and a second reset circuit 32. The input terminal of the first reset circuit 31 is connected to the input terminal 1_1 and the output terminal 52_1 of the power conversion module. The input terminal of the second reset circuit 32 is connected to the input terminal 1_1 of the power conversion module. The output terminals of the first reset circuit 31 and the second reset circuit 32 are connected in parallel to the reset terminal 2_1 of the control chip 2. Specifically, the first reset circuit 31 compares the input terminal 1_1 and the output terminal 52_1 of the power conversion module to output a reset signal when the power is on, and the second reset circuit 32 detects the input terminal 1_1 of the power conversion module so that the reset signal is pulled low when the power is off.

[0033] Specifically, a power conversion module 5 is provided, connected to the input power supply 1 and the control chip 2, and further positioned between the input power supply 1 and the control chip 2 to reduce or transform the voltage of the input power supply 1. A reset module 3 is also provided, which includes a first reset circuit 31 to reset the entire circuit when it is turned on. It also determines whether a reset is needed by comparing the changes at the input terminal 1_1 and the output terminal 52_1 of the power conversion module. A second reset circuit 32 is provided to determine whether the input terminal 1_1 of the power conversion module is turned off. Upon detecting a turn-off, it immediately pulls down the voltage at the reset terminal 2_1. The first reset circuit 31 and the second reset circuit 32 are connected in parallel, meaning that both can independently pull down the level of the reset terminal 2_1 to independently control the output of a low-level reset signal.

[0034] Furthermore, the reset control circuit can be a chip module, which may include a first input pin and a second input pin. The first input pin is connected to the input terminal 1_1 of the power conversion module, and the second input pin is connected to the output terminal 52_1 of the power conversion module. It also includes a reset pin and a ground pin, which are connected to the reset terminal 2_1 and the ground pin is connected to the ground terminal. Further, a second reset circuit 32 structure can be added to the R3118xxxxA series chip and connected according to the above connection method to achieve the same function. In some more specific embodiments, a C_D pin is also included, which can be grounded, and a capacitor can be placed between the ground and this pin. Furthermore, a 470KΩ resistor can be placed between the reset terminal 2_1 and the input terminal 1_1 of the power conversion module to protect the circuit and further prevent signal interference.

[0035] The reset control circuit includes a power conversion module 5 connected to the input power supply 1 and the control chip 2, and a reset module 3. It also includes a first reset circuit 31 and a second reset circuit 32. The input terminal of the first reset circuit 31 is connected to the input terminal 1_1 and the output terminal 52_1 of the power conversion module, and the input terminal of the second reset circuit 32 is connected to the input terminal 1_1 of the power conversion module. The output terminals of the first and second reset circuits are connected in parallel to the reset terminal 2_1 of the control chip 2. The first reset circuit 31 compares the input terminal 1_1 and the output terminal 52_1 of the power conversion module to output a reset signal upon power-on. The second reset circuit 32 detects the input terminal 1_1 of the power conversion module to pull the reset signal low upon power-off. This prevents the reset signal from remaining high for a short period upon power-on, which could lead to a failure to reset and thus prevent the device from powering on.

[0036] Example 2: like Figures 2-3 As shown, this embodiment optimizes and further explains the circuit structure mentioned in Embodiment 1 based on Embodiment 1. The differences are as follows: In some embodiments, the first reset circuit 31 includes a first comparison circuit 311, a first switching circuit 312, and a delay circuit 313; The first comparator circuit 311 has a first input terminal, a second input terminal, and a first output terminal; the first input terminal is connected to the input terminal 1_1 of the power conversion module, and the second input terminal is connected to the output terminal 52_1 of the power conversion module; the first switch circuit 312 is located between the reset terminal 2_1 and the ground terminal, and has a first switch control terminal connected to the first output terminal to control the on / off state of the first switch circuit 312; the delay circuit 313 is located between the first output terminal and the first switch circuit 312 to delay the conduction of the first switch circuit 312 when powered on, so that the reset terminal 2_1 is connected to the ground terminal to output a reset signal.

[0037] Specifically, the first comparison circuit 311 is equipped with a first input terminal, a second input terminal, and a first output terminal. The first and second input terminals are used for voltage comparison to output a reset signal in a timely manner when the voltage changes. The first and second input terminals are the input terminal 1_1 and the output terminal 52_1 of the power conversion module, respectively. Since the power conversion module 5 itself has a light load and usually contains capacitors, the voltage drop at the output terminal 52_1 of the power conversion module will be relatively lagging and slower than that at the input terminal 1_1. Therefore, the need to output a reset signal can be determined by comparing the first and second input terminals. A first switching circuit 312 is also provided, which is located between the ground terminal and the reset terminal 2_1 and is switched on and off through the first output terminal. The first switching circuit 312 can be a controllable switching module or device such as a relay, MOSFET, or transistor. A delay circuit 313 is also provided, which is equipped with a delay module and a controllable pin that forces the reset terminal 2_1 low to output a low-level reset signal when powered on. This can be achieved by controlling the delay time using the C_D pin mentioned in Example 1.

[0038] The first reset circuit 31 includes a first comparator circuit 311 to compare the input terminal 1_1 and the output terminal 52_1 of the power conversion module, thereby detecting the input and output of the circuit and enabling timely reset. A first switch circuit 312 controls the connection between the reset terminal 2_1 and the ground terminal, allowing the first comparator circuit 311 to control the reset terminal 2_1 to output a low-level reset when grounded. A delay circuit 313 provides a reset function upon power-on, in case the first comparator circuit 311 fails to initiate the reset upon initial power-on.

[0039] In some embodiments, the first comparison circuit 311 includes a first comparator A1, a first constant current source U1, a first reference voltage source Vref1, a first resistor R1, and a second resistor R2; the first comparator A1 is provided with a first positive terminal, a first negative terminal, and a first comparator A1 output terminal; The first positive terminal is connected to the input terminal 1_1 of the power conversion module, and the first negative terminal is connected to the output terminal 52_1 of the power conversion module. The output terminal of the first comparator A1 is the first output terminal. The input terminal of the first constant current source U1 is connected to the input terminal 1_1 of the power conversion module. The output terminal of the first constant current source U1, the first positive terminal, and the output terminal of the first reference voltage source Vref1 are connected together. The input terminal of the first reference voltage source Vref1 is connected to the ground terminal. The first resistor R1 is set between the output terminal 52_1 of the power conversion module and the first negative terminal, and the second resistor R2 is set between the first negative terminal and the ground terminal.

[0040] Specifically, the first comparison circuit 311 is implemented by the first comparator A1. By comparing the level difference between the first input terminal and the second input terminal, it detects the voltage at the input terminal 1_1 of the power conversion module. A first reference voltage source Vref1 is connected to the first positive terminal, so that when the voltage at the input terminal 1_1 of the power conversion module is lower than the first reference voltage source Vref1, the first output terminal outputs a low level, and vice versa, it outputs a high level to connect the reset terminal 2_1 and the ground terminal, thereby realizing the low-level signal output of the reset terminal 2_1. A first resistor R1 and a second resistor R2 are used to divide the voltage, so that the input voltage of the first comparator A1 is compared within a lower range, avoiding the uncertainty of comparison due to excessively large voltages, and also preventing the output voltage at the first output terminal from exceeding or falling below the on / off control voltage range of the first switching circuit 312. A first constant current source U1 is set at the first positive terminal to stabilize the first reference voltage source Vref1.

[0041] The first comparator A1 compares the input terminal 1_1 and the output terminal 52_1 of the power conversion module. By setting the first reference voltage source Vref1, the voltage at the output terminal 52_1 of the power conversion module can be reduced. After voltage division by the first resistor R1 and the second resistor R2, if it is lower than the first reference voltage, the first switch circuit 312 is turned on to pull the reset terminal 2_1 low.

[0042] In some embodiments, the delay circuit 313 includes a delay chip and a first MOS transistor Q1; the delay chip is provided with a delay input terminal, a delay output terminal, a delay control terminal, and an external delay input terminal DF; the delay input terminal is connected to the first output terminal, the delay output terminal is connected to the first switch control terminal, the delay control terminal is connected to the gate of the first MOS transistor Q1, and the external delay input terminal DF is connected to an external delay control source; the first MOS transistor Q1 is an NMOS transistor, and the source of the first MOS transistor Q1 is connected to the ground terminal, and the drain of the first MOS transistor Q1 is connected to the external delay control source.

[0043] Specifically, a delay circuit 313 is positioned between the first reset circuit 31 and the first switching circuit 312. It is switched on and off via the first MOSFET Q1, and the delay time is controlled by the external delay input terminal DF, which can be the C_D pin mentioned in Embodiment 1. After a certain time, switching the first MOSFET Q1 on and off pulls the external delay input terminal DF low, stopping the high-level output of the delay output terminal. This prevents the reset terminal 2_1 from being continuously grounded due to the first switching circuit 312 being constantly on. After the delay circuit 313 completes its delay function, it becomes a normally open circuit, meaning the delay input terminal and delay output terminal are essentially directly connected, allowing direct control of the first reset circuit 31 after power-on.

[0044] The delay circuit 313 can force the first switch circuit 312 to open for a certain period of time when the power is on, so as to realize the system power-on reset.

[0045] In some embodiments, the first switching circuit 312 includes a second MOSFET Q2, the gate of which is connected to the delay input terminal, or the gate of which is connected to the first output terminal; the source of which is connected to the ground terminal, and the drain of which is connected to the reset terminal 2_1.

[0046] Specifically, the first switching circuit 312 includes a second MOSFET Q2, which controls the switching between the reset terminal 2_1 and the ground terminal, thereby pulling the signal at the reset terminal 2_1 low to output a low-level reset signal. The gate of the second MOSFET Q2 also controls the switching of the first switching circuit 312.

[0047] The first switching circuit 312 switches on and off via a MOSFET, enabling the second MOSFET Q2 to control the connection between the ground terminal and the reset terminal 2_1, thus causing the reset terminal 2_1 to output a low-level reset signal.

[0048] In some embodiments, the second reset circuit 32 includes a second comparison circuit 321 and a second switching circuit 322; The second comparator circuit 321 is provided with a third input terminal, a fourth input terminal, and a second output terminal; the third input terminal and the fourth input terminal are connected to the input terminal 1_1 of the power conversion module; the second switch circuit 322 is provided between the reset terminal 2_1 and the ground terminal, and is provided with a second switch control terminal connected to the second output terminal to control the on and off of the second switch circuit 322.

[0049] Specifically, the first reset circuit 31 and the second reset circuit 32 have basically the same structure, except that the delay circuit 313 is not used. Their main function is to detect a drop in the input terminal 1_1 of the power conversion module, such as a disconnection or voltage instability, and cause the reset terminal 2_1 to output a low-level reset signal. Therefore, the input terminal of the second reset signal is the input terminal 1_1 of the power conversion module. Because of their different functions, the first reset circuit 31 and the second reset circuit 32 are connected in parallel so that they can be controlled independently. Furthermore, the first switch circuit 312 and the second switch circuit 322 are connected in parallel between the reset terminal 2_1 and the ground terminal to achieve the function of independently pulling the reset terminal 2_1 low.

[0050] The second reset circuit 32 includes a second comparator circuit 321, which can detect changes in the input terminal 1_1 of the power conversion module. When the circuit is powered off, the second switch circuit 322 grounds the reset terminal 2_1 and pulls the reset terminal 2_1 low.

[0051] In some embodiments, the second comparator circuit 321 includes a second comparator A2, a second constant current source U2, a second reference voltage source Vref2, a third resistor R3, and a fourth resistor R4; the second comparator A2 is provided with a second positive terminal, a second negative terminal, and a second comparator A2 output terminal; The second positive terminal is connected to the input terminal 1_1 of the power conversion module, and the second negative terminal is also connected to the input terminal 1_1 of the power conversion module. The output terminal of the second comparator A2 is the second output terminal. The input terminal of the second constant current source U2 is connected to the input terminal 1_1 of the power conversion module. The output terminal of the second constant current source U2, the second positive terminal, and the output terminal of the second reference voltage source Vref2 are connected together. The input terminal of the second reference voltage source Vref2 is connected to the ground terminal. The third resistor R3 is placed between the output terminal 52_1 of the power conversion module and the second positive terminal, and the fourth resistor R4 is placed between the second negative terminal and the ground terminal.

[0052] Specifically, the second comparator circuit 321 can be structurally similar to the first comparator circuit 311, and its internal components can also function similarly. The difference is that both input terminals of the second comparator A2 are connected to the input terminal 1_1 of the power conversion module, and the second reference voltage source Vref2 is connected to the second negative terminal to achieve logical inversion with the first comparator circuit 311. That is, when the input voltage at the second positive terminal is less than the input voltage at the second negative terminal, a high-level output is generated, causing the second switch circuit 322 to conduct. The beneficial effect of this method is that it ensures that the first switch circuit 312 and the second switch circuit 322 are essentially in a state of one being on and the other off during actual use, avoiding mutual interference caused by simultaneous control. Furthermore, after setting a reference voltage, when the input voltage at the input terminal 1_1 of the power conversion module is less than the reference voltage, the second switch circuit 322 turns on, directly pulling the reset terminal 2_1 low. This avoids the problem of startup failure caused by the reset terminal 2_1 not being pulled low during a second startup.

[0053] When the voltage at the input terminal 1_1 of the power conversion module drops to the second reference voltage, the comparator detects the voltage drop and opens the second switch circuit 322 to achieve the effect of pulling the reset terminal 2_1 low.

[0054] In some embodiments, the second switching circuit 322 includes a third MOSFET Q3, the gate of which is connected to the second output terminal; the source of which is connected to the ground terminal; and the drain of which is connected to the reset terminal 2_1.

[0055] Specifically, the second switch circuit 322 can have the same structure and function as the first switch circuit 312, and is used to connect the reset terminal 2_1 and the ground terminal to pull down the level of the reset terminal 2_1.

[0056] The second switching circuit 322 is switched on and off by the third MOSFET Q3.

[0057] Example 3: Please refer to the following: Figures 2-3 As shown, this embodiment further explains and optimizes the power conversion module 5 mentioned in Embodiment 1: In some embodiments, the power conversion module 5 is provided with a first step-down circuit 51 and a second step-down circuit 52; The input terminal of the first step-down circuit 51 is connected to the input terminal 1_1 of the power conversion module. The output terminal of the first step-down circuit 51 is connected to the first power input terminal of the control chip 2 and the input terminal of the second step-down circuit 52. The output terminal of the second step-down circuit 52 is connected to the second power input terminal of the control chip 2.

[0058] Specifically, the voltage at the input terminal 1_1 of the power conversion module is stepped down by the first step-down circuit 51 and the second step-down circuit 52. Furthermore, after the first step-down circuit 51 performs a first step-down, the second step-down circuit 52 performs a second step-down. In some more specific embodiments, the input terminal 1_1 of the power conversion module is 12V. The first step-down circuit 51 steps down from 12V to 5V, while the second step-down circuit 52 steps down the 5V to 3.3V, thus providing the control chip 2 with different voltages: 12V, 5V, and 3.3V.

[0059] The high voltage at the input terminal 1_1 of the power conversion module 5 is stepped down to two low-level input control chips 2 through the first step-down circuit 51 and the second step-down circuit 52.

[0060] In some embodiments, the reset terminal 2_1 is connected to one end of the fifth resistor R5, and the other end of the fifth resistor R5 is connected to the pull-up power supply VCC.

[0061] Specifically, by using the fifth resistor R5 and the pull-up power supply VCC, the reset terminal 2_1 is kept at a high level during normal operation.

[0062] At least one pull-up resistor and pull-up power supply VCC are provided at the reset terminal 2_1, so that the reset terminal 2_1 is normally a high-level input.

[0063] The embodiments of this application have been described in detail above with reference to the accompanying drawings. However, this application is not limited to the above embodiments. Within the scope of knowledge possessed by those skilled in the art, various changes can be made without departing from the spirit of this application.

Claims

1. A reset control circuit, characterized in that, include: The power conversion module (5) is connected to the input power supply (1) and the control chip (2) and is used to step down the input power supply (1) and output it to the control chip (2) for power supply. The system includes a reset module (3), which is equipped with a first reset circuit (31) and a second reset circuit (32). The input terminal of the first reset circuit (31) is connected to the input terminal of the power conversion module and the output terminal of the power conversion module. The input terminal of the second reset circuit (32) is connected to the input terminal of the power conversion module. The output terminals of the first reset circuit (31) and the second reset circuit (32) are connected in parallel with the reset terminal of the control chip (2). The first reset circuit (31) compares the input terminal of the power conversion module with the output terminal of the power conversion module to output a reset signal when the power is on, and the second reset circuit (32) detects the input terminal of the power conversion module so that the reset signal is pulled low when the power is off.

2. The reset control circuit according to claim 1, characterized in that, The first reset circuit (31) includes a first comparison circuit (311), a first switching circuit (312), and a delay circuit (313). The first comparator circuit (311) is provided with a first input terminal, a second input terminal and a first output terminal; the first input terminal is connected to the input terminal of the power conversion module and the second input terminal is connected to the output terminal of the power conversion module; the first switch circuit (312) is provided between the reset terminal and the ground terminal and is provided with a first switch control terminal connected to the first output terminal to control the on and off of the first switch circuit (312); The delay circuit (313) is located between the first output terminal and the first switch circuit (312) to delay the first switch circuit (312) to conduct when the power is on, so that the reset terminal is connected to the ground terminal to output a reset signal.

3. The reset control circuit according to claim 2, characterized in that, The first comparator circuit (311) includes a first comparator A1, a first constant current source U1, a first reference voltage source, a first resistor R1, and a second resistor R2; the first comparator A1 is provided with a first positive terminal, a first negative terminal, and a first comparator A1 output terminal; The first positive terminal is connected to the input terminal of the power conversion module, the first negative terminal is connected to the output terminal of the power conversion module, and the output terminal of the first comparator A1 is the first output terminal; the input terminal of the first constant current source U1 is connected to the input terminal of the power conversion module, and the output terminal of the first constant current source U1, the first positive terminal, and the output terminal of the first reference voltage source are connected; the input terminal of the first reference voltage source is connected to the ground terminal; the first resistor R1 is disposed between the output terminal of the power conversion module and the first negative terminal, and the second resistor R2 is disposed between the first negative terminal and the ground terminal.

4. The reset control circuit according to claim 2, characterized in that, The delay circuit (313) includes a delay chip and a first MOS transistor Q1; the delay chip is provided with a delay input terminal, a delay output terminal, a delay control terminal and an external delay input terminal; the delay input terminal is connected to the first output terminal, the delay output terminal is connected to the first switch control terminal, the delay control terminal is connected to the gate of the first MOS transistor Q1, and the external delay input terminal is connected to an external delay control source; the first MOS transistor Q1 is an NMOS transistor, and the source of the first MOS transistor Q1 is connected to the ground terminal, and the drain of the first MOS transistor Q1 is connected to the external delay control source.

5. The reset control circuit according to claim 4, characterized in that, The first switching circuit (312) includes a second MOS transistor Q2, the gate of the second MOS transistor Q2 is connected to the delay input terminal, or the gate of the second MOS transistor Q2 is connected to the first output terminal; the source of the second MOS transistor Q2 is connected to the ground terminal, and the drain of the second MOS transistor Q2 is connected to the reset terminal.

6. The reset control circuit according to claim 1, characterized in that, The second reset circuit (32) includes a second comparator circuit (321) and a second switch circuit (322); The second comparator circuit (321) is provided with a third input terminal, a fourth input terminal and a second output terminal; the third input terminal and the fourth input terminal are connected to the input terminal of the power conversion module; the second switch circuit (322) is provided between the reset terminal and the ground terminal, and is provided with a second switch control terminal connected to the second output terminal to control the on and off of the second switch circuit (322).

7. The reset control circuit according to claim 6, characterized in that, The second comparator circuit (321) includes a second comparator A2, a second constant current source U2, a second reference voltage source, a third resistor R3, and a fourth resistor R4; the second comparator A2 is provided with a second positive terminal, a second negative terminal, and a second comparator A2 output terminal; The second positive terminal is connected to the input terminal of the power conversion module, the second negative terminal is connected to the input terminal of the power conversion module, and the output terminal of the second comparator A2 is the second output terminal; the input terminal of the second constant current source U2 is connected to the input terminal of the power conversion module, and the output terminal of the second constant current source U2, the second positive terminal, and the output terminal of the second reference voltage source are connected; the input terminal of the second reference voltage source is connected to the ground terminal; the third resistor R3 is disposed between the output terminal of the power conversion module and the second positive terminal, and the fourth resistor R4 is disposed between the second negative terminal and the ground terminal.

8. The reset control circuit according to claim 6, characterized in that, The second switching circuit (322) includes a third MOS transistor Q3, the gate of which is connected to the second output terminal; the source of which is connected to the ground terminal; and the drain of which is connected to the reset terminal.

9. The reset control circuit according to claim 1, characterized in that, The power conversion module (5) is provided with a first step-down circuit (51) and a second step-down circuit (52); The input terminal of the first step-down circuit (51) is connected to the input terminal of the power conversion module, and the output terminal of the first step-down circuit (51) is connected to the first power input terminal of the control chip (2) and the input terminal of the second step-down circuit (52); the output terminal of the second step-down circuit (52) is connected to the second power input terminal of the control chip (2).

10. The reset control circuit according to claim 1, characterized in that, The reset terminal is connected to one end of the fifth resistor R5, and the other end of the fifth resistor R5 is connected to the pull-up power supply VCC.

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