Current steering DAC and electronic device

Abstract

This application relates to a current-controlled DAC and an electronic device. The current-controlled DAC includes: a driving circuit, a reference current generating circuit, and several current shunt circuits; the current shunt circuit includes: a reference current generating circuit and a shunt circuit for shunting current based on the reference current output by the reference current generating circuit; the shunt circuit includes: a shunt resistor and N shunt devices M for shunting current. si To form N current branches and output N shunt currents I from the N current branches. si One end of the shunt resistor is connected to the power supply or ground. One end of each of the N shunt devices is connected to the other end of the shunt resistor. The other ends of each of the N shunt devices are electrically connected to one end of each of the N switch groups. The control terminals of the N shunt devices are all connected to the reference current generating circuit. The other ends of the N switch groups are used to connect to the load, and the switch groups are used to control whether the shunt current flows into the load. The current-steering DAC of this application has the advantages of low mismatch and low temperature drift, and its circuit structure is simple and its cost is low.

Description

Technical Field

[0001] This application relates to the field of electronic circuit technology, specifically to a current-controlled digital-to-analog converter and electronic device. Background Technology

[0002] Digital-to-analog converters (DACs) convert digital signals to analog signals, making them widely used. Current-steering DACs, as an important DAC implementation architecture, are typically used in high-speed, high-precision applications. A current-steering DAC usually consists of basic current source weighting units, which sum the current source weights based on the input digital signal to obtain the corresponding analog signal.

[0003] The traditional current-driven DAC structure is shown in the attached figure. Figure 1 Considering factors such as speed, area, power consumption, matching, and performance, current-controlled DACs are typically composed of segmented current sources, with different segments representing different weights. Generally, the weights of higher-order segments are composed of identical weights encoded by thermometers, while the weights of lower-order segments are composed of binary weights encoded by binary codes. To obtain the desired current weights in a current-controlled DAC, methods such as scaling the weight of a current source proportionally or splitting a current source with a specific weight according to a certain ratio can be used. Current source splitting technology, on the other hand, splits a current source with a specific weight according to a certain ratio to achieve current splitting.

[0004] However, existing current-controlled DACs suffer from low current matching between the shunt current sources, resulting in significant mismatch. This current matching is affected by various factors, such as the inherent accuracy of the current source and the matching accuracy of the shunt devices. Furthermore, they also suffer from complex circuit structures, high costs, and even circuit instability. Summary of the Invention

[0005] To address some or all of the aforementioned technical problems, this application provides a current-driven DAC.

[0006] The current-controlled DAC involved in this application includes: a drive circuit connected to the input digital signal, a reference current generation circuit, and several current shunt circuits; the several current shunt circuits include: a reference current generation circuit and a current shunt circuit that shunts current based on the reference current output by the reference current generation circuit; the current shunt circuit includes: a shunt resistor, and N shunt devices M for current shunt. si To form N current branches and output N shunt currents I from the N current branches. si,1≤i≤N; One end of the shunt resistor is connected to the power supply or ground, one end of each of the N shunt devices is electrically connected to the other end of the shunt resistor, the other end of each of the N shunt devices is electrically connected to one end of each of the N switch groups, the control terminals of the N shunt devices are all electrically connected to the reference current generating circuit, and the other end of the N switch groups is used to connect to the load. The switch groups are used to control whether the shunt current flows into the load.

[0007] In a preferred embodiment, the shunt device is a PMOS, NMOS, NPN, or PNP type current source.

[0008] In a preferred embodiment, the shunt device is a PMOS or PNP current source, one end of the shunt resistor is connected to a power supply, the source / emitter of each of the N shunt devices is electrically connected to the other end of the shunt resistor, the drain / collector of each of the N shunt devices is electrically connected to one end of each of the N switch groups, and the control terminal of each of the N shunt devices is electrically connected to the first bias voltage and the reference current generation circuit; or the shunt device is an NMOS or NPN current source, one end of the shunt resistor is grounded, the source / emitter of each of the N shunt devices is electrically connected to the other end of the shunt resistor, the drain / collector of each of the N shunt devices is electrically connected to one end of each of the N switch groups, and the control terminal of each of the N shunt devices is electrically connected to the first bias voltage and the reference current generation circuit.

[0009] In a preferred embodiment, the reference current generating circuit includes: a first reference resistor R0 and a first reference current source M of the same type as the shunt device. S0 and the second reference resistor R ref One end of the first reference resistor is connected to the power supply or ground, and the other end of the first reference resistor is electrically connected to one end of the second reference resistor through the first reference current source. The other end of the second reference resistor is grounded, and the control terminal of the first reference current source is electrically connected to the control terminals of the N shunt devices and the first bias voltage.

[0010] In a preferred embodiment, the load includes a first load and a second load; the switch group is a differential switch, the switch group includes two switches, one of which is turned on and the other is turned off; the other end of each shunt device is connected to the first load through a switch in the switch group, and the other end of each shunt device is connected to the second load through another switch in the switch group.

[0011] In a preferred embodiment, the current shunt circuit further includes one or Y stacked isolation layers to improve the matching between the N shunt currents;

[0012] Each isolation layer includes N isolation devices Mci 1≤i≤N, the type of each isolation device is the same as the type of the shunt device, and each shunt device M si The switch group is connected to the isolation device Mci in each isolation layer in sequence. The control terminals of the N isolation devices in each isolation layer are all electrically connected to the reference current generating circuit and are all connected to the same bias voltage.

[0013] In a preferred embodiment, the N shunt devices are configured as a single layer, and the shunt devices of the single layer are stacked with the Y-layer isolation layer.

[0014] In a preferred embodiment, the isolation layer is a single layer.

[0015] In a preferred embodiment, the reference current generation circuit includes: a first reference resistor R0 and a first reference current source M of the same type as the shunt device. S0 A plurality of second reference current sources M, the same number as the number of layers of the isolation layer. c0 and the second reference resistor R ref The types of several second reference current sources are the same as the types of the isolation devices; one end of the first reference resistor is connected to the power supply or ground, and the other end of the first reference resistor is electrically connected to one end of the second reference resistor in sequence through the first reference current source and the several second reference current sources. The other end of the second reference resistor is grounded. The control terminal of the first reference current source is electrically connected to the control terminals of the N shunt devices and the first bias voltage. The control terminals of the N isolation devices of one isolation layer are all electrically connected to the control terminals of the second reference current sources of their corresponding layers and are all connected to the same bias voltage.

[0016] In a preferred embodiment, the size ratio of the N isolation devices in each isolation layer is the same as the size ratio of the N shunt devices, and the size ratio of the device is the ratio of the width of the device to the length of the device.

[0017] This application also proposes an electronic device comprising any of the aforementioned current steering DACs.

[0018] The current-steering DAC provided in this application uses a reference current generation circuit and a shunt circuit that shunts the current based on the reference current output by the reference current generation circuit. This allows the DAC to shunt a weighted current, thereby obtaining the desired current weight. Furthermore, the shunt circuit achieves current shunting directly through a shunt resistor and N shunt devices. Correspondingly, one end of the shunt resistor is connected to the power supply or ground, one end of each of the N shunt devices is electrically connected to the other end of the shunt resistor, the other end of each of the N shunt devices is electrically connected to one end of each of the N switch groups, the control terminals of each of the N shunt devices are electrically connected to the reference current generation circuit, and the other end of each of the N switch groups is used to connect to the load. The switch groups are used to control whether the shunt current flows into the load. Therefore, this application can directly utilize shunt resistors and shunt devices to achieve current shunting, resulting in better matching between the shunt currents in the current-steering DAC, lower mismatch, and lower temperature drift. Moreover, its circuit structure is simple, stable, and low-cost. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a schematic diagram of the circuit structure of an existing DAC;

[0021] Figure 2 This is a block diagram of a current-controlled DAC provided in one embodiment of this application;

[0022] Figure 3 This is a circuit diagram of a current shunt circuit that includes a PMOS current source type shunt device in a current rudder DAC provided in an embodiment of this application.

[0023] Figure 4 This is a circuit diagram showing the connection between a current shunt circuit and a switch group, including an isolation layer, in one embodiment of this application.

[0024] Figure 5 This is a circuit diagram of a shunt circuit with two isolation layers connected to a switch group in one embodiment of this application;

[0025] Figure 6 This is a circuit diagram of a shunt circuit including an NMOS current source shunt device and a switch group connected according to an embodiment of this application. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of this utility model clearer, various exemplary embodiments described below will be referenced to the accompanying drawings, which form part of the exemplary embodiments, illustrating various exemplary embodiments that may be adopted to implement this utility model. Unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this disclosure. It should be understood that they are merely examples of processes, methods, and apparatuses consistent with some aspects of this utility model disclosed as detailed in the appended claims, and other embodiments may be used, or structural and functional modifications may be made to the embodiments listed herein without departing from the scope and spirit of this utility model.

[0027] In the description of this utility model, it should be understood that the terms "center," "longitudinal," "lateral," etc., indicate the orientation or positional relationship based on the accompanying drawings, and are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the referred element must have a specific orientation, or be constructed and operated in a specific orientation. The terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. The term "multiple" means two or more. The terms "connected" and "linked" should be interpreted broadly, for example, they can be fixed connections, detachable connections, integral connections, mechanical connections, electrical connections, communication connections, direct connections, indirect connections through an intermediate medium, and can be the internal connection of two elements or the interaction relationship between two elements. The term "and / or" includes any and all combinations of one or more of the related listed items. Those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances.

[0028] To illustrate the technical solutions described in this utility model, the technical solutions in the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.

[0029] To fully understand this utility model, detailed structures and steps will be presented in the following description to illustrate the technical solution proposed by this utility model. Preferred embodiments of this utility model are described in detail below; however, in addition to these detailed descriptions, this utility model may have other embodiments.

[0030] The current-controlled DAC provided by this invention has the advantages of low mismatch and low temperature drift, and can be widely used in various scenarios requiring digital-to-analog converters, especially applications requiring high speed and high precision. Figure 2 The circuit block diagram of the current-driven DAC shown in this invention includes: a driving circuit 10 for receiving input digital signals, several current shunt circuits 30, and several switch groups 20 controlled by the driving circuit. The current shunt circuit 30 can use the current generated in the reference current generation circuit as a reference, and according to the weight current required by the DAC, shunt a single weight to obtain the required weight current (or shunt multiple weight currents to obtain the required weight current). Thus, the DAC can obtain a corresponding analog signal based on the input digital signal and the weight current. Each current shunt circuit 30 provided by this invention includes: a reference current generation circuit 301 and a shunt circuit 302 for shunting current based on the reference current output by the reference current generation circuit. The shunt circuit 302 includes: a shunt resistor and N shunt devices M for shunting. si To form N current branches and output N shunt currents I from the N current branches. si , 1≤i≤N. One end of the shunt resistor is connected to the power supply or ground. One end of each of the N shunt devices is electrically connected to the other end of the shunt resistor. The other ends of each of the N shunt devices are electrically connected to one end of each of the N switch groups. The control terminals of each of the N shunt devices are electrically connected to the reference current generating circuit. The other end of each of the N switch groups is used to connect to the load. The switch groups are used to control whether the shunt current flows into the load. The drive circuit receives the input signal of the DAC, i.e., the digital signals D0, D1...D... n The analog signal is obtained by summing the weights of the input digital signal and the shunt current after shunting. This invention combines a shunt resistor and N shunt devices to directly achieve current shunting, resulting in better matching between shunt currents, lower mismatch, and lower temperature drift. Furthermore, its circuit structure is simple, low-cost, and has good stability. A single current shunt circuit can be used to split / shunt the weights of a single current source, or multiple current source weights can share a single current shunt circuit. If the reference current is I0, the required weights for the DAC can be designed as 2I0 + 4I0, depending on the digital control. Specifically, the current shunt circuit in the current-controlled DAC can be one, two, or more, depending on the DAC's requirements.

[0031] The shunt device provided by this utility model is preferably a PMOS, NMOS, NPN, or PNP type current source, which has a simple structure, low cost, and high shunt accuracy. For example, the shunt device is a PMOS or PNP current source, one end of the shunt resistor is connected to the power supply, the source / emitter of the N shunt devices is electrically connected to the other end of the shunt resistor, the drain / collector of the N shunt devices is electrically connected to one end of the N switch groups, and the control terminal of the N shunt devices is electrically connected to the first bias voltage and the reference current generation circuit; or the shunt device is an NMOS or NPN current source, one end of the shunt resistor is grounded, the source / emitter of the N shunt devices is electrically connected to the other end of the shunt resistor, the drain / collector of the N shunt devices is electrically connected to one end of the N switch groups, and the control terminal of the N shunt devices is electrically connected to the first bias voltage and the reference current generation circuit.

[0032] See Figure 3 As shown, this is a preferred embodiment of the present invention where the shunt device is a PMOS current source. The shunt circuit includes a shunt resistor R1 for shunting and N shunt devices M for PMOS current sources. si It can directly shunt current sources, where 1 ≤ i ≤ N. One end of resistor R1 is connected to the power supply, and the sources of the N shunt devices are all electrically connected to the other end of the resistor. The drains of the N shunt devices are respectively connected to the N switch groups (i.e., Figure 3 One end of the N groups of switches shown is electrically connected, and the control terminals of the N shunt devices are all electrically connected to the first bias voltage and the reference current generating circuit. The reference current generating circuit includes: a first reference resistor R0, and a resistor connected to the shunt device M. si PMOS type reference current source M of the same type S0 and the second reference resistor R ref One end of the first reference resistor R0 is connected to a power supply, and the other end of the first reference resistor is connected to the reference current source M. S0 With the second reference resistor R ref One end of the second reference resistor is electrically connected, and the other end of the second reference resistor is grounded. The first reference current source M S0 The control terminal and the N shunt devices M si The control terminal and the first bias voltage are electrically connected. The first bias voltage is supplied by... Figure 3 The voltage output from the leftmost amplifier is provided. The reference current generating circuit provided by this invention can act as a bias, forming a reference current so that the current shunt circuit can shunt the current in the required proportion. In this embodiment, the reference current generating circuit has a simple structure, low cost, and good stability.

[0033] The following is combined with Figure 3 The working principle of the current-driven DAC provided by this utility model is briefly described as follows:

[0034] Figure 3 The reference current generating circuit outputs a reference current I0, while the power supply obtains a current I1 through resistor R1. This current I1 is then divided into N shunt currents I0 by N shunt devices. si , 1≤i≤N. The other end of resistor R1 and all shunt devices M si The source stages are connected into a node, and the gate stages of all shunt devices and the reference current source M are connected together. s0 The gates are electrically connected together. This is achieved by setting the proportional relationship between resistors R1 and R0, and the ratio of the width to the length of each shunt device (e.g., designing shunt device M). s0 Width and shunt device M s0 The ratio of the length of the shunt device M s1 Width and shunt device M s1 The ratio of the width to the length of each component can be used to determine the relationship between the currents I1 and I0. The ratio of the width to the length of each component will be referred to as Z below. For example, in a design where R1 = R0, ZM... s0 =ZM s1 +ZM s2 +……+ZM sn Then, the proportional relationship I1 = I0 can be obtained, and other proportional relationships can also be obtained through a similar design. (Where ZM) si For shunt device M si The above ratio Z)

[0035] Depend on Figure 3 It can be seen that resistor R1 forms a negative feedback resistor, and any two current source devices M si and M sj (Assuming ZM) si =ZM sj The mismatch value of the output current is shown in formula (1).

[0036]

[0037] Where I represents device M si Or M sj The ideal current is given by β = μC, where ΔI is the deviation between the actual current and the ideal current. ox W / L (μ is the mobility, C) ox For the above-mentioned device M si (where W is its width, L is its length), V th For its threshold voltage, g m For its transconductance, R is Figure 3The resistance value of resistor R1 is considered, and its mobility and threshold voltage exhibit significant temperature drift. Typically, g m R>>1, so it can be seen from the above formula (1) that the current mismatch value of the current rudder DAC provided by this utility model is much less than 1, so the current mismatch of the current rudder DAC provided by this utility model is very low.

[0038] Comparing this to the case without negative feedback resistor, i.e., R = 0, equation (1) becomes equation (2).

[0039]

[0040] Comparing equations (1) and (2), it is evident that the coefficient 1 / (1+gmR) is typically much smaller than 1. Therefore, the current mismatch of the DAC with a shunt resistor provided by this invention is significantly lower than the current mismatch in the case without a negative feedback resistor. Thus, it can be seen that the current-steering DAC provided by this invention has the advantage of low mismatch, and with low mismatch, it also has the advantage of low temperature drift. It is worth noting that the current-steering DAC provided by this invention not only has low mismatch and low temperature drift, but also, as can be seen from the above description, has a simple circuit structure, fewer electronic components, lower cost, and better circuit stability.

[0041] Furthermore, with the development of advanced semiconductor manufacturing processes, especially in the currently popular deep submicron processes (such as the current 7nm and 3nm advanced process technologies), the channel modulation effect of devices is more severe, and the mismatch problem of existing current-controlled DACs is more serious. The accuracy and mismatch of the current source after shunting are worse, and the temperature drift due to mismatch is also poor, which reduces the overall performance of the current-controlled DAC. However, the current-controlled DAC provided by this invention can reduce or even avoid the problems caused by the aforementioned channel modulation effect. The current-controlled DAC provided by this invention has a lower mismatch, and its structure is simple, its cost is low, and it can be applied to more application scenarios.

[0042] It is worth noting that, in addition to Figure 3Besides the PMOS current source shown, the shunt device can also be a PNP current source. In this case, one end of the resistor is connected to the power supply, the emitters of all N shunt devices are electrically connected to the other end of the resistor, the collectors of all N shunt devices are electrically connected to one end of the N switch groups, and the control terminals of all N shunt devices are electrically connected to the first bias voltage and the reference current generation circuit. Alternatively, the shunt device can be an NMOS or NPN current source. One end of the resistor is grounded, the sources / emitters of all N shunt devices are electrically connected to the other end of the resistor, the drains / collectors of all N shunt devices are electrically connected to one end of the N switch groups, and the control terminals of all N shunt devices are electrically connected to the first bias voltage and the reference current generation circuit.

[0043] Furthermore, the switch group in the DAC provided by this utility model is preferably a differential switch, wherein the switch group includes an even number of switches, which are divided into two branches to control whether the shunt current is connected to the two loads. That is, the switch group can include an even number of switches, such as 4 switches, and its implementation is the same as / similar to the two switches mentioned above. Preferably, as Figure 3 As shown, the load includes a first load and a second load. The switch group includes two switches, one of which is on when the other is off. The other end of each shunt device is connected to the first load through a switch in the switch group, and the other end of each shunt device is connected to the second load through another switch in the same switch group. This type of switch group has a simple structure, low cost, and easy on / off control. It also allows the current-steering DAC to be adapted to more application scenarios and makes the current-steering DAC simpler, smaller, more stable, and lower in cost.

[0044] In a preferred embodiment, the current shunt circuit in the current-controlled DAC provided by this invention further includes one or Y stacked isolation layers to improve the matching between the N shunt currents. The isolation layers can be one, two, or multiple layers. Each isolation layer includes N isolation devices M. ci , 1≤i≤N, each of the shunt devices M si The isolation device M passes sequentially through one of the isolation layers in each isolation layer. ci Electrically connected to the switch group, the control terminals of the N isolation devices in the isolation layer are all electrically connected to the reference current generating circuit and all connected to the same bias voltage. Furthermore, the type of each isolation device is the same as the type of the shunt device. After setting the isolation layer, the voltage consistency between the source and drain terminals, or emitter and collector terminals, of the shunt devices is better. This embodiment can improve the matching between the N shunt currents and better mitigate the mismatch of the current-controlled DAC.

[0045] More preferably, the isolation layer is a single layer, see details below. Figure 4 The circuit diagram shown includes a current shunt circuit with an isolation layer. This approach allows the current-controlled DAC to achieve both good low mismatch and a simple, low-cost structure. It is worth noting that... Figure 3 The current-steering DAC shown without an isolation layer is more suitable for use with low supply voltages.

[0046] exist Figure 4 In the illustrated embodiment, the reference current generation circuit includes a first reference resistor R0 and a first reference current source M of the same type as the shunt device. S0 ,and Figure 4 A second reference current source M corresponding to the middle isolation layer c0 and the second reference resistor R ref The reference current generation circuit may include a plurality of second reference current sources M, the same number as the number of layers in the isolation layer. c0 For example, Y second reference current sources M corresponding to the Y-layer isolation layer. c0 Each isolation layer corresponds to an electrical connection to a second reference current source M. c0 More preferably, the corresponding electrically connected second reference current source M c0 The isolation layer of the corresponding layer is set to the same layer. In the current-controlled DAC, the Y-layer isolation layer and the Y second reference current sources are set to the Y-layer structure, that is, one isolation layer corresponds to one second reference current source M. c0 Furthermore, the Y-layer is preferably stacked, which makes the circuit structure of the current-controlled DAC more compact, occupies less space, has better consistency, and better electrical performance. More preferably, the Y-layer isolation layer and the shunt device are also stacked, to further make the circuit structure of the current-controlled DAC more compact, occupies less space, has better consistency, and better electrical performance.

[0047] exist Figure 4 In the illustrated embodiment, the current shunt circuit consists of a resistor R1 and a shunt device M. s1 M s2 ,...,M sn and N isolation components M in one isolation layer c1 M c2 ,...,M cn The configuration consists of a resistor R1 whose first input terminal is connected to the power supply, and a resistor R1 whose second input terminal is connected to the source of all shunt devices to form a node. The gate of all shunt devices is connected to the reference current source M. s0 Gate shared. The gate and second reference current source M of all isolated devices in this isolation layer. c0 The gates are all connected to the same bias voltage. By designing the ratio between the resistance values ​​of R1 and R0, M...s1 M s2 ,...,M sn and M s0 The relationship between the above ratio Z (referring to the W / L ratio) can be used to obtain the relationship between currents I1 and I0. For example, if R1 = R0, ZM s0 =ZM s1 +ZM s2 +...+ZM sn Then we can obtain the proportional relationship I1 = I0; other proportional relationships can be obtained through a similar design. Let M... c1 M c2 ,...,M cn and M c0 The relationship between the proportions Z and M is also according to M s1 M s2 ,...,M sn and M s0 By designing the proportional relationship between them, a more accurate current source I1 can be obtained. The current shunt relationship is then determined by designing the current source shunt device M. s1 M s2 ,...,M sn The proportional relationship between them is obtained. For example, if a current source requiring thermometer encoding is needed, then ZM is designed. s1 =ZM s2 =...=ZM sn The obtained current shunt relationship is I s1 =I s2 =...=I sn For example, if a current source requires binary encoding, then a ZM design is needed. s1 =2*ZM S1 ZM s3 =2*ZM S2 Thus, the current division relationship is obtained as I. s2 =2*I s1 I s3 =2*I s2 Specific current relationships include, but are not limited to, thermometer encoding, binary encoding, and other mixed encoding methods.

[0048] In embodiments of this invention, the reference current generating circuit may include: a first reference resistor R0 and a first reference current source M of the same type as the shunt device. S0 Y second reference current sources M corresponding to the Y-layer isolation layer c0 and the second reference resistor R ref Y second reference current sources M c0The type is the same as the type of the isolation device. One end of the first reference resistor is connected to the power supply or ground, and the other end of the first reference resistor is sequentially connected to the first reference current source and the Y second reference current sources M. c0 One end of the first reference current source is electrically connected to the second reference resistor, and the other end of the second reference resistor is grounded. The control terminal of the first reference current source is electrically connected to the control terminals of the N shunt devices and the first bias voltage. The control terminals of the N isolation devices in the isolation layer are all electrically connected to the control terminals of the second reference current sources in their corresponding layers and are all connected to the same bias voltage. For example Figure 5 The embodiment shown has a current shunt circuit comprising two isolation layers stacked together, with one isolation layer M... c1 To M cn The control terminals are all connected to a bias voltage V. b2 A layer of isolation M d1 To M dn The control terminals are all connected to a bias voltage V. b3 Preferably, the N shunt devices are arranged in a single layer, and the shunt devices in the single layer are stacked with the Y-layer isolation layer. This allows for better matching of the devices and lower DAC mismatch.

[0049] See Figure 6 As shown, the corresponding shunt device is an NMOS current source, which contains two isolation layers, and the isolation components in the isolation layers are all NMOS transistors. One end of the shunt resistor is grounded, and the other end of the shunt resistor is connected to the shunt device M in sequence. si and isolation component M ci and M di The circuit is electrically connected to one end of the switch assembly. The other end of the switch assembly is connected to the power supply via a load. The switch assembly is controlled by a drive circuit to open and close.

[0050] When the ratio Z of the above dimensions of the N isolation devices in each isolation layer is the same as the ratio of the dimensions of the N shunt devices (the ratio of the dimensions of the devices is the ratio of the width of the device to the length of the device), the current-rudder DAC has a lower mismatch.

[0051] In summary, the current-steering DAC provided by this utility model has low mismatch, low temperature drift, simple structure, low cost, and good stability.

[0052] Furthermore, this application also provides an electronic device including any of the aforementioned current-controlled DACs. The electronic device can be a chip / module containing the aforementioned DAC, or a voltage-controlled oscillator, data acquisition system, digital television equipment, medical equipment, measuring equipment, automotive electronic devices, etc., that includes the aforementioned DAC.

[0053] The above description is merely an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, such as the combination of technical features between embodiments, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

[0054] Furthermore, for structural elements with the same or similar characteristics, this application may use the same or different reference numerals for identification. In addition, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined with "first" and "second" may explicitly or implicitly include one or more features. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0055] In this application, the word "for example" is used to mean "used as an example, illustration, or explanation." Any embodiment described as "for example" in this application is not necessarily to be construed as more preferred or advantageous than other embodiments. This application has been provided above to enable any person skilled in the art to make and use it. Various details are set forth in the above description for purposes of explanation.

[0056] It should be understood that those skilled in the art will recognize that this application can be implemented without using these specific details. In other embodiments, well-known structures and processes will not be described in detail to avoid obscuring the description of this application with unnecessary detail. Therefore, this application is not intended to be limited to the embodiments shown, but is consistent with the broadest scope of the principles and features disclosed herein.

Claims

1. A current-controlled DAC, characterized in that, include: A driving circuit for receiving input digital signals, several switch groups controlled by the driving circuit, and several current shunt circuits; Each of the current shunt circuits includes: a reference current generating circuit and a shunt circuit that shunts the current according to the reference current output by the reference current generating circuit. The shunt circuit includes: a shunt resistor and N shunt devices M for shunting. si To form N current branches and output N shunt currents I from the N current branches. si , 1≤i≤N; One end of the shunt resistor is connected to the power supply or ground. One end of each of the N shunt devices is electrically connected to the other end of the shunt resistor. The other ends of the N shunt devices are respectively electrically connected to one end of each of the N switch groups. The control terminals of the N shunt devices are all electrically connected to the reference current generating circuit. The other end of the N switch groups is used to connect to the load. The switch groups are used to control whether the shunt current flows into the load.

2. The current-driven DAC according to claim 1, characterized in that, The shunt device is a PMOS, NMOS, NPN, or PNP type current source.

3. The current-driven DAC according to claim 2, characterized in that, The current shunt device is a PMOS or PNP current source. One end of the current shunt resistor is connected to the power supply. The source / emitter of each of the N current shunt devices is electrically connected to the other end of the current shunt resistor. The drain / collector of each of the N current shunt devices is electrically connected to one end of each of the N switch groups. The control terminals of each of the N current shunt devices are electrically connected to the first bias voltage and the reference current generation circuit. or The shunt device is an NMOS or NPN current source. One end of the shunt resistor is grounded. The source / emitter of each of the N shunt devices is electrically connected to the other end of the shunt resistor. The drain / collector of each of the N shunt devices is electrically connected to one end of each of the N switch groups. The control terminals of each of the N shunt devices are electrically connected to the first bias voltage and the reference current generation circuit.

4. The current-driven DAC according to claim 2, characterized in that, The reference current generating circuit includes: A first reference resistor R0, and a first reference current source M of the same type as the shunt device. S0 and the second reference resistor R ref ; One end of the first reference resistor is connected to a power supply or ground, and the other end of the first reference resistor is electrically connected to one end of the second reference resistor through the first reference current source. The other end of the second reference resistor is grounded, and the control terminal of the first reference current source is electrically connected to the control terminals of the N shunt devices and the first bias voltage.

5. The current-rudder DAC according to any one of claims 1 to 3, characterized in that, The load includes a first load and a second load; The switch group is a differential switch, which includes two switches, one of which is turned on and the other is turned off. The other end of each of the shunt devices is connected to a first load via a switch in a switch group, and the other end of each of the shunt devices is connected to a second load via another switch in the same switch group.

6. The current-steering DAC according to any one of claims 1 to 3, characterized in that, The current shunt circuit further includes one or Y stacked isolation layers to improve the matching between the N shunt currents; Each isolation layer includes N isolation devices M ci 1≤i≤N, the type of each isolation device is the same as the type of the shunt device, and each shunt device M si The switch group is connected to the isolation device Mci in each isolation layer in sequence. The control terminals of the N isolation devices in each isolation layer are all electrically connected to the reference current generating circuit and are all connected to the same bias voltage.

7. The current-controlled DAC according to claim 6, characterized in that, The N shunt devices are configured as one layer, and the shunt devices in one layer are stacked with the Y-layer isolation layer.

8. The current-controlled DAC according to claim 6, characterized in that, The isolation layer is a single layer.

9. The current-driven DAC according to claim 6, characterized in that, The reference current generating circuit includes: a first reference resistor R0, and a first reference current source M of the same type as the shunt device. S0 A plurality of second reference current sources M, the same number as the number of layers of the isolation layer. c0 and the second reference resistor R ref The types of several second reference current sources are all the same as the type of the isolation device; One end of the first reference resistor is connected to a power supply or ground. The other end of the first reference resistor is connected to one end of the second reference resistor in sequence through the first reference current source and the plurality of second reference current sources. The other end of the second reference resistor is grounded. The control terminal of the first reference current source is connected to the control terminals of the N shunt devices and the first bias voltage. The control terminals of the N isolation devices of the isolation layer are all connected to the control terminals of the second reference current sources of their corresponding layers and are all connected to the same bias voltage.

10. The current-driven DAC according to claim 7, characterized in that, The size ratio of the N isolation devices in each isolation layer is the same as the size ratio of the N shunt devices, and the size ratio of the device is the ratio of the width of the device to the length of the device.

11. An electronic device, characterized in that, include: The current-driven DAC according to any one of claims 1 to 10.

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