Chips, RF processing modules, RF devices and radar

CN224790643UActive Publication Date: 2026-09-22CALTERAH SEMICON TECH (SHANGHAI) CO LTD
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Patent Information

Application Number
CN202522127835.X
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Priority Date
2024-09-30
Filing Date
2025-09-30
Publication Date
2026-09-22
Estimated Expiration
2035-09-30

AI Technical Summary

Technical Problem

这会导致芯片射频接口与天线之间潜在的布线复杂,限制最优的布阵,影响水平和俯仰天线口径,进而影响天线水平和俯仰角度分辨能力

Benefits of technology

[0015]如以下将详细描述的,根据本实用新型实施例的一种芯片、射频处理模块、射频装置与雷达。本实用新型从芯片内射频接口布局出发,综合考虑了芯片内射频接口布局、芯片布局、天线布局之间的关系,能够实现接口、芯片、天线布阵之间的灵活布局,避免了相关技术可能出现的天线口径受限、影响天线分辨能力的问题,本实用新型所提供的技术方案有利于最大化水平和俯仰天线口径,提升水平和俯仰角度分辨能力。

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Abstract

This utility model relates to the field of radar technology, and in particular provides a chip, a radio frequency processing module, a radio frequency device, and a radar. In this utility model, the chip includes M+N radio frequency interfaces; the M+N radio frequency interfaces include M transmitting interfaces and N receiving interfaces, where M and N are positive integers; wherein, within a first region extending outward a first distance along the long side of any one of the radio frequency interfaces, no interface is provided. This solution, starting from the layout of the radio frequency interfaces within the chip, comprehensively considers the layout of the radio frequency interfaces within the chip, the chip layout, and the antenna layout, enabling flexible arrangement between interfaces, chips, and antenna arrays, which is beneficial for maximizing the horizontal and elevation antenna apertures and improving the horizontal and elevation angle resolution.
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Description

[0001] This utility model claims domestic priority to Chinese patent application filed on September 30, 2024, with application number 202411386457.0, entitled "Virtual Antenna Array, Antenna Arrangement, Signal Processing Method, Integrated Circuit, Sensing System, Electromagnetic Wave Device and Terminal Equipment". In accordance with Article 29, Paragraph 2 of the Patent Law of the People's Republic of China, the entire contents of the prior application are incorporated herein by reference. Technical Field

[0002] This utility model relates to the field of radar technology, and in particular to a chip, a radio frequency processing module, a radio frequency device, and a radar. Background Technology

[0003] Compared to single-chip-based RF solutions, multi-chip cascaded solutions offer more antennas, enabling larger antenna apertures and improving the angular resolution of the radar system. Therefore, in chip cascaded solutions, key considerations include how to lay out the chips on the printed circuit board (PCB), how to arrange the antennas corresponding to each chip on the PCB, and how the RF interfaces of each chip are routed.

[0004] In related technologies, chip design is typically completed before the antenna array is defined. The antenna array is defined after the chip design is finished, and then the antenna wiring is designed based on that array. This approach adapts the antenna array to the existing chip, rather than designing it from an optimal perspective. This can lead to potentially complex wiring between the chip's RF interface and the antenna, limiting the optimal array layout, affecting the horizontal and elevation antenna apertures, and consequently impacting the antenna's horizontal and elevation angle resolution. Utility Model Content

[0005] This invention addresses the aforementioned problems. It provides a chip, a radio frequency processing module, a radio frequency device, and a radar, enabling flexible layout of the interface, chip, and antenna array by starting with the layout of the radio frequency interface within the chip, thereby increasing the horizontal and elevation antenna aperture and improving horizontal and elevation angle resolution.

[0006] According to one aspect of the present invention, a chip is provided with M+N radio frequency interfaces; the M+N radio frequency interfaces include M transmitting interfaces and N receiving interfaces, where M and N are positive integers;

[0007] Within a first region extending outward a first distance along the long side of any of the aforementioned radio frequency interfaces, no interface is provided.

[0008] According to another aspect of the present invention, a radio frequency processing module is provided, comprising:

[0009] PCB board;

[0010] The chip as described in any aspect of this utility model is disposed on one side of the PCB board.

[0011] According to another aspect of the present invention, a radio frequency device is provided, comprising:

[0012] The radio frequency processing module as described in any aspect of this utility model;

[0013] Antenna structure.

[0014] According to another aspect of the present invention, a radar is provided, comprising: a radio frequency device as described in any aspect of the present invention.

[0015] As will be described in detail below, this utility model discloses a chip, a radio frequency processing module, a radio frequency device, and a radar according to embodiments of the present invention. Starting from the layout of the radio frequency interface within the chip, this utility model comprehensively considers the relationship between the layout of the radio frequency interface within the chip, the chip layout, and the antenna layout. It enables flexible layout between the interface, chip, and antenna array, avoiding the problems of limited antenna aperture and reduced antenna resolution that may occur in related technologies. The technical solution provided by this utility model is beneficial for maximizing the horizontal and elevation antenna apertures and improving horizontal and elevation angle resolution.

[0016] It should be understood that both the foregoing general description and the following detailed description are exemplary and intended to provide further illustration of the claimed technology. Attached Figure Description

[0017] The above and other objects, features, and advantages of this utility model will become more apparent from the more detailed description of the embodiments thereof in conjunction with the accompanying drawings. The drawings are provided to further illustrate the embodiments of this utility model and form part of the specification. They are used together with the embodiments of this utility model to explain the utility model and do not constitute a limitation thereof. In the drawings, the same reference numerals generally represent the same components or steps.

[0018] Figure 1 This is a schematic diagram of a module array scheme provided for an embodiment of the present utility model.

[0019] Figure 2 This is a schematic diagram of an on-chip radio frequency interface layout scheme provided for an embodiment of the present utility model.

[0020] Figure 3 A schematic diagram of another module array scheme provided for an embodiment of this utility model.

[0021] Figure 4 This is a schematic diagram of another on-chip radio frequency interface layout scheme provided for an embodiment of this utility model.

[0022] Figure 5 This is a schematic diagram of an antenna virtual array provided for an embodiment of the present utility model.

[0023] Figure 6 Schematic diagrams of two other on-chip radio frequency interface layout schemes provided for embodiments of this utility model.

[0024] Figure 7 Schematic diagrams of four other chip layout schemes provided for embodiments of this utility model.

[0025] Figure 8 This is a schematic diagram of the architecture of a chip provided for an embodiment of the present utility model.

[0026] Figure 9 A schematic diagram showing the layout relationship between the four radio frequency interfaces provided in this embodiment of the utility model.

[0027] Figure 10 This is a schematic diagram of the architecture of a radio frequency processing module provided in an embodiment of the present utility model.

[0028] Figure 11 This is a schematic diagram of the architecture of a radio frequency device provided in an embodiment of the present utility model.

[0029] Figure 12 This is a schematic diagram of the architecture of a radar provided for an embodiment of the present utility model. Detailed Implementation

[0030] To make the objectives, technical solutions, and advantages of this utility model more apparent, exemplary embodiments according to this utility model will be described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are merely some embodiments of this utility model, and not all embodiments of this utility model. It should be understood that this utility model is not limited to the exemplary embodiments described herein.

[0031] To address the issues of limited antenna aperture and reduced antenna resolution in related technologies, this utility model provides a novel design concept: starting from the layout of the on-chip radio frequency interface, it comprehensively considers the relationship between the on-chip radio frequency interface layout, chip layout, and antenna layout, thereby achieving a flexible layout between the interface, chip, and antenna array, improving the horizontal and vertical aperture of the antenna, and enhancing horizontal and vertical resolution.

[0032] The following is a detailed explanation.

[0033] This invention provides a chip, a radio frequency (RF) processing module, an RF device, and a radar. Overall, the chip may include, but is not limited to, a radar chip; the RF processing module may include, but is not limited to, the chip and one side of a PCB, with the chip disposed on one side of the PCB; the RF device may include, but is not limited to, the RF processing module (i.e., the chip and the PCB) and an antenna structure; and the radar may include, but is not limited to, the RF device.

[0034] To facilitate understanding, let's first combine Figures 1 to 7 The possible implementations of this utility model are briefly described below.

[0035] This embodiment takes a radar system containing a first radar chip, a second radar chip, a third radar chip, and a fourth radar chip as an example. Each radar chip includes a transmitting antenna array and a receiving antenna array, and all radar chips are mounted on a PCB board.

[0036] like Figure 1 As shown, each radar chip is a 4T4R. The transmitting antenna arrays of the first and third radar chips are located on edge a of the PCB board, the transmitting antenna arrays of the second and fourth radar chips are located on edge c of the PCB board, the receiving antenna arrays of the first and third radar chips are located on edge b of the PCB board, and the receiving antenna arrays of the second and fourth radar chips are located on edge d of the PCB board.

[0037] like Figure 2 As shown, the radio frequency antenna transmit and receive interfaces on the radar chip are located in the second and fourth quadrants, respectively. This design of the transmit and receive interfaces can effectively reduce interference between channels.

[0038] In this embodiment, both the first radar chip and the second radar chip adopt... Figure 2 The antenna interface layout is shown; the antenna interface layout of the third radar chip is rotated 180° relative to the antenna interface layout of the second radar chip, and the antenna interface layout of the fourth radar chip is rotated 180° relative to the antenna interface layout of the first radar chip.

[0039] like Figure 3 As shown, each radar chip is a 4T4R. The transmitting antenna arrays of the first and second radar chips are located on edge b of the PCB board, the transmitting antenna arrays of the third and fourth radar chips are located on edge d of the PCB board, the receiving antenna arrays of the first and third radar chips are located on edge a of the PCB board, and the receiving antenna arrays of the second and fourth radar chips are located on edge c of the PCB board.

[0040] like Figure 4As shown, the radio frequency antenna transmitting and receiving interfaces on the radar chip are located in the second and fourth quadrants, respectively, and the transmitting and receiving interfaces are alternately arranged in sequence.

[0041] The first radar chip uses Figure 4 The antenna interface layout is shown below; the antenna interface layout of the second radar chip is rotated 90° relative to the antenna interface layout of the first radar chip, the antenna interface layout of the third radar chip is rotated 180° relative to the antenna interface layout of the second radar chip, and the antenna interface layout of the fourth radar chip is rotated 180° relative to the antenna interface layout of the first radar chip.

[0042] In this embodiment, the radio frequency antenna transmitting and receiving interfaces of the first radar chip, the second radar chip, the third radar chip, and the fourth radar chip are connected to the transmitting antenna array and the receiving antenna array on the PCB via feed lines; in another embodiment, the radio frequency antenna transmitting and receiving interfaces of the first radar chip, the second radar chip, the third radar chip, and the fourth radar chip can also be waveguide interfaces, which are connected to an external waveguide antenna.

[0043] In this embodiment, the radar chips can be the same model or different models. In this embodiment, at least one transmitting antenna and at least one receiving antenna in the radar system are placed at the edge of the PCB board, thereby maximizing the aperture of the antenna array and improving the angular resolution of the radar.

[0044] according to Figure 1 The antenna layout shown forms a virtual array, such as Figure 5 As shown, the spacing coefficients di, hi (i = 1-7), as well as D and H, can be flexibly adjusted according to the algorithm and PCB size. In this embodiment, depending on the different requirements of the algorithm, the antenna array can be a uniform full array or a sparse array.

[0045] An example of the implementation of the antenna interface layout of the radar chip of this utility model. Figure 6 As shown. Figure 6 As shown in the left-middle figure, in this embodiment, the transmitting antenna interface and the receiving antenna interface are arranged perpendicularly to each other, effectively reducing signal crosstalk between the transmitting interface and the receiving port; as Figure 6 As shown in the middle right figure, the port arrangement in this example can ensure that the polarization between adjacent ports is perpendicular to each other, thereby reducing signal crosstalk at the ports.

[0046] An example of the radar chip layout configuration of this utility model radar system is shown below. Figure 7 As shown. Figure 7As shown, in this embodiment, the first radar chip and the second radar chip can adopt the antenna interface layout of any embodiment of this utility model. The third radar chip is set in the same direction as the first radar chip or is set 180° relative to the first radar chip. The fourth radar chip is set in the same direction as the second radar chip or is set 45° relative to the second radar chip.

[0047] The radar system in any embodiment of this utility model may further include a fifth radar chip, which is a chip located in the middle. The fifth chip also includes a transmitting antenna array and a receiving antenna array. The fifth chip is placed near the center of the PCB to compensate for the problem of excessively high sidelobes caused by the sparse array when the aperture is too large.

[0048] In this embodiment of the invention, the PCB shape in the radar system is not limited to quadrilateral. In a polygonal, circular, or elliptical PCB, chips and corresponding antennas can be selectively arranged at each corner to maximize the antenna array aperture.

[0049] The above examples illustrate the layout scheme of the chip, radio frequency processing module, radio frequency device, and radar in this utility model. The following, in conjunction with the above embodiments, provides a detailed description of each component: chip, radio frequency processing module, radio frequency device, and radar.

[0050] This utility model provides a chip. Please refer to... Figure 8 The chip may have, but is not limited to, M+N radio frequency interfaces, where M+N radio frequency interfaces include M transmit interfaces and N receive interfaces, and M and N are positive integers. In practical scenarios, the numbers M and N can be the same or different, as mentioned above. Figure 1 , Figure 3 In the illustrated embodiment, the chip has eight radio frequency (RF) interfaces, including four transmit interfaces and four receive interfaces (i.e., 4T4R). It should be understood that the chip may have other structures besides the RF interfaces, such as the chip body and internal circuitry, which will not be elaborated upon here.

[0051] like Figure 8 As shown, in this chip, no interface is provided in the first region extending outward a first distance along the long side of any radio frequency interface.

[0052] The direction of the long side of the RF interface is related to its shape. As described in the previous embodiments, this invention does not impose any particular limitation on the shape of the RF interface, which includes at least one of the following shapes: rectangle, square, ellipse, circle, and polygon. For rectangular and elliptical RF interfaces, the direction of the long side of the rectangle and the direction of the major axis of the ellipse are the same as the direction of the long side of the RF interface. For circular, square, and polygonal RF interfaces without specific long or short side shapes, the direction of the long side can be customized without particular limitation. Furthermore, this invention does not impose any particular limitation on the corner shape of the RF interface. Taking a rectangular RF interface as an example, the RF interface of the chip can include, but is not limited to, at least one of the following: right-angled rectangle and rounded rectangle. For ease of explanation, the accompanying drawings use a rectangular RF interface as an example.

[0053] In practical scenarios, wiring is typically done along the long side of the RF interface to connect it to the antenna interface. However, in some cases, depending on the layout of the RF interfaces, there may be obstructions (such as other RF interfaces) along their long side. In such cases, wiring can be done along the long side of the RF interface for a certain distance, then bent, ultimately extending along the unobstructed short side of the RF interface to connect to the antenna interface, as shown below. Figure 8 As shown.

[0054] Therefore, in this invention, an unobstructed design is required within a first distance extending outward along the long side of any RF interface to meet the subsequent installation requirements with the antenna interface, PCB, etc. In other words, in this invention, the first distance indicates the range of the unobstructed area; the first distance is the unobstructed area, and no interface can be placed within this first area. This effectively reduces inter-channel interference, thereby reducing signal crosstalk at the interface. In addition, this solution can also avoid the complex interface layout affecting antenna wiring and the antenna's horizontal and vertical aperture.

[0055] In this invention, the first distance is related to the isolation and the manufacturability of the winding. For example, at a frequency of 77 GHz, the first distance may include, but is not limited to, 2.5 mm. It should be understood that this is merely an example and is not intended to limit this invention; the first distance may have different custom values ​​depending on the signal frequency, processing capabilities, etc., and this invention does not particularly limit or exhaustively list such values.

[0056] Furthermore, in this invention, for any given chip, the long sides of the M transmitting interfaces can be in the same direction, and the long sides of the N receiving interfaces can also be in the same direction. In other words, the M transmitting interfaces are arranged according to the same directional rule (denoted as the first direction), and the N receiving interfaces are also arranged according to the same directional rule (denoted as the second direction).

[0057] In one exemplary embodiment, taking the first selected transmit interface in the chip as a reference, the long side direction of the transmit interface is the first direction, and the short side direction of the transmit interface is the second direction; wherein, the first direction and the second direction intersect.

[0058] For example, the first direction and the second direction can be perpendicular to each other. For example, as mentioned above... Figure 2 and Figure 4 As shown, the long side of the transmitting interface (i.e., the chip's TX waveguide interface) is horizontal (also called the transverse axis, name is not limited), while the long side of the receiving interface (i.e., the chip's RX waveguide interface) is vertical (also called the longitudinal axis, name is not limited), and the two directions are perpendicular to each other. Furthermore, the angle between the first and second directions can be customized. To optimize the subsequent routing layout with the antenna interface, the angle between the two can be as close to 90° as possible; for example, the angle between them can be 45° to 135°.

[0059] Furthermore, the above embodiments are illustrated using the example of RF interfaces of the same type having the same layout orientation, but in actual scenarios, this is not limited to this situation. For example, in this utility model, among the M+N RF interfaces, there may be at least one transmitting interface whose long side direction is inconsistent with that of other transmitting interfaces, and / or at least one receiving interface whose long side direction is inconsistent with that of other receiving interfaces. For example, the chip may be provided with 4 transmitting interfaces, of which 3 transmitting interfaces have the same long side direction, which is horizontal, and the other transmitting interface is rotated relative to the horizontal direction, for example, rotated 60° (no limitation, just an example).

[0060] This utility model provides several possible radio frequency interface layout schemes, which are illustrated below.

[0061] For example, in this invention, M+N radio frequency (RF) interfaces are spaced apart along the diagonal of the chip. The spacing between the RF interfaces means that there is a certain spatial distance between any two adjacent RF interfaces to avoid inter-channel interference. Furthermore, the chip is generally rectangular (or square, or a slightly deformed shape based on a rectangle), and the chip diagonal is the diagonal of the rectangle. In practical scenarios, the RF interfaces can be spaced apart along one of the chip's diagonals. Taking the case of a rectangular chip as an example, the RF interfaces can be spaced apart in the first and third quadrants of the chip, or, for example... Figure 2 and Figure 4 As shown, the radio frequency interface can also be set alternately in the second and fourth quadrants of the chip.

[0062] Based on this, different types of RF interfaces can have a variety of possible layouts, such as RF interfaces of the same type being arranged adjacently or spaced apart.

[0063] For example, in one possible embodiment, M transmitting interfaces are arranged adjacent to each other; N receiving interfaces are arranged adjacent to each other.

[0064] The phrase "M transmit interfaces arranged adjacently" means that the M transmit interfaces are arranged sequentially next to each other (but still with a certain spatial interval), and no other type of RF interface is set between any two adjacent transmit interfaces. For easier understanding, please refer to... Figure 2 , Figure 2 In this case, M = N = 4. For example... Figure 2 As shown, four transmit interfaces and four receive interfaces are arranged along the diagonal of the chip, with the four transmit interfaces arranged adjacent to each other in the fourth quadrant and the four receive interfaces arranged adjacent to each other in the second quadrant.

[0065] In another possible embodiment, for example, any one of the transmitting interfaces is arranged adjacent to one or two receiving interfaces.

[0066] In this embodiment, the transmitting interface and the receiving interface are arranged adjacent to each other (but still with a certain spatial interval), which is equivalent to the transmitting interface and the receiving interface being arranged alternately in sequence. For ease of understanding, please refer to... Figure 4 , Figure 4 In this case, M = N = 4. For example... Figure 4 As shown, four transmit interfaces and four receive interfaces are arranged along the diagonal of the chip in the second and fourth quadrants, respectively, with the four transmit interfaces and four receive interfaces alternating sequentially. That is, for any one transmit interface, its adjacent RF interface is a receive interface; and for any one receive interface, its adjacent RF interface is a transmit interface.

[0067] Furthermore, in this invention, the M+N radio frequency interfaces can also be configured in other ways.

[0068] For example, in one possible embodiment, M+N radio frequency interfaces are arranged in a T-shape; wherein, M transmitting interfaces are spaced apart along a second direction; and N receiving interfaces are spaced apart along a first direction.

[0069] In this embodiment, the long side direction of the M transmitting interfaces is the first direction, and the long side direction of the N receiving interfaces is the second direction. Thus, for any RF interface, its long side direction (the wiring direction connected to the antenna) is not consistent with the spacing direction. The spacing of the same type of RF interfaces has little impact on the antenna wiring. This also directly ensures that no interface is set in the first area extending outward by a first distance along the long side direction of the RF interface, which to a certain extent ensures the isolation between interfaces and avoids signal crosstalk problems.

[0070] For easier understanding, please refer to Figure 6 The left image, Figure 6 In this case, M = N = 4. For example... Figure 6 As shown in the left figure, the long sides of the four transmitting interfaces are horizontal, and they are arranged alternately along the vertical direction to form a T-shaped layout of the vertical radio frequency interfaces; the long sides of the four receiving interfaces are vertical, and they are arranged alternately along the horizontal direction to form a T-shaped layout of the horizontal radio frequency interfaces.

[0071] It should be understood that Figure 6 This is for illustrative purposes only; in real-world scenarios, there can be many possible variations.

[0072] In this invention, the first direction and the second direction intersect, preferably perpendicular. Based on this, the M transmitting interfaces spaced apart along the second direction and the N receiving interfaces spaced apart along the first direction constitute a T-shaped layout. The T-shaped layout generally allows for the two types of RF interfaces to be perpendicular to each other; in practical scenarios, this design also allows for a certain non-perpendicular angle difference between the horizontal and vertical RF interfaces. Furthermore, this invention is not limited to the case where the horizontal RF interface is on top and the vertical RF interface is below. For example, the M+N RF interfaces can be arranged in an inverted T-shape or a rotated T-shape, with no limitation on the angle of the T-shaped layout. Moreover, this invention is not limited to the case where the vertical RF interface is centered in the horizontal direction of the chip. For example, the vertical RF interface can be located slightly to the left or right of the chip in the horizontal direction, presenting a structure with an approximately right-angled corner. This is not an exhaustive list.

[0073] For this T-shaped layout scheme, it is equivalent to having two interface groups in the chip. Each interface group contains only one type of RF interface, and the same type of RF interfaces within each interface group are spaced apart along the non-long side. For example Figure 6 As shown in the left figure, the chip is equipped with a transmit interface group and a receive interface group. The transmit interface group and the receive structure group are arranged in a cross or perpendicular direction, forming a T-shaped layout structure.

[0074] In addition, in another possible exemplary embodiment, the M+N radio frequency interfaces include: S interface groups; any interface group includes: P transmitting interfaces and Q receiving interfaces; S is a positive integer greater than 1, and P and Q are positive integers; wherein, the transmitting interfaces and receiving interfaces in any interface group are alternately arranged.

[0075] In this embodiment, the multiple radio frequency (RF) interfaces arranged on the chip are divided into multiple interface groups, each containing at least one transmit interface and at least one receive interface. Furthermore, within any interface group, the transmit and receive interfaces can be alternately arranged with a certain dimensional spacing between them. Additionally, since different types of RF interfaces have different long-side directions, their alternating arrangement ensures that no interface is placed within a first region extending outwards along the long side of any RF interface. This RF interface layout scheme ensures that the polarization of adjacent RF interfaces within an RF group is perpendicular, thereby reducing signal crosstalk at the RF interfaces.

[0076] Furthermore, for any given interface group, there are multiple possible layouts among the multiple RF interfaces; for example, they can be arranged as follows: Figure 6 The circular layout shown in the right figure can also be arranged in an alternating pattern along the same direction, or in a trapezoidal alternating pattern, or in a trumpet-shaped pattern (e.g., in...). Figure 6 Based on the diagram on the right, each RF interface is rotated at a certain angle to present a horn shape. This is not an exhaustive list. Regardless of the layout, as long as the requirement of "no interface is set in the first area extending outward a first distance along the long side of any of the RF interfaces" is met, it is acceptable.

[0077] For chips involving multiple interface groups, the layout of RF interfaces within different interface groups can be the same, different, or partially different. For example, Figure 6 The right figure illustrates an implementation where two interface groups use the same interface layout scheme. Furthermore, for chips involving multiple interface groups, the number of RF interfaces within different interface groups is generally the same, but it can also differ, and can be customized based on actual conditions.

[0078] Furthermore, the layout of different interface groups is not limited, and it only needs to meet the requirement that "no interface is set in a first region extending outward a first distance along the long side of any of the RF interfaces." For example, multiple interface groups can be arranged along the same direction (e.g., Figure 6 The interface groups can be arranged at intervals along the second direction (as shown in the right figure), or multiple interface groups can have a certain distance between them in both the first and second directions, or multiple interface groups can be arranged in a V-shape, or other custom layout forms, which will not be exhaustive.

[0079] As mentioned above, the radio frequency (RF) interfaces in this invention have a certain spacing, which is related to the chip size and the isolation between the RF interfaces. In one exemplary embodiment, the distance between any two adjacent RF interfaces can be 1.5–5 mm. This spaced layout avoids signal crosstalk caused by the RF interfaces being too close together, and is beneficial for maximizing the horizontal and elevation antenna apertures, thereby improving the horizontal and elevation angle resolution.

[0080] Based on the various possible embodiments described above, in this utility model, the M+N radio frequency interfaces can exist in at least one of the following situations:

[0081] The long sides of two adjacent RF interfaces are on the same horizontal line;

[0082] The short sides of two adjacent RF interfaces are on the same horizontal line;

[0083] The long and short sides of two adjacent RF interfaces are located on different horizontal lines.

[0084] Now combined Figure 9 For example, Figure 9 The diagram specifically illustrates four possible RF interface relationships: a, b, c, and d. For example... Figure 9 As shown in Figure a, when the long sides of two adjacent RF interfaces are on the same horizontal line, the spacing between the two adjacent RF interfaces can be 1.5–5 mm, preferably 2 mm. Figure 9 As shown in b, the short sides of two adjacent RF interfaces are on the same horizontal line. For specific implementation details, please refer to [reference needed]. Figure 6 The situation shown in the left figure will not be elaborated upon. For example... Figure 9 Figures c and d illustrate the possible scenarios where the long and short sides of two adjacent RF interfaces are located on different horizontal lines. Figure 9 Figure 'c' shows that the long and short sides of two adjacent RF interfaces are on different horizontal lines (or extension lines). For details on their implementation, please refer to [reference needed]. Figure 2 , Figure 4 , Figure 6 As shown in the diagram on the right, no further explanation is needed; while Figure 9 The d indicates the case where the extension lines of the long sides (and / or short sides) of two adjacent RF interfaces intersect. That is, the RF interfaces can be rotated to create an angle between two adjacent RF interfaces, such as the V-shaped layout and trapezoidal layout mentioned above, which will not be elaborated further.

[0085] Furthermore, for any given chip, any of the aforementioned RF interfaces within the chip are used to match the waveguide structure of the PCB board. This invention does not impose any particular limitation on the waveguide structure, which can include, but is not limited to, one or more of the following: waveguide structure, slot structure, coaxial structure. In other words, the RF structure needs to be adapted to the waveguide structure on the PCB board, and the waveguide structure on the PCB board can be a waveguide structure, slot structure, or coaxial structure, etc., to name a few.

[0086] In summary, this utility model provides a chip that can be configured with the radio frequency interface layout described in any of the preceding embodiments. This layout allows the radio frequency interfaces to be arranged in a more regular manner. While ensuring that there is a certain distance between the radio frequency interfaces to avoid interface crosstalk problems, it is also beneficial to optimize the wiring layout between the radio frequency interfaces and the antenna interface, which is beneficial to improving the horizontal and vertical aperture of the antenna and improving the horizontal and vertical resolution.

[0087] This utility model also provides an radio frequency processing module, please refer to... Figure 10 The radio frequency processing module includes a PCB board and a chip disposed on one side of the PCB board, which may refer to any of the possible embodiments described above.

[0088] This invention does not impose any particular limitation on the number of chips included in the radio frequency processing module; it can be a single-chip structure or a multi-chip structure. For example, as mentioned above... Figure 1 , Figure 3 , Figure 7 The diagram illustrates possible implementations of an RF processing module with four or five chips. Furthermore, for example, the number of chips on any given PCB board can be, but is not limited to, six or fewer; the possibilities are not exhaustive.

[0089] There are various ways to arrange the chip on one side of the PCB board. Generally, antenna interfaces are located at the edges of the PCB board, but in this invention, the chip can be located at any non-edge location on the PCB board. For example, the chip can be located in a corner area and / or the center area of ​​the PCB board. Figure 1 and Figure 3 The illustrated embodiment shows a case where chips are placed in the four corner areas of a PCB board. For example, Figure 7 The bottom right view shows the configuration of chips in the four corner areas and the center area of ​​the PCB board. Furthermore, for example, three chips can be arranged in a triangular pattern in the center area of ​​the PCB board, or one chip can be placed at the center of each of the four virtual quadrants of the PCB board; these examples are not exhaustive.

[0090] For RF processing modules involving multi-chip structures, the chips can be arranged symmetrically; or, they can be arranged asymmetrically, for example, with multiple chips arranged symmetrically and one chip placed in the center. Figure 1 , Figure 3 In the embodiment shown, the four chips are arranged symmetrically; Figure 7 In the embodiment shown in the lower right corner, the five chips are arranged asymmetrically, with chip 5 positioned in the center.

[0091] In one exemplary embodiment, any two chips may be arranged in the same orientation; alternatively, the chips may be arranged in different orientations. For example, based on any first chip, there may be at least one second chip, which is rotated relative to the first chip. In this embodiment, for a multi-chip RF processing module, multiple chips may be arranged in a uniform orientation, or they may be rotated or flipped to meet different layout requirements.

[0092] The first chip can be any one of multiple chips, or a user-defined chip, or a chip located at a specified position on the PCB board. This disclosure does not impose any particular restrictions on this.

[0093] For example. In Figure 1 In the illustrated embodiment, taking chip 1, located at the upper left corner of the PCB board, as a reference, the layout of chip 1 is defined as a standard layout. Therefore, in this embodiment, chip 2 also adopts a standard layout, while chips 3 and 4 are both rotated 180° relative to chip 1. At this time, chips 3 and 4 serve as the second chips, rotated relative to chip 1. For example, in... Figure 3 In the illustrated embodiment, chip 1, located at the upper left corner of the PCB board, is still taken as the reference. In this embodiment, chip 1 has a standard layout, and chips 2 to 4 are all rotated relative to chip 1. Specifically, chip 2 on the right is rotated 90° relative to chip 1, chip 3 at the lower left corner is rotated 270° relative to chip 1, and chip 4 at the lower right corner is rotated 180° relative to chip 1. For example, in... Figure 7 In the four embodiments shown, all four chips can adopt a standard layout. Figure 7 (See top left diagram) Alternatively, one of the chips can be rotated (e.g.) Figure 7 In the example at the top right corner, chip 3 is rotated 180° (this can be done by rotating multiple chips, for example). Figure 7 In the embodiments shown in the lower left and lower right corners, chip 3 is rotated 180° and chip 4 is rotated 45°.

[0094] It should be understood that this utility model does not impose any particular limitation on the rotation angle of the second chip relative to the first chip, such as 45°, 90°, 180°, 270°, etc. as mentioned above. In addition, there can be other custom rotation angles, which are not limited to integer multiples of 45°. For example, the rotation angle of the second chip relative to the first chip can also include, but is not limited to, 60°, 72°, 85°, 15°, etc., without exhaustive list.

[0095] Furthermore, this invention does not impose any particular limitations on the chip packaging structure. For example, any two chips may have the same or different packaging structures. For example, the form of the chip packaging structure may include, but is not limited to, at least one of the following: Ball Array Package, Land Grid Array Package, Quad Flat No-lead Package, etc., without exhaustive list.

[0096] In summary, this utility model provides a radio frequency processing module. This radio frequency processing module can be configured with chips based on the chip layout scheme described in any of the preceding embodiments. This chip layout scheme is beneficial for optimizing the wiring layout between the chip and the antenna interface, and for improving the horizontal and vertical aperture of the antenna, thereby enhancing the horizontal and vertical resolution capabilities.

[0097] This utility model also provides a radio frequency device, please refer to... Figure 11 The radio frequency device includes: a radio frequency processing module and an antenna structure as described in any of the preceding embodiments.

[0098] In this invention, the antenna structure may include, but is not limited to, I+J antenna interfaces, wherein the I+J antenna interfaces include I transmitting interface and J receiving interface, and the I+J antenna interfaces are arranged along the edge of the PCB board.

[0099] Where I and J are positive integers, they can be the same or different. In addition, in the conventional setup, the antenna interface and the RF interface can be configured one-to-one. Therefore, the number of I can be M or an integer multiple of M (the multiple is the number of chips), or I can be a positive integer greater than M or an integer multiple of M; similarly, J can be a positive integer greater than or equal to N or an integer multiple of N.

[0100] In this embodiment, the antenna interface is arranged along the edge of the PCB board. Therefore, for the PCB board, there is sufficient wiring space between the edge-arranged antenna interface and the non-edge-arranged chip, which can achieve neat wiring.

[0101] In one exemplary embodiment, I transmitting interfaces are spaced apart along a first direction, and J receiving interfaces are spaced apart along a second direction. For example... Figure 3In the embodiment shown, I transmit interfaces (TX interfaces) are spaced apart along a first direction (horizontal direction), specifically located near edges b and d of the PCB board; while J transmit interfaces (i.e., RX interfaces) are spaced apart along a second direction (vertical direction), specifically located near edges a and c of the PCB board.

[0102] Alternatively, in another exemplary embodiment, I transmitting interfaces are spaced apart along a second direction, and J receiving interfaces are spaced apart along a first direction. For example... Figure 1 In the embodiment shown, I transmit interfaces (TX interfaces) are spaced apart along the second direction (vertical direction), specifically located near edges a and c of the PCB board; while J transmit interfaces (i.e., RX interfaces) are spaced apart along the first direction (horizontal direction), specifically located near edges b and d of the PCB board.

[0103] Furthermore, this utility model does not impose any particular restrictions on the shape of the PCB board. The preceding description uses a rectangular PCB as an example, but in actual scenarios, it is not limited to this. The shape of the PCB board involved in this utility model may include, but is not limited to, at least one of the following: rectangular, polygonal, circular, etc., which will not be elaborated further.

[0104] In this invention, the virtual antenna array corresponding to the antenna structure can be a full array or a sparse array. For example, Figure 3 It shows the basis Figure 1 The chip layout and antenna layout shown Figure 2 The possible configurations of the virtual antenna array formed by the on-chip RF interface layout are shown below. Figure 1 , Figure 2 In the illustrated embodiment, M+N radio frequency interfaces can form an M*N virtual antenna array, such as... Figure 3 As shown, the virtual array is actually a full array.

[0105] It should be understood that the antenna structure should be matched with the chips in the radio frequency processing module. Each chip should have a matching antenna structure. The antenna structure can correspond one-to-one with the chip, or the antenna structure can be reused. One antenna structure can be used to connect to multiple chips.

[0106] The antenna structures involved in this utility model may include, but are not limited to, one or more of the following: external waveguide antennas, microstrip antennas, packaged antennas, dielectric resonant antennas, etc., without exhaustive list. Furthermore, for multi-chip RF devices, the antenna structures corresponding to multiple chips may be the same, different, or partially the same, without particular limitation. Moreover, the antenna structures corresponding to each chip can be fabricated independently, or multiple (or all) of the antenna structures corresponding to the chips can be fabricated as a whole, without particular limitation in this disclosure.

[0107] In summary, this utility model provides a radio frequency device that can achieve flexible layout between the interface, chip, and antenna array based on the antenna layout scheme, chip layout scheme, and radio frequency interface layout scheme described in any of the preceding embodiments, thereby improving the horizontal and vertical aperture of the antenna and enhancing the horizontal and vertical resolution capabilities.

[0108] This utility model also provides a radar. Please refer to... Figure 12 ,like Figure 12 As shown, the radar includes at least the radio frequency device provided in any of the preceding embodiments of this utility model.

[0109] This invention does not limit the operating band of the radar. The millimeter-wave radar mentioned above is only used for illustrative purposes. The radar can also operate in other bands, and there are no special restrictions on this.

[0110] Furthermore, this utility model has no particular limitations on the application scenarios of radar. It can be applied to fields such as smart homes, transportation, smart homes, consumer electronics, monitoring, industrial automation, cabin detection, and healthcare. For example, radar can be applied to intelligent transportation equipment (e.g., cars, bicycles, motorcycles, ships, subways, or trains), security equipment (e.g., cameras), liquid level / flow rate detection equipment, smart wearable devices (e.g., wristbands or glasses), smart home devices (e.g., robot vacuums, door locks, televisions, air conditioners, or smart lights), various communication devices (e.g., mobile phones or tablets), as well as devices such as barriers, intelligent traffic lights, intelligent signs, traffic cameras, or various industrial robotic arms (or robots). Alternatively, it can be used for various instruments or devices equipped with such instruments to detect vital signs, such as cabin detection in vehicles, indoor personnel monitoring, smart medical devices, or consumer electronic devices, etc., without exhaustive list.

[0111] For details not covered, please refer to the previous text; they will not be repeated here.

[0112] The basic principles of this utility model have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this utility model are merely examples and not limitations, and should not be considered as essential features of each embodiment of this utility model. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the utility model from being implemented using the aforementioned specific details.

[0113] The block diagrams of the devices, apparatuses, equipment, and systems involved in this utility model are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, equipment, and systems can be connected, arranged, and configured in any manner. Words such as “comprising,” “including,” “having,” etc., are open-ended terms meaning “including but not limited to,” and are used interchangeably with them. The terms “or” and “and” as used herein refer to the terms “and / or,” and are used interchangeably with them unless the context clearly indicates otherwise. The term “such as” as used herein refers to the phrase “such as but not limited to,” and is used interchangeably with it.

[0114] Additionally, as used herein, the “or” used in a list of items beginning with “at least one” indicates a separate list, such that a list of, for example, “at least one of A, B, or C” means A or B or C, or AB or AC or BC, or ABC (i.e., A and B and C). Furthermore, the word “exemplary” does not imply that the described example is preferred or better than other examples.

[0115] In this invention, the reference to "embodiment" means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this invention. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described in this invention can be combined with other embodiments.

[0116] In the description of the embodiments of this utility model, the technical terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential," etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings. They are used only for the convenience of describing the embodiments of this utility model and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this utility model. For example, if the device or element in the illustration is inverted, then the element described as "below," "under," "down," or "bottom" of other elements or features will be oriented "above" or "top" of said other elements or features. Therefore, the term "below" may, depending on the context in which the term is used, encompass both above and below orientations, which will be obvious to those skilled in the art. The material may be oriented in other ways (e.g., rotated 90 degrees, inverted, flipped), and the spatial relative descriptive terms used in this invention may be interpreted accordingly.

[0117] In the description of the embodiments of this utility model, unless otherwise explicitly specified and limited, technical terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. For those skilled in the art, the specific meaning of the above terms in the embodiments of this utility model can be understood according to the specific circumstances.

[0118] In the description of the embodiments of this utility model, when a component "includes" another component, it does not exclude other components unless otherwise stated, and other components may be further included. The formation or provision of a second component above or on a first component, or on the surface of a first component, or on one side of a first component, may include embodiments where the first and second components are in direct contact, and may also include embodiments where an additional component may be present between the first and second components, thereby preventing direct contact between the first and second components. For simplicity and clarity, various components may be drawn at different scales. In the drawings, some layers / components may be omitted for simplicity. Unless otherwise specified, the formation or provision of a second component on the surface of a first component refers to the direct contact between the first and second components. The term "component" can refer to a layer, film, region, portion, structure, etc.

[0119] It should also be noted that in the system and method of this utility model, the components or steps can be disassembled and / or recombined. These disassemblies and / or recombinations should be considered as equivalent solutions of this utility model.

[0120] Various changes, substitutions, and modifications can be made to the technology described herein without departing from the teachings defined by the appended claims. Furthermore, the scope of the claims of this utility model is not limited to the specific aspects of the processes, machines, manufacturing processes, events, means, methods, and actions described above. Currently existing or later-developed processes, machines, manufacturing processes, events, means, methods, or actions that perform substantially the same function or achieve substantially the same result as the corresponding aspects described herein can be utilized. Therefore, the appended claims include such processes, machines, manufacturing processes, events, means, methods, or actions within their scope.

[0121] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein can be applied to other aspects without departing from the scope of the present invention. Therefore, the present invention is not intended to be limited to the aspects shown herein, but rather to be carried out within the widest scope consistent with the principles and novel features disclosed herein.

[0122] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of the present invention to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations therein.

Claims

1. A chip, characterized in that, It includes M+N radio frequency interfaces; the M+N radio frequency interfaces include M transmitting interfaces and N receiving interfaces, where M and N are positive integers; Within a first region extending outward a first distance along the long side of any of the aforementioned radio frequency interfaces, no interface is provided.

2. The chip according to claim 1, characterized in that, Taking the first selected transmit interface in the chip as a reference, the long side direction of the transmit interface is the first direction, and the short side direction of the transmit interface is the second direction; Wherein, the first direction intersects with the second direction.

3. The chip according to claim 1, characterized in that, The distance between any two adjacent radio frequency interfaces is 1.5 to 5 mm.

4. The chip according to any one of claims 1-3, characterized in that, M+N radio frequency interfaces are arranged diagonally along the chip.

5. The chip according to claim 4, characterized in that, M of the transmitting interfaces are arranged adjacent to each other; N of the receiving interfaces are arranged adjacent to each other.

6. The chip according to claim 4, characterized in that, Each of the transmitting interfaces is arranged adjacent to one or two of the receiving interfaces.

7. The chip according to any one of claims 1-3, characterized in that, The M+N radio frequency interfaces are arranged in a T-shape; M of the transmitting interfaces are spaced apart along the second direction; N of the receiving interfaces are spaced apart along the first direction.

8. The chip according to any one of claims 1-3, characterized in that, The M+N radio frequency interfaces include: S interface groups; any one of the interface groups includes: P transmitting interfaces and Q receiving interfaces; S is a positive integer greater than 1, and P and Q are positive integers; In any one of the interface groups, the transmitting interface and the receiving interface are alternately set.

9. The chip according to any one of claims 1-3, characterized in that, The M+N radio frequency interfaces include at least one of the following: The long sides of two adjacent radio frequency interfaces are located on the same horizontal line; The short sides of two adjacent radio frequency interfaces are located on the same horizontal line; The long and short sides of the two adjacent radio frequency interfaces are located on different horizontal lines.

10. The chip according to any one of claims 1-3, characterized in that, The shape of the radio frequency interface includes at least one of the following: rectangle, square, ellipse, circle, and polygon.

11. The chip according to any one of claims 1-3, characterized in that, Any one of the radio frequency interfaces is used for matching with the waveguide structure of the PCB board; The waveguide structure includes one or more of the following: waveguide structure, slot structure, and coaxial structure.

12. A radio frequency processing module, characterized in that, include: PCB board; The chip as described in any one of claims 1-11 is disposed on one side of the PCB board.

13. The radio frequency processing module according to claim 12, characterized in that, The chip is located in the corner area and / or center area of ​​the PCB board.

14. The radio frequency processing module according to claim 12, characterized in that, The multiple chips are arranged symmetrically; Alternatively, multiple chips may be arranged symmetrically, and one chip may be arranged in the center.

15. The radio frequency processing module according to any one of claims 12-14, characterized in that, The orientation of any two of the chips is exactly the same; Alternatively, based on any first chip, there is at least one second chip, which is rotated relative to the first chip.

16. A radio frequency device, characterized in that, include: The radio frequency processing module as described in any one of claims 12-15; Antenna structure.

17. The radio frequency device according to claim 16, characterized in that, The antenna structure includes I+J antenna interfaces, and the I+J antenna interfaces include I transmitting interfaces and J receiving interfaces; I and J are positive integers. The I+J antenna interfaces are arranged along the edge of the PCB board.

18. The radio frequency device according to claim 17, characterized in that, I said transmitting interfaces are spaced apart along a first direction, and J said receiving interfaces are spaced apart along a second direction; Alternatively, I of the transmitting interfaces are spaced apart along a second direction, and J of the receiving interfaces are spaced apart along a first direction.

19. The radio frequency device according to any one of claims 16-18, characterized in that, The antenna structure corresponds to a virtual antenna array that is either full or sparse.

20. The radio frequency device according to any one of claims 16-18, characterized in that, The antenna structure includes one or more of the following: external waveguide antenna, microstrip antenna, packaged antenna, and dielectric resonant antenna.

21. A radar, characterized in that, include: The radio frequency device as described in any one of claims 16-20.