A daisy chain signal line power supply circuit
Patent Information
- Application Number
- CN202522351533.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-05
- Publication Date
- 2026-09-22
- Estimated Expiration
- 2035-11-05
AI Technical Summary
[0019]1.通过终端电阻可匹配信号线阻抗,防止控制信号在传输末端产生反射,保证信号完整性;信号接收器准确接收调理后的控制信号并传输至处理器,处理器完成信号解析与转发;电源转换器与第一稳压器将输入的供电电压转换为设备内部所需的稳定电压,去耦电容滤除电源线上的噪声,避免电源噪声影响处理器等核心元件的运行。
Smart Images

Figure CN224790655U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of daisy-chain communication, and in particular to a daisy-chain signal line power supply circuit. Background Technology
[0002] In scenarios such as industrial sensor cascading, intelligent lighting control, and networking of small security devices, multiple devices often need to be connected in a daisy-chain topology to achieve low-cost, low-complexity connectivity. This topology only requires the first and last devices to be connected in series, reducing wiring nodes and making it suitable for space-constrained or geographically dispersed environments. Traditional daisy chains require two sets of two-wire cables for each device: one for power supply and the other for transmitting control signals. As the number of devices increases, the total cable load doubles. Therefore, a daisy-chain signal cable power supply circuit is urgently needed. Utility Model Content
[0003] The purpose of this invention is to provide a daisy-chain signal line power supply circuit to solve the problems existing in the prior art.
[0004] The above-mentioned technical objective of this utility model is achieved through the following technical solution:
[0005] A daisy-chain signal line power supply circuit includes a power input module, a power management module, a signal source module, a signal conditioning module, and multiple devices. The power input module is electrically connected to the power management module, the signal source module is electrically connected to the power management module, and the signal source module is electrically connected to the multiple devices. The signal source module is used to generate raw control signals, the signal conditioning module is used to enhance the drive of the raw control signals and optimize signal integrity, and the multiple devices are used to receive the conditioned control signals and realize signal forwarding and power supply.
[0006] By adopting the above technical solution, the power input module provides power, which is then supplied to multiple devices in sequence through the power management module, signal source module, and signal conditioning module, while simultaneously outputting corresponding signals, thereby saving wiring.
[0007] In a further embodiment, the power input module includes a power connector, a TVS diode, a common-mode inductor, and a first filter capacitor; the positive pin of the power connector is connected to the first input terminal of the common-mode inductor; the positive pin of the power connector is connected to the cathode of the TVS diode; the anode of the TVS diode is connected to system ground; the first output terminal of the common-mode inductor is connected to the first terminal of the first filter capacitor; the second terminal of the first filter capacitor is connected to system ground; the negative pin of the power connector is connected to the second input terminal of the common-mode inductor; and the second output terminal of the common-mode inductor is connected to system ground.
[0008] By adopting the above technical solutions, TVS diodes can transiently suppress surge voltage in the input power supply and prevent the circuit from being broken down by high voltage; while common-mode inductors can reduce the impact of external interference on the circuit; and the first filter capacitor can filter out differential-mode interference in the power supply.
[0009] In a further embodiment, the power management module includes a switching regulator unit and an LDO regulator unit; the switching regulator unit includes a first resistor and a power MOSFET; one end of the first resistor is connected to the first end of a first filter capacitor, the gate drive output terminal of the first resistor is connected to the gate of the power MOSFET, the drain of the power MOSFET is connected to the power input terminal of the first resistor, the source of the power MOSFET is connected to the device, and the other end of the first resistor is connected to system ground.
[0010] In a further embodiment, the LDO regulator unit includes an overvoltage suppression element, a first capacitor, a second capacitor, an operational amplifier, a second resistor, a third resistor, a fourth resistor, and a power supply unit; one end of the first capacitor is connected between a common-mode inductor and a first filter capacitor, and the other end of the first capacitor is connected to system ground; one end of the overvoltage suppression element is connected to one end of the first capacitor, and the other end of the overvoltage suppression element is connected to the output terminal of the operational amplifier; the positive input terminal of the operational amplifier is connected to the positive terminal of the power supply unit, and the negative terminal of the power supply unit is connected to system ground; one end of the second resistor is connected to one end of the first capacitor; one end of the third resistor is connected to the other end of the second resistor, and the other end of the third resistor is connected to system ground; one end of the second capacitor is connected to one end of the second resistor, and the other end of the second capacitor is connected to the other end of the third resistor; one end of the fourth resistor is connected to one end of the second capacitor, and the other end of the fourth resistor is connected to the other end of the second capacitor.
[0011] By adopting the above technical solution, the overvoltage suppression component can prevent the circuit from being damaged by excessively high input voltage; the first capacitor and the second capacitor respectively realize input and output filtering to reduce voltage fluctuations; the operational amplifier, together with the second resistor, the third resistor and the fourth resistor, forms a feedback regulation loop, which can control the output voltage, thereby making the low-dropout stable output voltage meet the usage requirements.
[0012] In a further embodiment, the signal source module includes a clock generator and a microcontroller; the power input terminal of the clock generator is connected to one end of the fourth resistor; the clock output terminal of the clock generator is connected to the clock input terminal of the microcontroller; the power input terminal of the microcontroller is connected to one end of the fourth resistor; the ground terminal of the clock generator is connected to system ground; and the ground terminal of the microcontroller is connected to system ground.
[0013] By adopting the above technical solution, the clock generator outputs a precise clock signal, providing a unified timing reference for the microcontroller and ensuring its accurate operating timing. The microcontroller generates the original control signal based on the clock signal, and the grounding design of both avoids ground noise interference, further ensuring the logical correctness and stability of the original control signal.
[0014] In a further embodiment, the signal conditioning module includes a signal buffer, a filter resistor, a second filter capacitor, and a level converter; the input terminal of the signal buffer is connected to the signal transmitting terminal of the microcontroller; the output terminal of the signal buffer is connected to the first terminal of the filter resistor; the second terminal of the filter resistor is connected to the first terminal of the second filter capacitor; the second terminal of the second filter capacitor is connected to system ground; and the second terminal of the filter resistor is connected to the input terminal of the level converter.
[0015] By adopting the above technical solutions, the signal buffer enhances the driving capability of the original control signal and avoids signal attenuation over long distances or in multi-device cascades; the level converter converts the conditioned signal into a level standard that is compatible with downstream devices, solving the level incompatibility problem between different devices and ensuring that the signal can be accurately recognized by the devices.
[0016] In a further embodiment, the device includes a signal receiver, a power converter, a first voltage regulator, a processor, a terminating resistor, and a decoupling capacitor; the input terminal of the signal receiver is connected to the output terminal of the level converter; the output terminal of the signal receiver is connected to the signal input terminal of the processor; a first terminal of the terminating resistor is connected to the input terminal of the signal receiver; a second terminal of the terminating resistor is connected to system ground; the input terminal of the power converter is connected to the second terminal of the switching inductor; the output terminal of the power converter is connected to the input terminal of the first voltage regulator; the output terminal of the first voltage regulator is connected to the power input terminal of the processor; a first terminal of the decoupling capacitor is connected to the output terminal of the first voltage regulator; a second terminal of the decoupling capacitor is connected to system ground; the input terminal of the power converter of the subsequent device is connected to the power output terminal of the previous device; and the input terminal of the subsequent signal receiver is connected to the signal output terminal of the previous processor.
[0017] By adopting the above technical solution, the terminating resistor can match the signal line impedance, prevent the control signal from being reflected at the transmission end, and ensure signal integrity; the signal receiver accurately receives the conditioned control signal and transmits it to the processor, which completes signal parsing and forwarding; the power converter and the first voltage regulator convert the input power supply voltage into the stable voltage required by the device, and the decoupling capacitor filters out noise on the power line to avoid power supply noise affecting the operation of core components such as the processor.
[0018] In summary, this utility model has the following beneficial effects:
[0019] 1. The signal line impedance can be matched by the terminating resistor to prevent the control signal from being reflected at the transmission end and to ensure signal integrity; the signal receiver accurately receives the conditioned control signal and transmits it to the processor, which completes signal parsing and forwarding; the power converter and the first voltage regulator convert the input power supply voltage into the stable voltage required by the device, and the decoupling capacitor filters out noise on the power line to avoid power supply noise affecting the operation of core components such as the processor. Attached Figure Description
[0020] Figure 1 This is a schematic diagram of the overall principle of this utility model.
[0021] In the diagram, 1. Power connector; 2. TVS diode; 3. Common mode inductor; 4. First filter capacitor; 5. First resistor; 6. Power MOSFET; 7. Overvoltage suppression element; 8. First capacitor; 9. Second capacitor; 10. Operational amplifier; 11. Second resistor; 12. Third resistor; 13. Fourth resistor; 14. Power supply unit; 15. Clock generator; 16. Microcontroller; 17. Signal buffer; 18. Filter resistor; 19. Second filter capacitor; 20. Level converter; 21. Signal receiver; 22. Power converter; 23. First voltage regulator; 24. Processor; 25. Termination resistor; 26. Decoupling capacitor. Detailed Implementation
[0022] The present invention will be further described in detail below with reference to the accompanying drawings.
[0023] Identical parts are indicated by the same reference numerals. It should be noted that the terms "front," "rear," "left," "right," "upper," and "lower" used in the following description refer to the attached figures. Figure 1 In this specification, the terms "bottom surface" and "top surface," "inner" and "outer" refer to the direction toward or away from the geometry of a specific component. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this specification, "a plurality of" means two or more, unless otherwise explicitly and specifically defined by the direction of the center.
[0024] Example 1:
[0025] like Figure 1As shown, a daisy-chain signal line power supply circuit includes a power input module, a power management module, a signal source module, a signal conditioning module, and multiple devices. The power input module is electrically connected to the power management module, the signal source module is electrically connected to the power management module, and the signal source module is electrically connected to the multiple devices. The signal source module is used to generate the original control signal, the signal conditioning module is used to drive and enhance the original control signal and optimize its signal integrity, and the multiple devices are used to receive the conditioned control signal and realize signal forwarding and power supply.
[0026] The power input module includes a power connector 1, a TVS diode 2, a common-mode inductor 3, and a first filter capacitor 4. The positive pin of the power connector 1 is connected to the first input terminal of the common-mode inductor 3. The positive pin of the power connector 1 is connected to the cathode of the TVS diode 2. The anode of the TVS diode 2 is connected to system ground. The first output terminal of the common-mode inductor 3 is connected to the first terminal of the first filter capacitor 4. The second terminal of the first filter capacitor 4 is connected to system ground. The negative pin of the power connector 1 is connected to the second input terminal of the common-mode inductor 3. The second output terminal of the common-mode inductor 3 is connected to system ground.
[0027] The power management module includes a switching regulator unit and an LDO regulator unit; the switching regulator unit includes a first resistor 5 and a power MOSFET 6; one end of the first resistor 5 is connected to the first end of the first filter capacitor 4, the gate drive output terminal of the first resistor 5 is connected to the gate of the power MOSFET 6, the drain of the power MOSFET 6 is connected to the power input terminal of the first resistor 5, the source of the power MOSFET 6 is connected to the device, and the other end of the first resistor 5 is connected to system ground.
[0028] The LDO regulator unit includes an overvoltage suppression element 7, a first capacitor 8, a second capacitor 9, an operational amplifier 10, a second resistor 11, a third resistor 12, a fourth resistor 13, and a power supply unit 14. One end of the first capacitor 8 is connected between the common-mode inductor 3 and the first filter capacitor 4, and the other end of the first capacitor 8 is connected to system ground. One end of the overvoltage suppression element 7 is connected to one end of the first capacitor 8, and the other end of the overvoltage suppression element 7 is connected to the output terminal of the operational amplifier 10. The positive input terminal of the operational amplifier 10 is connected to the positive terminal of the power supply unit 14, and the negative terminal of the power supply unit 14 is connected to system ground. One end of the second resistor 11 is connected to one end of the first capacitor 8, one end of the third resistor 12 is connected to the other end of the second resistor 11, and the other end of the third resistor 12 is connected to system ground. One end of the second capacitor 9 is connected to one end of the second resistor 11, and the other end of the second capacitor 9 is connected to the other end of the third resistor 12. One end of the fourth resistor 13 is connected to one end of the second capacitor 9, and the other end of the fourth resistor 13 is connected to the other end of the second capacitor 9.
[0029] The signal source module includes a clock generator 15 and a microcontroller 16; the power input terminal of the clock generator 15 is connected to one end of the fourth resistor 13; the clock output terminal of the clock generator 15 is connected to the clock input terminal of the microcontroller 16; the power input terminal of the microcontroller 16 is connected to one end of the fourth resistor 13; the ground terminal of the clock generator 15 is connected to the system ground; and the ground terminal of the microcontroller 16 is connected to the system ground.
[0030] The signal conditioning module includes a signal buffer 17, a filter resistor 18, a second filter capacitor 19, and a level converter 20. The input terminal of the signal buffer 17 is connected to the signal transmitting terminal of the microcontroller 16. The output terminal of the signal buffer 17 is connected to the first terminal of the filter resistor 18. The second terminal of the filter resistor 18 is connected to the first terminal of the second filter capacitor 19. The second terminal of the second filter capacitor 19 is connected to system ground. The second terminal of the filter resistor 18 is connected to the input terminal of the level converter 20.
[0031] The device includes a signal receiver 21, a power converter 22, a first voltage regulator 23, a processor 24, a terminating resistor 25, and a decoupling capacitor 26. The input terminal of the signal receiver 21 is connected to the output terminal of the level converter 20. The output terminal of the signal receiver 21 is connected to the signal input terminal of the processor 24. The first terminal of the terminating resistor 25 is connected to the input terminal of the signal receiver 21. The second terminal of the terminating resistor 25 is connected to system ground. The input terminal of the power converter 22 is connected to the second terminal of the switching inductor. The output terminal of the power converter 22 is connected to the input terminal of the first voltage regulator 23. The output terminal of the first voltage regulator 23 is connected to the power input terminal of the processor 24. The first terminal of the decoupling capacitor 26 is connected to the output terminal of the first voltage regulator 23. The second terminal of the decoupling capacitor 26 is connected to system ground. The input terminal of the power converter 22 of the next device is connected to the power output terminal of the previous device. The input terminal of the next signal receiver 21 is connected to the signal output terminal of the previous processor 24.
[0032] Specific implementation process: The power is connected through the power connector of the power input module. If a transient surge voltage occurs, the TVS diode will quickly break down and conduct, and then conduct to the system ground to avoid damage to the components. Subsequently, the power flows through the common-mode inductor, and then through the first filter capacitor to the power management module. One path is connected to the switching regulator unit. The first resistor adjusts the gate drive speed of the power MOSFET, controls the MOSFET to switch at a set frequency, and transmits the signal to the first device in the daisy chain. The other path flows to the LDO regulator unit, passes through the overvoltage suppression component, and the first capacitor filters out input fluctuations. The operational amplifier, together with the second, third, and fourth resistors, forms a feedback loop to adjust the output voltage. After further filtering by the second capacitor, the output is sent to the signal source module.
[0033] The clock generator provides a timing reference for the microcontroller. Based on this clock signal, the microcontroller generates the original control signal. The original control signal then enters the signal conditioning module, first passing through a signal buffer, then through a filter resistor and a second filter capacitor. Finally, a level converter converts the signal to a level standard suitable for downstream devices. The control signal is then transmitted to the first device in the daisy chain. The device's signal receiver receives the signal and transmits it to the processor. Simultaneously, the power supply voltage transmitted by the switching regulator is converted by the device's power converter and regulated by the first regulator to provide a stable power supply to the processor. After parsing the control signal, the processor executes the corresponding instructions and forwards the signal to the next cascaded device, and so on, to achieve synchronous power supply and control signal transmission for all devices in the daisy chain.
[0034] In the embodiments disclosed in this utility model, the terms "installation," "connection," "linking," and "fixing" should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; "linking" can be a direct connection or an indirect connection through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms in the embodiments disclosed in this utility model according to the specific circumstances.
[0035] This specific embodiment is merely an explanation of the present utility model and is not intended to limit the present utility model. After reading this specification, those skilled in the art can make modifications to this embodiment without contributing any inventive step, but as long as they are within the scope of the claims of the present utility model, they are protected by patent law.
Claims
1. A daisy-chain signal line power supply circuit, characterized in that, The system includes a power input module, a power management module, a signal source module, a signal conditioning module, and multiple devices. The power input module is electrically connected to the power management module, the signal source module is electrically connected to the power management module, and the signal source module is electrically connected to the multiple devices. The signal source module is used to generate the original control signal, the signal conditioning module is used to enhance the drive of the original control signal and optimize its signal integrity, and the multiple devices are used to receive the conditioned control signal and realize signal forwarding and power supply.
2. The daisy-chain signal line power supply circuit according to claim 1, characterized in that: The power input module includes a power connector (1), a TVS diode (2), a common-mode inductor (3), and a first filter capacitor (4); the positive pin of the power connector (1) is connected to the first input terminal of the common-mode inductor (3); the positive pin of the power connector (1) is connected to the cathode of the TVS diode (2); the anode of the TVS diode (2) is connected to system ground; the first output terminal of the common-mode inductor (3) is connected to the first terminal of the first filter capacitor (4); the second terminal of the first filter capacitor (4) is connected to system ground; the negative pin of the power connector (1) is connected to the second input terminal of the common-mode inductor (3); the second output terminal of the common-mode inductor (3) is connected to system ground.
3. The daisy-chain signal line power supply circuit according to claim 2, characterized in that: The power management module includes a switching regulator unit and an LDO regulator unit; the switching regulator unit includes a first resistor (5) and a power MOSFET (6); one end of the first resistor (5) is connected to the first end of the first filter capacitor (4), the gate drive output terminal of the first resistor (5) is connected to the gate of the power MOSFET (6), the drain of the power MOSFET (6) is connected to the power input terminal of the first resistor (5), the source of the power MOSFET (6) is connected to the device, and the other end of the first resistor (5) is connected to system ground.
4. The daisy-chain signal line power supply circuit according to claim 3, characterized in that: The LDO regulator unit includes an overvoltage suppression element (7), a first capacitor (8), a second capacitor (9), an operational amplifier (10), a second resistor (11), a third resistor (12), a fourth resistor (13), and a power supply unit (14). One end of the first capacitor (8) is connected between the common-mode inductor (3) and the first filter capacitor (4), and the other end of the first capacitor (8) is connected to system ground. One end of the overvoltage suppression element (7) is connected to one end of the first capacitor (8), and the other end of the overvoltage suppression element (7) is connected to the output terminal of the operational amplifier (10). The positive input terminal of the operational amplifier (10) is connected to the power supply unit. The positive terminal of the power supply unit (14) is connected, the negative terminal of the power supply unit (14) is connected to the system ground, one end of the second resistor (11) is connected to one end of the first capacitor (8), one end of the third resistor (12) is connected to the other end of the second resistor (11), the other end of the third resistor (12) is connected to the system ground, one end of the second capacitor (9) is connected to one end of the second resistor (11), the other end of the second capacitor (9) is connected to the other end of the third resistor (12), one end of the fourth resistor (13) is connected to one end of the second capacitor (9), and the other end of the fourth resistor (13) is connected to the other end of the second capacitor (9).
5. A daisy-chain signal line power supply circuit according to claim 4, characterized in that: The signal source module includes a clock generator (15) and a microcontroller (16); the power input terminal of the clock generator (15) is connected to one end of the fourth resistor (13); the clock output terminal of the clock generator (15) is connected to the clock input terminal of the microcontroller (16); the power input terminal of the microcontroller (16) is connected to one end of the fourth resistor (13); the ground terminal of the clock generator (15) is connected to the system ground; the ground terminal of the microcontroller (16) is connected to the system ground.
6. A daisy-chain signal line power supply circuit according to claim 5, characterized in that: The signal conditioning module includes a signal buffer (17), a filter resistor (18), a second filter capacitor (19), and a level converter (20); the input terminal of the signal buffer (17) is connected to the signal transmitting terminal of the microcontroller (16); the output terminal of the signal buffer (17) is connected to the first terminal of the filter resistor (18); the second terminal of the filter resistor (18) is connected to the first terminal of the second filter capacitor (19); the second terminal of the second filter capacitor (19) is connected to system ground; and the second terminal of the filter resistor (18) is connected to the input terminal of the level converter (20).
7. A daisy-chain signal line power supply circuit according to claim 6, characterized in that: The device includes a signal receiver (21), a power converter (22), a first voltage regulator (23), a processor (24), a terminating resistor (25), and a decoupling capacitor (26); the input terminal of the signal receiver (21) is connected to the output terminal of the level converter (20); the output terminal of the signal receiver (21) is connected to the signal input terminal of the processor (24); the first terminal of the terminating resistor (25) is connected to the input terminal of the signal receiver (21); the second terminal of the terminating resistor (25) is connected to system ground; the input terminal of the power converter (22) is connected to the switching inductor. The second terminal is connected; the output terminal of the power converter (22) is connected to the input terminal of the first regulator (23); the output terminal of the first regulator (23) is connected to the power input terminal of the processor (24); the first terminal of the decoupling capacitor (26) is connected to the output terminal of the first regulator (23); the second terminal of the decoupling capacitor (26) is connected to system ground; the input terminal of the power converter (22) of the latter device is connected to the power output terminal of the former device; and the input terminal of the signal receiver (21) of the latter device is connected to the signal output terminal of the former processor (24).