RS485 to dual bus circuit

Abstract

The utility model provides a kind of RS485 conversion two bus circuits.The RS485 conversion two bus circuit includes RS485 communication circuit, transceiver isolation circuit, two bus communication circuit, transceiver switching circuit and two bus short circuit detection circuit;Wherein, the RS485 communication circuit and two bus communication circuit are connected by transceiver isolation circuit;The transceiver switching circuit is connected with the RS485 communication circuit;The two bus short circuit detection circuit is connected with the transceiver switching circuit.The RS485 conversion two bus circuit has the technical effect of simple circuit, reduce production cost.

Description

Technical Field

[0001] This utility model proposes an RS485 to two-bus circuit, belonging to the field of communication circuit technology. Background Technology

[0002] RS485 is a commonly used communication interface widely applied in various devices. Two-wire communication technology, with its simplified wiring (two wires simultaneously handle power supply and communication), support for non-polarity connections, and flexible topology, is commonly used in smoke detectors, temperature sensors, and fire monitoring equipment. In practical applications, sometimes a host with an RS485 communication interface needs to communicate with a two-wire device, requiring a dedicated conversion device. In existing technology, the RS485 receiver chip is connected to the MCU's UART interface, and then the MCU's UART interface is connected to the two-wire chip. Communication between the two interfaces is achieved through MCU forwarding, and the MCU controls the transmit / receive status and short-circuit detection. Its disadvantages include complex circuitry, high cost, the need for programming the conversion, and the need to modify the MCU's UART interface parameters for different baud rates, making operation complex. Utility Model Content

[0003] This utility model provides an RS485 to two-bus circuit to solve the above-mentioned technical problems existing in the prior art. The technical solution adopted is as follows: An RS485 to two-bus converter circuit is disclosed, comprising an RS485 communication circuit, a transmit / receive isolation circuit, a two-bus communication circuit, a transmit / receive switching circuit, and a two-bus short-circuit detection circuit; wherein the RS485 communication circuit and the two-bus communication circuit are connected via the transmit / receive isolation circuit; the transmit / receive switching circuit is connected to the RS485 communication circuit; and the two-bus short-circuit detection circuit is connected to the transmit / receive switching circuit.

[0004] Furthermore, the RS485 communication circuit adopts a circuit structure with an RS485 transceiver chip as its core; pins 1 / 4 of the RS485 transceiver chip are connected to the transceiver isolation circuit.

[0005] Furthermore, the pins VOA and VIB of the transceiver isolation circuit are respectively connected to the pins RS485_TXD and RS485_RXD of the RS485 communication circuit; the pins VIA and VOB of the transceiver isolation circuit are respectively connected to the pins TCBUS_RXD and TCBUS_TXD of the two-bus communication circuit.

[0006] Furthermore, the two-bus communication circuit includes a two-bus transceiver chip; wherein, the pins TCBUS_RXD, TCBUS_R / T#, and TCBUS_TXD of the two-bus transceiver chip are respectively connected to the pins RS485_RXD, RS485_R# / T, and RS485_TXD of the RS485 communication circuit.

[0007] Furthermore, the transmit / receive switching circuit includes a dual D flip-flop, a first opto-isolation circuit module, a second opto-isolation circuit module, and an electronic switch and signal gating module; wherein, the first opto-isolation circuit module is connected to pin Q1 of the dual D flip-flop via resistor R17; the second opto-isolation circuit module is connected to pin RESET1 of the dual D flip-flop via resistor R33; and the electronic switch and signal gating module is connected to pin CLOCK1 of the dual D flip-flop.

[0008] Furthermore, the first opto-isolation circuit module includes a transistor Q1 and an opto-isolator U4; wherein the opto-isolator U4 is connected to the dual D flip-flop via the transistor Q1.

[0009] Furthermore, the second opto-isolation circuit module includes a transistor Q5 and an opto-isolator U6; wherein the opto-isolator U6 is connected to the dual D flip-flop via the transistor Q5.

[0010] Furthermore, the electronic switch and signal gating module includes a transistor Q4, a capacitor C8, a resistor R20, a potentiometer module, a resistor R23, and a resistor R18. The emitter of transistor Q4 is connected to the CLOCK1 pin of the dual D flip-flop via resistor R20, and is also connected to the +5V power supply via the potentiometer module. The collector of transistor Q4 is connected to the CLOCK1 pin of the dual D flip-flop via capacitor C8. The base of transistor Q4 is connected to the RS485_RXD pin of the RS485 communication circuit via resistor R23, and is also connected to the +5V power supply via resistor R18.

[0011] Furthermore, the potentiometer module includes a potentiometer RW1 and a resistor R16; wherein the emitter of the transistor Q4 is connected to the +5V power supply terminal through the potentiometer RW1 and the resistor R16 connected in series.

[0012] Furthermore, the two-bus short-circuit detection circuit includes a transistor Q6 and an opto-isolator U7; wherein, one end of the opto-isolator U7 is electrically connected to the base of the transistor Q6 through a resistor R35; the emitter of the transistor Q6 is electrically connected to the ground terminal; the collector of the transistor Q6 is connected to the +5V power supply terminal through a potentiometer RW2 and a resistor R29 connected in series; and the other end of the opto-isolator U7 is circuitally connected to the two-bus communication circuit.

[0013] The beneficial effects of this utility model are: This invention proposes an RS485 to two-bus converter circuit based on the principles of serial communication. It includes at least a start bit (low level), data bits, and a stop bit (high level), maintaining the stop bit (high level) during idle periods. The duration of the stop bit (high level) determines whether data transmission is complete. After confirming completion, a D flip-flop chip switches and maintains the transmit / receive state. Two-bus short-circuit protection is achieved through the reset function of the D flip-flop chip, keeping the two-bus in receive mode until the short-circuit fault disappears. Communication conversion between RS485 and two-bus is implemented through hardware circuitry, eliminating the need for MCU programming, thus reducing cost and circuit complexity. Furthermore, the circuit structure of this invention enables automatic control of transmit / receive switching and includes two-bus short-circuit protection. The automatic switching between RS485 and two-bus transmit / receive control, with adjustable switching delay time, is not limited to RS485 and two-bus communication but can also be used for other communication conversions requiring transmit / receive control switching. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of the RS485 to two-bus circuit described in this utility model; Figure 2 This is a schematic diagram of the RS485 communication circuit described in this utility model; Figure 3 This is a schematic diagram of the transceiver isolation circuit described in this utility model; Figure 4 This is a schematic diagram of the structure of the two-bus communication circuit described in this utility model; Figure 5 This is a schematic diagram of the transceiver switching circuit and the two-bus short-circuit detection circuit described in this utility model. Detailed Implementation

[0015] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are for illustration and explanation only and are not intended to limit the present invention.

[0016] The present invention will be further described below with reference to specific embodiments, but the present invention is not limited to the embodiments.

[0017] In the description of this utility model, it should be noted that the terms "center", "longitudinal", "lateral", "upper", "lower", "front", "rear", "left", "right", "top", "bottom", "inner", "outer" and "vertical" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0018] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a direct connection or an indirect connection through an intermediate medium; or they can refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.

[0019] Furthermore, in the description of this utility model, unless otherwise stated, "multiple", "multiple groups", and "multiple roots" mean two or more.

[0020] Unless otherwise specified, the materials, instruments and methods used in the following embodiments are all conventional materials, instruments and methods in the art and can be obtained through commercial channels. Example

[0021] An RS485 to two-bus circuit, such as Figure 1 As shown, the RS485 to two-bus circuit includes an RS485 communication circuit, a transmit / receive isolation circuit, a two-bus communication circuit, a transmit / receive switching circuit, and a two-bus short-circuit detection circuit; wherein, the RS485 communication circuit and the two-bus communication circuit are connected through the transmit / receive isolation circuit; the transmit / receive switching circuit is connected to the RS485 communication circuit; and the two-bus short-circuit detection circuit is connected to the transmit / receive switching circuit.

[0022] like Figure 2 As shown, the RS485 communication circuit adopts a circuit structure with an RS485 transceiver chip as its core; pins 1 / 4 of the RS485 transceiver chip are connected to the transceiver isolation circuit.

[0023] like Figure 3As shown, pins VOA and VIB of the transceiver isolation circuit are respectively connected to pins RS485_TXD and RS485_RXD of the RS485 communication circuit; pins VIA and VOB of the transceiver isolation circuit are respectively connected to pins TCBUS_RXD and TCBUS_TXD of the two-bus communication circuit.

[0024] like Figure 4 As shown, the two-bus communication circuit includes a two-bus transceiver chip; wherein, the pins TCBUS_RXD, TCBUS_R / T#, and TCBUS_TXD of the two-bus transceiver chip are respectively connected to the pins RS485_RXD, RS485_R# / T, and RS485_TXD of the RS485 communication circuit.

[0025] like Figure 5 As shown, the transmit / receive switching circuit includes a dual D flip-flop, a first opto-isolation circuit module, a second opto-isolation circuit module, and an electronic switch and signal gating module. The first opto-isolation circuit module is connected to pin Q1 of the dual D flip-flop via resistor R17; the second opto-isolation circuit module is connected to pin RESET1 of the dual D flip-flop via resistor R33; and the electronic switch and signal gating module is connected to pin CLOCK1 of the dual D flip-flop. Specifically, the first opto-isolation circuit module includes transistor Q1 and opto-isolator U4; the opto-isolator U4 is connected to the dual D flip-flop via transistor Q1. The second opto-isolation circuit module includes transistor Q5 and opto-isolator U6; the opto-isolator U6 is connected to the dual D flip-flop via transistor Q5.

[0026] Meanwhile, the electronic switch and signal selection module includes a transistor Q4, a capacitor C8, a resistor R20, a potentiometer module, a resistor R23, and a resistor R18. The emitter of transistor Q4 is connected to the CLOCK1 pin of the dual D flip-flop via resistor R20, and is also connected to the +5V power supply via the potentiometer module. The collector of transistor Q4 is connected to the CLOCK1 pin of the dual D flip-flop via capacitor C8. The base of transistor Q4 is connected to the RS485_RXD pin of the RS485 communication circuit via resistor R23, and is also connected to the +5V power supply via resistor R18. Specifically, the potentiometer module includes a potentiometer RW1 and a resistor R16; the emitter of transistor Q4 is connected to the +5V power supply via the series-connected potentiometer RW1 and resistor R16.

[0027] like Figure 5 As shown, the two-bus short-circuit detection circuit includes a transistor Q6 and an opto-isolator U7; one end of the opto-isolator U7 is electrically connected to the base of the transistor Q6 through a resistor R35; the emitter of the transistor Q6 is electrically connected to the ground terminal; the collector of the transistor Q6 is connected to the +5V power supply terminal through a potentiometer RW2 and a resistor R29 connected in series; the other end of the opto-isolator U7 is connected to the two-bus communication circuit.

[0028] The working principle of the above technical solution is as follows: RS485 transceiver chip U1 is connected to one end of transceiver isolation circuit U2 through transceiver pin 1 / 4, and the other end of transceiver isolation circuit U2 is connected to two-bus transceiver chip U3 in two-bus communication circuit, specifically connected to transceiver pin 2 / 16 of two-bus transceiver chip U3.

[0029] When in transmit / receive state 1: The RS485 transceiver chip U1 is in receive mode, and the two-bus chip U3 is in transmit mode. The process switches between RS485 transceiver chip U1 in transmit mode and two-bus chip U3 in receive mode. This is achieved by changing the high or low level of pin 1 of the RS485 transceiver chip U1. When data is received on pin 1 of the RS485 transceiver chip U1, transistor Q4 will turn on or off, and capacitor C8 will discharge through resistor R20 and transistor Q4, maintaining a low level. When pin 1 of RS485 transceiver chip U1 has no data for an extended period (idle state, stop bit high), transistor Q4 is turned off. Capacitor C8 is charged through resistor R16, potentiometer RW1, and resistor R20. When capacitor C8 reaches a high level, pin 3 (CLOCK) of dual D flip-flop U5 receives a rising edge, outputting the high level state of pin 5 of dual D flip-flop U5 to pin 1 of dual D flip-flop U5, switching the state of RS485 transceiver chip U1 to transmit state (high level). At the same time, transistor Q3 and opto-isolator U4 control the state of the two-wire bus to receive state (high level), waiting to receive data from the two-wire bus terminals.

[0030] When in transmit / receive state 2: The RS485 transceiver chip U1 is in transmit mode, and the two-bus chip U3 is in receive mode. The process switches between RS485 transceiver chip U1 in receive mode and two-bus chip U3 in transmit mode. The high / low level is switched via the receive pin 2 of the two-bus transceiver chip U3. When data is received on pin 2 of the U3 two-bus transceiver chip, the opto-isolator U6 controls the transistor Q5 to turn on or off. Capacitor C9 discharges through R33 and transistor Q5, maintaining a low level. When pin 2 of the dual-bus transceiver chip U3 has no data for an extended period (idle state, stop bit high), transistor Q5 is turned off. Capacitor C9 is charged through resistor R29, potentiometer RW2, and resistor R33. When capacitor C9 reaches a high level, reset pin 4 of the dual D flip-flop U5 is high, controlling pin 1 of the dual D flip-flop U5 to output a low level. This switches the state of RS485 transceiver chip U1 to receive state (low level). Simultaneously, transistor Q3 and opto-isolator U4 control the state of the dual-bus chip U3 to transmit state (low level), waiting to receive data from RS485 transceiver chip U1.

[0031] The dual-bus short-circuit protection is implemented as follows: When the RS485 transceiver chip U1 is in transmit mode and the dual-bus chip U3 is in receive mode, pin 8 of the dual-bus transceiver chip U3 outputs 5V. If the bus is short-circuited at this time, the bus will go low. A short-circuit signal is output through the voltage reference chip TL431, U8, and the opto-isolator U7. The short-circuit signal is high, controlling transistor Q6 to conduct, thus keeping capacitor C9 at a low level. This maintains the dual-bus system in receive mode until the short-circuit signal disappears.

[0032] The technical effects of the above solution are as follows: The RS485 to two-bus circuit proposed in this embodiment, based on the principle of serial communication, includes at least a start bit (low level), data bits, and a stop bit (high level), which remains at the stop bit (high level) when idle. The duration of the stop bit (high level) determines whether data transmission is complete. After confirming data transmission completion, a D flip-flop chip is used to switch and maintain the transmit / receive state. Two-bus short-circuit protection is achieved by using the reset function of the D flip-flop chip to keep the two-bus in the receiving state until the short-circuit fault disappears. Communication conversion between RS485 and two-bus is implemented through hardware circuitry, eliminating the need for MCU programming. This reduces cost and circuit complexity. Furthermore, the circuit structure proposed in this invention enables automatic control of transmit / receive switching and includes two-bus short-circuit protection. Simultaneously, the automatic switching between RS485 transmit / receive control and two-bus transmit / receive control, with adjustable switching delay time, is not limited to RS485 and two-bus communication but can also be used for other communication conversions requiring transmit / receive control switching.

[0033] On the other hand, the circuit structure described in this embodiment features an extremely simple circuit architecture design, eliminating redundant and complex component configurations and significantly reducing the types and quantities of hardware materials used. This effectively reduces material costs and assembly time costs in the production process, significantly lowering the overall production cost. Simultaneously, relying on a pure hardware circuit design, there is no need to invest effort in MCU program development and writing, eliminating a series of software development processes such as program compilation, debugging, and burning. This greatly lowers the technical development threshold and difficulty, allowing developers to focus more on optimizing the hardware itself. Furthermore, it innovatively implements an automatic baud rate adaptation function. During use, operators do not need to modify MCU parameters to match different baud rates, completely avoiding the tedious work of troubleshooting communication failures and repeatedly debugging parameters due to baud rate mismatch. This greatly simplifies the deployment and use of the equipment, reduces the difficulty of use, and improves operational convenience and efficiency.

[0034] Obviously, those skilled in the art can make various modifications and variations to this utility model without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this utility model and their equivalents, this utility model also intends to include these modifications and variations.

Claims

1. An RS485 to two-bus circuit, characterized in that, The RS485 to two-bus circuit includes an RS485 communication circuit, a transmit / receive isolation circuit, a two-bus communication circuit, a transmit / receive switching circuit, and a two-bus short-circuit detection circuit; wherein, the RS485 communication circuit and the two-bus communication circuit are connected through the transmit / receive isolation circuit; the transmit / receive switching circuit is connected to the RS485 communication circuit; and the two-bus short-circuit detection circuit is connected to the transmit / receive switching circuit.

2. The RS485 to two-bus circuit according to claim 1, characterized in that, The RS485 communication circuit adopts a circuit structure with an RS485 transceiver chip as its core; pins 1 / 4 of the RS485 transceiver chip are connected to the transceiver isolation circuit.

3. The RS485 to two-bus circuit according to claim 1, characterized in that, The pins VOA and VIB of the transceiver isolation circuit are respectively connected to the pins RS485_TXD and RS485_RXD of the RS485 communication circuit; the pins VIA and VOB of the transceiver isolation circuit are respectively connected to the pins TCBUS_RXD and TCBUS_TXD of the two-bus communication circuit.

4. The RS485 to two-bus circuit according to claim 1, characterized in that, The dual-bus communication circuit includes a dual-bus transceiver chip; wherein, the pins TCBUS_RXD, TCBUS_R / T#, and TCBUS_TXD of the dual-bus transceiver chip are respectively connected to the pins RS485_RXD, RS485_R# / T, and RS485_TXD of the RS485 communication circuit.

5. The RS485 to two-bus circuit according to claim 1, characterized in that, The transmit / receive switching circuit includes a dual D flip-flop, a first opto-isolation circuit module, a second opto-isolation circuit module, and an electronic switch and signal gating module; wherein, the first opto-isolation circuit module is connected to pin Q1 of the dual D flip-flop through resistor R17; the second opto-isolation circuit module is connected to pin RESET1 of the dual D flip-flop through resistor R33; and the electronic switch and signal gating module is connected to pin CLOCK1 of the dual D flip-flop.

6. The RS485 to two-bus circuit according to claim 4, characterized in that, The first opto-isolation circuit module includes a transistor Q1 and an opto-isolator U4; wherein, the opto-isolator U4 is connected to the dual D flip-flop via the transistor Q1.

7. The RS485 to two-bus circuit according to claim 4, characterized in that, The second opto-isolation circuit module includes a transistor Q5 and an opto-isolator U6; wherein the opto-isolator U6 is connected to the dual D flip-flop via the transistor Q5.

8. The RS485 to two-bus circuit according to claim 4, characterized in that, The electronic switch and signal gating module includes a transistor Q4, a capacitor C8, a resistor R20, a potentiometer module, a resistor R23, and a resistor R18. The emitter of transistor Q4 is connected to the CLOCK1 pin of the dual D flip-flop via resistor R20, and is also connected to the +5V power supply via the potentiometer module. The collector of transistor Q4 is connected to the CLOCK1 pin of the dual D flip-flop via capacitor C8. The base of transistor Q4 is connected to the RS485_RXD pin of the RS485 communication circuit via resistor R23, and is also connected to the +5V power supply via resistor R18.

9. The RS485 to two-bus circuit according to claim 8, characterized in that, The potentiometer module includes potentiometer RW1 and resistor R16; wherein, the emitter of transistor Q4 is connected to the +5V power supply terminal through potentiometer RW1 and resistor R16 connected in series.

10. The RS485 to two-bus circuit according to claim 1, characterized in that, The two-bus short-circuit detection circuit includes a transistor Q6 and an opto-isolator U7; one end of the opto-isolator U7 is electrically connected to the base of the transistor Q6 through a resistor R35; the emitter of the transistor Q6 is electrically connected to the ground terminal; the collector of the transistor Q6 is connected to the +5V power supply terminal through a potentiometer RW2 and a resistor R29 connected in series; the other end of the opto-isolator U7 is connected to the two-bus communication circuit.

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