High-speed video switching system based on ARINC818

CN224790696UActive Publication Date: 2026-09-22SHANGHAI LANJIAN HONGQING TECH CO LTD
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Patent Information

Application Number
CN202522272823.6
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-10-28
Publication Date
2026-09-22
Estimated Expiration
2035-10-28

AI Technical Summary

Technical Problem

但基于FPGA的高速视频切换系统存在硬件架构复杂、切换逻辑软件程序烦琐等固有弊端,极大地降低了整个系统的可靠性,并大大增加了系统的成本

Benefits of technology

[0017]本实用新型提出的一种基于ARINC818的高速视频切换系统,其至少具有以下有益效果:首先,所述系统以高速交叉开关协议芯片为核心,通过主处理芯片控制交叉芯片的切换及选通,实现了分辨率为1920×1080@60Hz,4.25Gbps链路速率的8路ARINC818视频输入、24路ARINC818视频输出的高速视频实时切换输出显示。其次,相较于传统的高速视频切换系统,本实用新型提出的系统硬件架构简单,极大地简化了切换视频的逻辑,在增强系统可靠性的同时,大大降低了系统成本。所述系统可应用于航空电子领域的机载视频信号整合与显示控制,以及航空电子设备的地面测试。

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Abstract

The utility model discloses a high -speed video switching system based on ARINC818, the system includes main processing circuit module, photoelectric conversion circuit module and video distribution circuit module. The system can satisfy the high -speed video real -time switching output display of ARINC818, and simplifies the logic of switching video, enhances system reliability, reduces system cost. The hardware of the system can be realized through integrated circuit, specifically including secondary power conversion circuit, main processor circuit and self -checking circuit, photoelectric conversion circuit, video distribution circuit and R422 circuit. The high -speed video switching system based on ARINC818 proposed by the utility model takes high -speed cross switch chip as the core, and the switching and gating of cross chip are controlled through main processing chip, and the high -speed video real -time switching output display of 8 way ARINC818 video input, 24 way ARINC818 video output with 1920x1080@60Hz resolution and 4.25Gbps link rate is realized.
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Description

Technical Field

[0001] This utility model mainly relates to the field of avionics, specifically, it relates to a high-speed video switching system based on ARINC818. Background Technology

[0002] In modern avionics systems, critical components such as cockpit displays and mission payload monitoring require the integration of multi-source video signals, including radar data, forward-looking video, and map information, placing stringent demands on the real-time performance, reliability, and clarity of transmission. The ARINC818 protocol, as an authoritative standard in the field of avionics, has become the core technological foundation of next-generation airborne video systems. Currently, the ARINC818 protocol, as a next-generation aviation video digital bus standard, is widely used in the design of various civil and military aircraft worldwide.

[0003] Traditional high-speed video switching systems employ programmable logic chips (FPGAs) combined with switching logic software. For example, patent CN116233349A discloses a 4K video data conversion system between ARINC818 and HDMI based on an FPGA, including an FPGA unit, an HDMI 2.0 circuit module, and an SFP fiber optic module, achieving efficient conversion of 4K video data. However, FPGA-based high-speed video switching systems have inherent drawbacks such as complex hardware architecture and cumbersome switching logic software programs, which greatly reduce the reliability of the entire system and significantly increase its cost.

[0004] In summary, existing FPGA-based airborne video switching solutions cannot fully meet the switching requirements of high-speed video signals under the ARINC818 protocol. Therefore, there is an urgent need to develop a high-speed video switching system that is structurally simplified, highly reliable, cost-effective, and has self-testing capabilities. Utility Model Content

[0005] Based on existing technology, the objective of this utility model is to propose a high-speed video switching system based on ARINC818, which can meet the requirements of high-speed real-time video switching output display of ARINC818, simplify the logic of video switching, enhance system reliability, and reduce system cost.

[0006] According to the present invention, the above-mentioned problems are solved by a high-speed video switching system based on ARINC818.

[0007] This invention proposes a high-speed video switching system based on ARINC818, the system comprising: The main processing circuit module is configured to receive video switching gating commands and send them to the video distribution circuit module, control other circuits, and collect status data. The main processing circuit module includes a main processing chip and peripheral circuits. The photoelectric conversion circuit module is configured to convert ARINC818 fiber optic video signals to electrical signals and to detect the optical power of the input / output ARINC818 fiber optic video signals in real time; and The video distribution circuit module is configured to receive the input ARINC818 electrical signal, distribute channels and output ARINC818 electrical signals according to instructions, and simultaneously detect the validity status of the input ARINC818 electrical signal and send the validity status result to the main processing circuit module.

[0008] Furthermore, the system also includes: The power supply circuit module is configured to convert the uniform voltage input from the outside into the specific voltage required by each device in the system, so as to ensure a stable power supply to all components of the system. A storage circuit module configured to store the system's logic program and data; An RS422 bus circuit module is configured to enable bidirectional data transmission between the main processing chip and the host computer based on the RS422 protocol; and The BIT self-test circuit module is configured to detect key parameters of the system in real time.

[0009] Furthermore, the main processing chip is an MCU chip. The MCU chip receives the selection command from the host computer via an RS422 bus and then inputs it to the video distribution circuit module via a LocalBus bus.

[0010] Furthermore, the video allocation circuit module includes a high-speed cross switch protocol chip, which is configured to allocate the input video to a specified output channel and output it according to the received instructions, and report the video validity status result.

[0011] Furthermore, the BIT self-test circuit module includes a voltage detection chip and a temperature detection chip.

[0012] The system periodically performs self-tests, which include: The photoelectric conversion module detects the optical power of the input and output ARINC818 video and sends the detection results to the MCU chip via the I2C bus; The high-speed cross switch protocol chip detects the validity status of the input ARINC 818 video and sends the detection result to the MCU chip via the LocalBus bus; The voltage detection chip detects the secondary power supply voltage of the system and sends the detection result to the MCU chip via the I2C bus; and The temperature detection chip detects the device temperature of the system and sends the detection result to the MCU chip via the I2C bus.

[0013] Furthermore, the MCU chip reports the self-detection results to the host computer via the RS422 bus.

[0014] Furthermore, the power supply circuit module includes three HCE4620 power modules and two SM74401RGWT power chips, wherein: The power supply circuit module receives a +5V DC voltage input, which is converted by the power supply circuit module to generate internal DC voltages of different voltages. The HCE4620 power supply module generates internal DC voltages of +3.3V, +1.8V, +1.2V and / or +1.0V.

[0015] Furthermore, the storage circuit module includes: The program FLASH memory is configured to store the logic program, ensuring that the program is not lost after power failure; and An NVRAM memory is configured for health management of the system, storing information such as system startup and / or failure records.

[0016] Furthermore, the system also includes a reserved RS232 debugging serial port and a manual reset switch, which are configured for use in debugging mode.

[0017] This invention proposes a high-speed video switching system based on ARINC818, which has at least the following advantages: First, the system uses a high-speed cross-connect switch protocol chip as its core, and controls the switching and selection of the cross-connect chips through a main processing chip, achieving high-speed real-time switching and output display of 8 ARINC818 video inputs and 24 ARINC818 video outputs with a resolution of 1920×1080@60Hz and a link rate of 4.25Gbps. Second, compared with traditional high-speed video switching systems, the system proposed in this invention has a simple hardware architecture, which greatly simplifies the logic of video switching, enhances system reliability, and significantly reduces system cost. The system can be applied to airborne video signal integration and display control in the avionics field, as well as ground testing of avionics equipment. Attached Figure Description

[0018] To further illustrate the advantages and other features of the various embodiments of this utility model, a more specific description of the embodiments of this utility model will be presented with reference to the accompanying drawings. It is understood that these drawings depict only typical embodiments of this utility model and are therefore not intended to limit its scope. In the drawings, for clarity, identical or corresponding parts will be indicated by identical or similar reference numerals.

[0019] Figure 1 The diagram illustrates a system module architecture of a high-speed video switching system based on ARINC818, according to one embodiment of the present invention.

[0020] Figure 2 The diagram shows the topology of the power supply circuit module in one embodiment of the present invention.

[0021] Figure 3 The diagram illustrates the working principle of a high-speed video switching system based on ARINC818 in one embodiment of the present invention.

[0022] Figure 4 The diagram shows a physical hardware image of a high-speed video switching system based on ARINC818, according to one embodiment of the present invention.

[0023] Figure 5 The diagram shows a test system structure block diagram of a high-speed video switching system based on ARINC818 in one embodiment of the present invention.

[0024] List of reference numerals 100 High-speed video switching system based on ARINC818 101 Power Circuit Module 102 Main Processing Circuit Module 103 Photoelectric Conversion Circuit Module 104 Video Distribution Circuit Module 105 Storage Circuit Module 106 RS422 bus circuit module 107-bit self-test circuit module 1. Secondary power conversion circuit 2 MCU chips 3 High-speed cross switch protocol chip 4. Photoelectric conversion module 5. External devices 6 Electro-optical conversion module 7 Voltage Detection Chip 8 Temperature detection chip 9. Program Flash Memory 10 NVRAM memory 11 RS232 debugging serial port 12 JTAG Interface 13 Clock Circuit 200 Integrated Circuits 201 Secondary Power Supply Conversion Circuit 202 Main Processor Circuit and Self-Test Circuit 203 Photoelectric Conversion Circuit 204 Video Distribution Circuit 205 RS422 circuit 300 Test System for High-Speed ​​Video Switching System Based on ARINC818 301 video source 302 DVI to ARINC818 converter box 303 Airborne High-Speed ​​Video Switching System 304 ARINC818 to DVI converter box 305 monitor Detailed Implementation It should be noted that the components in the various figures may be shown exaggeratedly for illustrative purposes and are not necessarily to scale. In each figure, the same reference numerals are used for components that are identical or have the same function.

[0025] In this utility model, the various embodiments are merely intended to illustrate the solution of this utility model and should not be construed as limiting.

[0026] In this utility model, unless otherwise specified, the quantifiers “one” and “one” do not exclude scenarios involving multiple elements.

[0027] It should also be noted that, for clarity and simplicity, only a portion of the components may be shown in the embodiments of this utility model. However, those skilled in the art will understand that, under the teachings of this utility model, the required components can be added according to specific needs. Furthermore, unless otherwise stated, features in different embodiments of this utility model can be combined with each other. For example, a feature in the second embodiment can replace a corresponding or functionally identical or similar feature in the first embodiment, and the resulting embodiment will also fall within the scope of this application.

[0028] It should also be noted that within the scope of this utility model, the terms "same", "equal", and "equal to" do not mean that the two values ​​are absolutely equal, but allow for a certain reasonable error. In other words, the terms also cover "substantially the same", "substantially equal", and "substantially equal to".

[0029] In this utility model, the modules of the system according to this utility model can be implemented using software, hardware, firmware, or a combination thereof. When a module is implemented using software, its function can be achieved through computer program flow. For example, the module can be implemented using code segments (such as code segments in languages ​​like C and C++) stored in a storage device (such as a hard disk or memory), wherein the corresponding function of the module can be achieved when the code segment is executed by a processor. When a module is implemented using hardware, its function can be achieved by setting a corresponding hardware structure. For example, the module's function can be achieved by hardware programming a programmable device such as a field-programmable gate array (FPGA), or by designing an application-specific integrated circuit (ASIC) that includes multiple transistors, resistors, and capacitors. When a module is implemented using firmware, the module's function can be written into a read-only memory such as an EPROM or EEPROM in the form of program code, and the corresponding function of the module can be achieved when the program code is executed by a processor. In addition, some functions of the module may need to be implemented by separate hardware or by working in cooperation with the hardware. For example, the detection function is implemented by a corresponding sensor (such as a proximity sensor, accelerometer, gyroscope, etc.), the signal transmission function is implemented by a corresponding communication device (such as a Bluetooth device, infrared communication device, baseband communication device, Wi-Fi communication device, etc.), the output function is implemented by a corresponding output device (such as a display, speaker, etc.), and so on.

[0030] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0031] Figure 1 This diagram illustrates a system module architecture of a high-speed video switching system based on ARINC818, according to one embodiment of the present invention. Figure 1 As shown, in one embodiment of this utility model, the high-speed video switching system 100 based on ARINC818 includes a power supply circuit module 101, a main processing circuit module 102, a photoelectric conversion circuit module 103, a video distribution circuit module 104, a storage circuit module 105, an RS422 bus module 106, and a BIT self-test circuit module 107. Each module will be described in turn below.

[0032] The power supply circuit module 101 is configured to convert the uniform voltage input from the outside into the specific voltage required by each device in the system, so as to ensure a stable power supply to all components of the system 100.

[0033] Figure 2 A topological diagram of the power supply circuit module in one embodiment of this utility model is shown. Figure 2As shown, in one embodiment of this utility model, the power supply circuit module 101 includes three HCE4620 DC-DC power modules manufactured by Beijing Sevenstar Electronics Co., Ltd., and two SM74401RGWT power chips manufactured by Guowei Electronics Co., Ltd. The power supply circuit module 101 converts the input +5VDC voltage into different internal DC voltages. Specifically, the HCE4620 power modules generate +3.3V, +1.8V, +1.2V, and +1.0V voltages. The +3.3V voltage generated by the HCE4620 power module is mainly used for the I / O interfaces of various interface chips and processing chips, as well as for powering optical module circuits and storage circuits. The +1.8V and +1.0V voltages generated by the HCE4620 power module are mainly used to power the logic operation and data processing areas of the internal core of the FPGA (Field Programmable Gate Array). The +1.2V voltage generated by the HCE4620 power module is mainly used to power high-speed cross-connect protocol chips; The +1.2V and +1.0V voltages generated by the SM74401RGWT power chip are mainly used to power the MGT (Multi-Gigabit Transceiver) in the FPGA. The MGT is a hard-core module specifically designed for high-speed serial data transmission, mainly responsible for handling the transmission and reception of high-speed differential signals (such as 1Gbps and above), and is widely used in high-speed protocol scenarios such as PCIe, Ethernet, and ARINC818.

[0034] The main processing circuit module 102 is configured to receive video switching gating commands and send them to the video distribution circuit module, control other circuits, and collect status data. In one embodiment of this invention, the main processing circuit module 102 includes an MCU chip manufactured by STMicroelectronics and its peripheral circuitry. The MCU chip has abundant internal logic resources, used to receive video switching gating commands and send them to a high-speed cross-connect protocol chip to achieve video switching gating control. The MCU chip communicates with external devices via an RS422 bus, and simultaneously reports the detection results of input / output video optical power, input video validity status, secondary power supply voltage, and key component temperature to the host computer via the RS422 bus.

[0035] The photoelectric conversion circuit module 103 is configured to realize the mutual conversion between ARINC818 fiber optic video signals and electrical signals, and to detect the optical power of the input / output ARINC818 fiber optic video signals in real time. In one embodiment of this utility model, photoelectric conversion modules HTA8528-MD+001SA and HTA8529-MD+001SA manufactured by AVIC Optoelectronic Technology Co., Ltd. are used to construct the photoelectric conversion circuit. The HTA8529-MD+001SA module is a high-performance 12-channel LCC48-packaged parallel optical receiver module that converts the input fiber optic signal into an electrical signal input, realizing fiber optic signal-to-electrical signal conversion (photoelectric conversion); the HTA8528-MD+001SA module is a high-performance 12-channel LCC48-packaged parallel optical transmitter module that converts electrical signals into optical signals output, realizing electrical signal-to-fiber optic signal conversion (electro-optic conversion). Each channel of both photoelectric conversion modules supports a typical transmission rate of 6.25Gbps, with a total rate of up to 75Gbps and a maximum fiber optic transmission distance of up to 100m. Meanwhile, the HTA8529-MD+001SA module and the HTA8528-MD+001SA module respectively detect the optical power of the input and output video and send it to the MCU chip via the I2C bus.

[0036] The video distribution circuit module 104 is configured to receive input ARINC818 electrical signals, allocate channels according to instructions, and output ARINC818 electrical signals. Simultaneously, it detects the validity status of the input ARINC818 electrical signals and sends the validity status result to the main processing circuit module. In one embodiment of this invention, the video distribution circuit module 104 includes an ADI high-speed cross-connect protocol chip M21024. This chip supports 24×24-channel high-speed serial differential electrical signal data cross-connect routing and transceiver. It supports data forwarding transmission with bandwidths from 100M to 12.5Gbps, has an end-to-end chip delay of 0.5ns, uses a BGA package, has 400 pins, a typical power consumption of 4W at an 800mV swing, a maximum power consumption of 5.5W, an operating temperature range of -40℃ to 85℃, and a chip size of 21mm×21mm. It also supports link EQ equalization. The video distribution circuit module allocates the input video signal to the designated output channel according to the received selection instruction. At the same time, the status of the input video is detected, and the status result is sent to the MCU chip.

[0037] The storage circuit module 105 is configured to store the logic program and data of the system 100. In one embodiment of this invention, the storage circuit module 105 mainly includes a program FLASH memory and an NVRAM memory. The program FLASH memory uses an SM29LV256MC FLASH memory with a capacity of 32MB, used to store the logic program and ensure that the program is not lost after power failure. The NVRAM memory uses an FM28V100-TG chip with a capacity of 4MB, used for the health management of the entire system, storing and recording important information such as the system startup and faults.

[0038] The RS422 bus module 106 is configured to implement bidirectional data transmission between the main processing chip (MCU chip) and the host computer based on the RS422 protocol. In one embodiment of this utility model, the RS422 bus module 106 includes an RS422 transceiver chip, which can convert the ARINC818 video switching gating command issued by the host computer (such as an aircraft control system) into a signal recognizable by the MCU and transmit it to the main processing circuit module 102. The main processing circuit module 102 also converts the system status data (such as BIT self-test results and video switching status) summarized by the main processing circuit module 102 into RS422 differential signals and feeds them back to the host computer, ensuring bidirectional interaction and real-time monitoring of the system by the host computer.

[0039] The BIT self-test circuit module 107 is configured to detect key parameters of the system 100 in real time. In one embodiment of this invention, the BIT self-test circuit module includes a voltage detection chip and a temperature detection chip to detect the secondary power supply voltage and the temperature of key components of the system 100. The detection results of the secondary power supply voltage and the temperature of key components are sent to the MCU chip via the I2C bus, and the MCU chip reports all detection results to the host computer via the RS422 bus.

[0040] Figure 3 This diagram illustrates the working principle of a high-speed video switching system based on ARINC818, according to one embodiment of the present invention. Figure 3 As shown in one embodiment of this utility model: The overall power input of the system 100 is a +5V DC voltage input, which is converted into the secondary voltage required by each device by the power conversion chip in the secondary power conversion circuit 1 and input to devices such as MCU chip 2 and high-speed cross switch protocol chip 3.

[0041] The system 100 receives 8 channels of ARINC818 fiber optic video input. After input, the fiber optic signal is converted into an electrical signal by the photoelectric conversion module 4 and then input to the high-speed cross switch protocol chip 3. The MCU chip 2 communicates with the external device 5 via an RS422 bus, receives video switching gating commands, and inputs them to the high-speed cross switch protocol chip 3 via the LocalBus bus to achieve gating control of video switching. The high-speed cross switch protocol chip 3 allocates the input video signal to the designated output channel according to the received selection command. The video signal output by the high-speed cross switch protocol chip 3 is input to the electro-optical conversion module 6, which converts the electrical signal into an optical signal for output. Through the above steps, 8 channels of ARINC818 video input and 24 channels of ARINC818 video output are achieved.

[0042] In one embodiment of this utility model, the system 100 performs a self-test to ensure stable system operation. Specifically, the self-test is as follows: When the video is input to the photoelectric conversion module 4, the photoelectric conversion module 4 detects the optical power of the input ARINC818 video and sends the result to the MCU chip 2 via the I2C bus; When video is input to the high-speed cross switch protocol chip 3, the high-speed cross switch protocol chip 3 detects the validity status of the input video and sends the result to the MCU chip 2 via the LocalBus bus; When the video is output by the electro-optical conversion module 6, the electro-optical conversion module 6 detects the optical power of the output ARINC818 video and sends the result to the MCU chip 2 via the I2C bus; The voltage detection chip 7 detects the secondary power supply voltage of the system 100 and sends it to the MCU chip 2 via the I2C bus; Temperature detection chip 8 detects the temperature of key components in the system 100 and sends the results to MCU chip 2 via I2C bus; MCU chip 2 reports all detection results to the host computer via RS422 bus, realizing the self-detection of system 100.

[0043] In one embodiment of this invention, the program FLASH memory 9 is connected to the MCU chip 2 and the high-speed cross switch protocol chip 3 to store relevant logic programs and prevent program loss after power failure. The NVRAM memory 10 is connected to the MCU chip 2 and is used for the health management of the system 100, storing and recording important messages such as the startup and faults of the system 100.

[0044] In one embodiment of this invention, the RS232 debug serial port 11 is reserved for use in debug mode. Simultaneously, a manual reset switch can be used to input a manual reset signal to the system 100. The MCU chip 2 and the high-speed crossover switch protocol chip 3 have JTAG interfaces 12 for chip-level debugging, programming, and / or testing of the system 100.

[0045] In one embodiment of this utility model, both the MCU chip 2 and the high-speed cross switch protocol chip 3 are connected to the clock circuit 13 to provide reliable timing signals for chip operation and stable operation of the system 100.

[0046] Figure 4 The diagram shows a physical hardware representation of a high-speed video switching system based on ARINC818, according to one embodiment of this invention. Figure 4 As shown, in one embodiment of this utility model, the hardware of the system is implemented using an integrated circuit 200. The integrated circuit includes: The secondary power conversion circuit 201 is configured to convert an externally input uniform DC voltage (such as +5VDC) into multiple low-voltage DC voltages (such as +3.3V, +1.2V, etc.) required by various circuits inside the integrated circuit, providing stable and accurate power supply for other circuits (main processor circuit, photoelectric conversion circuit, video distribution circuit, etc.).

[0047] The main processor circuit and self-testing circuit 202 are configured to receive and parse external commands via RS422, generate video switching control signals, and send them to the video distribution circuit 204. Simultaneously, the main processor circuit coordinates the operating timing of various circuits, enabling state control of circuits such as photoelectric conversion and video distribution. The self-testing circuit integrates voltage and temperature detection modules, real-time monitoring parameters such as the secondary power supply voltage inside the integrated circuit, the temperature of key components (such as the video distribution circuit chip), and the validity of the video signal, and transmits the detected data to the main processor circuit. The main processor circuit analyzes the data to determine if there are any abnormalities in the system (such as over-temperature or voltage anomalies), providing a basis for fault early warning.

[0048] The photoelectric conversion circuit 203 is configured to achieve bidirectional conversion between optical and electrical signals under the ARINC818 protocol: it receives externally input ARINC818 fiber optic video signals, converts them into electrical signals, and transmits them to the video distribution circuit, providing a signal format that can be directly processed by the circuit for subsequent switching processing; it also receives "switching complete" ARINC818 electrical video signals output from the video distribution circuit, converts them into optical signals, and outputs them to an external display device. During this process, the power of the input / output optical signals is simultaneously detected, and the optical power status is fed back to the main processor circuit to ensure the reliability of the optical transmission link.

[0049] The video distribution circuit 204 is configured to perform channel allocation and routing switching on the ARINC818 electrical signal video input from the photoelectric conversion circuit based on control commands issued by the main processor circuit, accurately allocating the video signal of the specified input channel to the target output channel. Simultaneously, it detects the validity of the input video signal in real time (e.g., whether it conforms to the ARINC818 protocol specification, whether there is a signal interruption), and feeds the detection results back to the main processor circuit, ensuring the accuracy of the switching action and the integrity of video transmission.

[0050] RS422 circuit 205 is configured to achieve bidirectional data transmission based on the RS422 protocol: it receives ARINC818 video switching gating instructions from the host computer, converts them into a signal format suitable for the main processor circuit, and transmits them; it converts the system status data (such as self-test results and video switching status) summarized by the main processor circuit into RS422 differential signals and feeds them back to the host computer, realizing closed-loop interaction between external control and internal status, and adapting to the reliable communication requirements in the airborne environment.

[0051] Figure 5 This diagram illustrates a test system block diagram of a high-speed video switching system based on ARINC818, according to one embodiment of the present invention. Figure 5 As shown, in one application embodiment of this utility model, the test system 300 for a high-speed video switching system based on ARINC818 includes: Video source 301 is configured to provide DVI format video input to the test system 300; The DVI to ARINC818 converter box 302 is configured to convert input DVI format video to ARINC818 format and output it. The airborne high-speed video switching system 303 is configured to realize real-time switching output display of ARINC818 high-speed video. The structure, function and implementation of the airborne high-speed video switching system 303 can be understood to be roughly the same as the high-speed video switching system in the foregoing embodiments of this utility model. ARINC818 to DVI converter box 304, which is configured to convert input ARINC818 format video to DVI format and output it; and The display 305 is configured to receive and display DVI format video output from the output converter 304.

[0052] The workflow of the testing system 300 is as follows: Video source 301 inputs DVI format video into DVI to ARINC818 converter box 302, converting the input video to ARINC818 format. The ARINC818 format video is then input into airborne high-speed video switching system 303. Airborne high-speed video switching system 303 receives +5V voltage through DC power supply 307 and communicates with host computer 306 via RS422 bus, receiving video switching selection commands from host computer 306. Based on these commands, it allocates the output channel for the input video and outputs the video to ARINC818 to DVI converter box 304. ARINC818 to DVI converter box 304 converts the ARINC818 format video to DVI format and outputs it to the corresponding display 305.

[0053] In summary, this invention proposes a high-speed video switching system based on ARINC818. Using a high-speed crossbar switch chip as its core, and controlled by a main processing chip, the system achieves high-speed real-time video switching and output display with 8 ARINC818 video inputs and 24 ARINC818 video outputs at a resolution of 1920×1080@60Hz and a link rate of 4.25Gbps. It boasts advantages such as simple system architecture, simplified video switching logic, high system reliability, and low system cost.

[0054] Although various embodiments of the present invention have been described above, it should be understood that they are presented by way of example only and not as limitations. It will be apparent to those skilled in the art that various combinations, modifications, and alterations can be made without departing from the spirit and scope of the present invention. Therefore, the breadth and scope of the present invention disclosed herein should not be limited by the exemplary embodiments disclosed above, but should be defined solely by the appended claims and their equivalents.

Claims

1. A high-speed video switching system based on ARINC818, characterized in that, The system includes: The main processing circuit module is configured to receive video switching gating commands and send them to the video distribution circuit module, control other circuits, and collect status data. The main processing circuit module includes a main processing chip and peripheral circuits. The photoelectric conversion circuit module is configured to convert ARINC818 fiber optic video signals to electrical signals and to detect the optical power of the input / output ARINC818 fiber optic video signals in real time; and The video distribution circuit module is configured to receive the input ARINC818 electrical signal, distribute channels and output ARINC818 electrical signals according to instructions, and at the same time detect the validity status of the input ARINC818 electrical signal and send the validity status result to the main processing circuit module.

2. The system according to claim 1, characterized in that, The system also includes: The power supply circuit module is configured to convert the uniform voltage input from the outside into the specific voltage required by each device in the system, so as to ensure a stable power supply to all components of the system. A storage circuit module configured to store the system's logic program and data; An RS422 bus circuit module is configured to enable bidirectional data transmission between the main processing chip and the host computer based on the RS422 protocol; and The BIT self-test circuit module is configured to detect key parameters of the system in real time.

3. The system according to claim 2, characterized in that, The main processing chip is an MCU chip. The MCU chip receives the selection command from the host computer via RS422 bus and then inputs it to the video distribution circuit module via LocalBus bus.

4. The system according to claim 3, characterized in that, The video allocation circuit module includes a high-speed cross switch protocol chip, which is configured to allocate the input video to a specified output channel and output it according to the received instructions, and report the video validity status result.

5. The system according to claim 4, characterized in that, The BIT self-test circuit module includes a voltage detection chip and a temperature detection chip.

6. The system according to claim 5, characterized in that, The system periodically performs self-tests, which include: The photoelectric conversion circuit module detects the optical power of the input and output ARINC818 video and sends the detection results to the MCU chip via the I2C bus; The high-speed cross switch protocol chip detects the validity status of the input ARINC 818 video and sends the detection result to the MCU chip via the LocalBus bus; The voltage detection chip detects the secondary power supply voltage of the system and sends the detection result to the MCU chip via the I2C bus; and The temperature detection chip detects the device temperature of the system and sends the detection result to the MCU chip via the I2C bus.

7. The system according to claim 6, characterized in that, The MCU chip reports the self-detection results to the host computer via the RS422 bus.

8. The system according to claim 2, characterized in that, The power supply circuit module includes three HCE4620 power modules and two SM74401RGWT power chips, wherein: The power supply circuit module receives a +5V DC voltage input, which is converted by the power supply circuit module to generate internal DC voltages of different voltages. The HCE4620 power supply module generates internal DC voltages of +3.3V, +1.8V, +1.2V and / or +1.0V.

9. The system according to claim 2, characterized in that, The storage circuit module includes: The program FLASH memory is configured to store the logic program, ensuring that the program is not lost after power failure; and An NVRAM memory is configured for health management of the system, storing information such as system startup and / or failure records.

10. The system according to claim 2, characterized in that, The system also includes a reserved RS232 debugging serial port and a manual reset switch, which are configured for use in debugging mode.