Circuit board with punching precision monitoring structure

Abstract

The utility model relates to a circuit board with punch precision monitoring structure is equipped with the board frame to the board face outer edge, is equipped with punch monitoring structure to the PIN peg punch place in the board frame, and punch monitoring structure includes four windowed areas, and four windowed areas are with PIN peg punch position as center cross distribution, and the interval between two windowed areas of opposite sides is greater than the size of PIN peg positioning hole, and the distance of two windowed areas of opposite sides to the edge of PIN peg positioning hole adjacent to each other is equal. The utility model discloses four windowed areas with PIN peg punch position as center cross distribution are set to the PIN peg punch place in the board frame, when the PIN peg punch process appears the deviation, through the distance difference of opposite side windowed area and actual punch edge in X direction and Y direction, directly reflects the deviation of punch, effectively solves the problem that PIN peg punch deviation is difficult to detect in traditional PIN-LAM system.

Description

Technical Field

[0001] This utility model relates to the field of PCB board manufacturing, specifically to a circuit board with a punching precision monitoring structure. Background Technology

[0002] In the manufacturing process of multilayer PCBs, the lamination process is one of the key steps to ensure product quality. Its core requirement is to ensure precise alignment between each PCB layer to meet the stability and reliability of subsequent circuit signal transmission. Currently, the industry commonly uses a pin-laminated positioning system (PIN-LAM) to achieve lamination positioning of multilayer PCBs. Utilizing the rigidity of pins, the alignment and fixation between PCB layers during lamination can be effectively improved, thereby ensuring the alignment accuracy of the multilayer PCB.

[0003] However, when using the PIN-LAM system for production, the pins need to be installed after positioning holes are drilled in the PCB board outline using a punching machine. During the drilling process, the positioning holes may become misaligned due to factors such as fluctuations in equipment accuracy and operational errors. If this problem is not detected and identified in time, and the misaligned positioning holes are used in subsequent lamination processes, it will directly lead to a decrease in the alignment accuracy between layers of the multilayer PCB board.

[0004] The above problems are worth solving. Utility Model Content

[0005] To address the lack of detection and verification of pin misalignment during the drilling process of traditional multilayer PCBs using pin positioning systems, this invention provides a circuit board with a punching accuracy monitoring structure.

[0006] The technical solution of this utility model is as follows: A circuit board with a punching accuracy monitoring structure is provided. The outer edge of the circuit board is provided with a frame. A punching monitoring structure is provided in the frame corresponding to the punching position of the PIN. The punching monitoring structure includes four window areas. The four window areas are arranged in a cross shape with the punching position of the PIN as the center. The distance between two window areas on opposite sides is greater than the size of the PIN positioning hole. The distance from the two window areas on opposite sides to the edge of their respective adjacent PIN positioning holes is equal and equal to a preset value.

[0007] Preferably, the preset value is less than or equal to 50 μm.

[0008] As a preferred embodiment of the present invention, each side of the board frame has a PIN punching position, and each PIN punching position is pre-set with a PIN positioning hole for board pressing.

[0009] Furthermore, the four pin positioning holes are arranged in a cross shape around the board frame, and the two pin positioning holes on opposite sides are equidistant from the adjacent edge of the board frame.

[0010] As a preferred embodiment of this utility model, the PIN positioning hole is a rectangular hole.

[0011] As a preferred embodiment of this utility model, the four apex corners of the rectangular hole are rounded.

[0012] As a preferred embodiment of this utility model, the length of the PIN positioning hole is 6 to 12 mm and its width is 3 to 6 mm.

[0013] As a preferred embodiment of this utility model, the window area is a rectangular copper-free area on the circuit board.

[0014] The advantages of this utility model based on the above solution are as follows: This invention provides a symmetrical and fixed benchmark for accurately detecting PIN punching accuracy by setting four window areas in a cross shape centered on the PIN punching location within the board frame. The distances from the two opposite window areas to the edge of the preset PIN positioning hole are equal and equal to a preset value. Since the distances between the opposite window areas and the edge of the preset positioning hole are consistent, when misalignment or tilting occurs during PIN punching, the distances between the actual punching edge and the two window areas will break the original equality. By measuring the distance difference between the opposite window areas and the actual punching edge in the X and Y directions, the punching deviation can be directly reflected, effectively solving the problem of difficult detection of PIN punching misalignment in traditional PIN-LAM systems. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the structure of this utility model; Figure 2 This is a schematic diagram of the punching monitoring structure at the PIN pin punching location within the circuit board frame.

[0016] In the diagram, 1. Board frame; 2. Pin positioning holes; 3. Window area. Detailed Implementation

[0017] To better understand the purpose, technical solution, and technical effects of this utility model, the following description, in conjunction with the accompanying drawings and embodiments, will provide further explanation. It should be noted that similar reference numerals and letters in the following drawings indicate similar items; therefore, once an item is defined in one drawing, it does not need further definition and explanation in subsequent drawings. It is also stated that the embodiments described below are only for explaining this utility model and are not intended to limit it.

[0018] It should be noted that when a component is referred to as "fixed to" or "set on" another component, it can be directly on the other component or there may be an intermediate component. When a component is referred to as "connected to" another component, it can be directly connected to the other component or there may be an intermediate component.

[0019] The indicated orientation or positional relationship is based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the product is usually placed when in use, or the orientation or positional relationship in which a person skilled in the art would normally understand it, or the orientation or positional relationship in which the product is usually placed when in use. It is only for the purpose of facilitating the description of this application and simplifying the description, and is not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0020] The term “several” means two or more, unless otherwise explicitly specified.

[0021] like Figure 1 and Figure 2 As shown, a circuit board with a punching accuracy monitoring structure is disclosed. The circuit board has a frame 1 on its outer edge, which serves as a framework to support positioning-related structures and avoids occupying functional areas of the PCB. The PIN pin punching locations within the frame 1 are preset positions for subsequent PIN pin positioning holes 2 drilled by a punching machine. These PIN pin positioning holes 2 are used to install PIN pins, achieving interlayer alignment during multilayer PCB lamination through the rigid fixation of the PIN pins. In this invention, a punching monitoring structure is provided within the frame 1 corresponding to the PIN pin punching locations. This structure includes four window areas 3. Each window area 3 is a copper-free area on the circuit board, without copper foil coverage. The four window areas 3 are arranged in a cross shape with the PIN pin punching location as the center. The distance between two opposite window areas 3 is greater than the size of the PIN pin positioning hole 2, and the distances from the two opposite window areas 3 to the edges of their respective adjacent PIN pin positioning holes 2 are equal and equal to a preset value.

[0022] For example, two window areas 3 are set on the outer periphery of the preset PIN positioning hole 2, along the length direction (X-axis) and width direction (Y-axis) of the circuit board. The two window areas 3 distributed along the X-axis form one group, and the two window areas 3 distributed along the Y-axis form another group, forming a symmetrical cross shape. The distance between the two window areas 3 in the X-axis direction is greater than the length dimension of the PIN positioning hole 2; and the distance from the upper window area 3 to the upper edge of the PIN positioning hole 2 is equal to the distance from the lower window area 3 to the lower edge of the PIN positioning hole 2. The distance between the two window areas 3 in the Y-axis direction is greater than the width dimension of the PIN positioning hole 2; and the distance from the left window area 3 to the left edge of the PIN positioning hole 2 is equal to the distance from the right window area 3 to the right edge of the PIN positioning hole 2. The specific process is as follows: In the early stages of PCB production, four cross-shaped window areas 3 are pre-defined at the PIN pin punching locations on board frame 1. The pre-defined distances from the opposite window areas 3 to the pre-defined "PIN pin positioning hole edges" are also defined. For example, the distances from the two window areas 3 on both sides of the X-axis to the pre-defined positioning hole edges are equal, and the distances from the two window areas 3 on both sides of the Y-axis to the pre-defined positioning hole edges are equal. After the punching machine drills the PIN pin positioning holes 2 at the pre-defined positions, measuring tools are used to measure the distances from the actual positioning hole edges to the two window areas 3 on both sides of the X-axis, denoted as x1 and x2; and the distances from the actual positioning hole edges to the two window areas 3 on both sides of the Y-axis are measured using measuring tools, denoted as y1 and y2.

[0023] Since x1 should equal x2 and y1 should equal y2 under the preset conditions, if the difference between x1 and x2 (|x1-x2|) or the difference between y1 and y2 (|y1-y2|) exceeds the preset value in actual measurement, it indicates that there is a deviation in the punching. Taking a preset value of 50μm as an example, by calculating |x1-x2|≤50um and |y1-y2|≤50um, the accuracy of the punching machine can be monitored.

[0024] As can be seen, this utility model provides a quantifiable test basis for PIN punching accuracy, solving the problem of difficult detection of punching deviation in traditional PIN-LAM systems; the spacing between the opposite side window areas 3 is greater than the size of the positioning hole, ensuring the feasibility of measurement; the symmetrical preset distance makes deviation detection more intuitive, and the difference value can be used to determine whether the punching is qualified without complicated calculations; thus, it can promptly detect problems such as misalignment and tilting, and prevent positioning holes with deviations from entering the subsequent lamination process, thereby ensuring the interlayer alignment during the lamination of multilayer PCBs.

[0025] In this invention, each side of the board frame 1 has a PIN pin punching position, and each PIN pin punching position has a pre-set PIN pin positioning hole 2 for board bonding. By arranging positioning structures on all four sides of the board frame 1, the fixing force of the PIN pins on the board is more evenly distributed, reducing bonding deformation caused by localized force concentration and improving the stability of interlayer bonding in multilayer PCBs. Simultaneously, each PIN pin positioning hole 2 corresponds to an independent punching position, and with the dedicated cross-shaped window area 3 for each position, individual precision monitoring of each positioning hole can be achieved, ensuring that any misalignment or tilting of any positioning hole can be accurately identified.

[0026] Furthermore, the four pin positioning holes 2 are arranged in a cross shape around the board frame 1, with the two pin positioning holes 2 on opposite sides equidistant from the adjacent edges of the board frame 1, resulting in a symmetrical and balanced layout of the four positioning holes on the board frame 1. This symmetrical distribution of positioning holes allows for a more uniform constraint force applied to the circuit board by the pins during pressing, preventing board warping or interlayer misalignment due to unbalanced forces. From a precision monitoring perspective, the equidistant arrangement of the positioning holes on opposite sides with the edges of the board frame 1, combined with the corresponding cross-shaped window areas 3 for each positioning hole, forms a multi-dimensional precision verification benchmark. Specifically, not only can the punching deviation of a single positioning hole be monitored through its window area 3, but the symmetrical relationship of the positioning holes on opposite sides can also help verify the consistency of the overall layout.

[0027] In one specific embodiment, the PIN positioning hole 2 is a rectangular hole, and the four apex corners of the rectangular hole are rounded.

[0028] In one specific embodiment, the PIN positioning hole 2 has a length of 6 to 12 mm and a width of 3 to 6 mm.

[0029] In summary, this invention establishes a precise and operable punching accuracy monitoring system by setting symmetrically distributed cross-shaped window areas at the PIN pin punching locations on the circuit board frame, combined with a preset distance benchmark and quantitative detection methods. This not only solves the technical pain point of difficult detection of PIN pin positioning hole misalignment in traditional PIN-LAM systems, but also further improves the force balance and interlayer alignment stability during multilayer PCB board lamination through the symmetrical positioning hole design on the four sides of the board frame. By individually monitoring each positioning hole and performing multi-dimensional accuracy verification, this invention can promptly detect punching deviations and prevent them from affecting subsequent processes, ultimately effectively ensuring the lamination quality of multilayer PCB boards and improving product reliability and yield.

[0030] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0031] The above embodiments only illustrate several implementation methods of this utility model, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the utility model patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this utility model, and these all fall within the protection scope of this utility model. Therefore, the protection scope of this utility model patent should be determined by the appended claims.

Claims

1. A circuit board with a punching accuracy monitoring structure, wherein a frame is provided on the outer edge of the circuit board surface, characterized in that, The board frame is provided with a punching monitoring structure corresponding to the PIN punching position. The punching monitoring structure includes four window areas. The four window areas are arranged in a cross shape with the PIN punching position as the center. The distance between two window areas on opposite sides is greater than the size of the PIN positioning hole. The distance from the two window areas on opposite sides to the edge of their respective adjacent PIN positioning holes is equal and equal to a preset value.

2. The circuit board with a punching accuracy monitoring structure according to claim 1, characterized in that, Each side of the board frame has a PIN punching position, and each PIN punching position is pre-set with a PIN positioning hole for board pressing.

3. A circuit board with a punching accuracy monitoring structure according to claim 2, characterized in that, The four pin positioning holes are arranged in a cross shape with the plate frame as the center, and the two pin positioning holes on opposite sides are equidistant from the adjacent edge of the plate frame.

4. A circuit board with a punching accuracy monitoring structure according to claim 1, characterized in that, The PIN positioning hole is a rectangular hole.

5. A circuit board with a punching accuracy monitoring structure according to claim 4, characterized in that, The four apex corners of the rectangular hole are rounded.

6. A circuit board with a punching accuracy monitoring structure according to claim 1, characterized in that, The PIN positioning hole is 6 to 12 mm long and 3 to 6 mm wide.

7. A circuit board with a punching accuracy monitoring structure according to claim 1, characterized in that, The windowed area is a rectangular, copper-free area on the circuit board.

8. A circuit board with a punching accuracy monitoring structure according to claim 1, characterized in that, The preset value is less than or equal to 50um.

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