Semiconductor package
Patent Information
- Application Number
- CN202521999085.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Priority Date
- 2024-09-19
- Filing Date
- 2025-09-17
- Publication Date
- 2026-09-22
- Estimated Expiration
- 2035-09-17
Smart Images

Figure CN224791082U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to a semiconductor package. Background Technology
[0002] Advanced packaging and assembly technologies integrate multiple semiconductor dies and electronic components into a package structure. With the trend of miniaturization in electronic products, heat dissipation of packaged semiconductor dies has become an important issue in packaging technology. Utility Model Content
[0003] This utility model provides a semiconductor package comprising: a substrate, a die, a first bonding material, a second bonding material, and a heat dissipation system. The die is disposed on and connected to the substrate, wherein the die has a first surface and a second surface relative to the first surface. The first bonding material is disposed on the substrate and adjacent to the die. The second bonding material is disposed on and covers the second surface of the die. The heat dissipation system has a bottom surface in contact with the second bonding material, is disposed on the second bonding material above the die, and is disposed on the first bonding material on the substrate. The heat dissipation system is fixed to the substrate by the first bonding material, and the bottom surface of the heat dissipation system is fixed to the die by the second bonding material. A bonding interface exists between the second bonding material and the bottom surface of the heat dissipation system, and the bonding interface includes a first curved surface.
[0004] In some embodiments, the second surface of the die includes a second curved surface, and the first curved surface is conformal to the second curved surface. In some embodiments, the heat dissipation system includes a substrate having a base plate portion extending over a second bonding material and covering the die, and a foot portion connected to the base plate portion and extending from the base plate portion to the first bonding material, wherein the die is located below the base plate portion and surrounded by the foot portion. In some embodiments, the heat dissipation system includes an intermediate plate disposed on the substrate, the substrate including a support portion disposed between the intermediate plate and the base plate portion to define a circulation space between the support portion, the intermediate plate, and the base plate portion. In some embodiments, the heat dissipation system includes parallel fins connected to the base plate portion and located within the circulation space, and resilient pillars connected to the base plate portion and the intermediate plate and located adjacent to the fins.
[0005] This utility model provides a semiconductor package comprising: a substrate, a die, a first bonding material, a second bonding material, and a heat dissipation system. The die is disposed on and connected to the substrate, wherein the die has a first surface and a second surface relative to the first surface, and the die includes a first semiconductor die and a second semiconductor die. The first bonding material is disposed on the substrate and adjacent to the die. The second bonding material is disposed on the second surface of the die, covering the second surface of the die, and covering both the first and second semiconductor dies. The heat dissipation system is disposed on the second bonding material above the die and on the first bonding material on the substrate. The heat dissipation system includes an upper portion and a lower portion connected to the upper portion, and includes a base plate portion, the bottom surface of which contacts the second bonding material, and the bottom surface includes a first curved surface. The second surface of the die includes a second curved surface, and the first curved surface and the second curved surface are conformal.
[0006] In some embodiments, the bottom surface of the base plate portion contacts the top surface of the second bonding material, and the top surface of the second bonding material includes a third curved surface conformal to the first and second curved surfaces. In some embodiments, the heat dissipation system includes parallel fins connected to the base plate portion, and resilient pillars connected to the base plate portion and located beside the fins. In some embodiments, the resilient pillars located on the top surface of the base plate portion opposite to the bottom surface have different heights. In some embodiments, the top surface of the base plate portion includes a boiling-enhanced coating.
[0007] To make the above-mentioned features and advantages of this utility model more apparent and understandable, specific embodiments are described below, and detailed descriptions are provided in conjunction with the accompanying drawings. Attached Figure Description
[0008] The best understanding of the present invention will be achieved by reading the following detailed description in conjunction with the accompanying drawings. It should be noted that, according to industry standard practice, the various features are not drawn to scale. In fact, for clarity of explanation, the dimensions of the various features may be arbitrarily increased or decreased.
[0009] Figures 1 to 5 This is a schematic cross-sectional view showing the intermediate structures formed at various stages in a method for manufacturing a semiconductor package according to some embodiments of the present invention.
[0010] Figure 6 This is a schematic plan view illustrating a semiconductor package according to some embodiments of the present invention.
[0011] Figure 7 This is a schematic bottom view showing a heat dissipation system according to some embodiments of the present invention.
[0012] Figure 8 and Figure 9 The diagram shows the various parts of a heat dissipation system according to some embodiments of the present invention before assembly.
[0013] Figure 10 Cut fins within a heat dissipation system according to some embodiments of the present invention are shown.
[0014] Figures 11A to 11F This is a schematic cross-sectional view of an elastic column within a heat dissipation system according to some embodiments of the present invention.
[0015] Figure 12 This is a schematic cross-sectional view showing an electronic component according to some embodiments of the present invention.
[0016] Figure 13 This is a schematic cross-sectional view showing another electronic component according to some embodiments of the present invention.
[0017] Figure 14 This is a schematic cross-sectional view of a semiconductor package according to some embodiments of the present invention. Detailed Implementation
[0018] The following disclosure provides numerous different embodiments or examples for implementing various features of this utility model. Specific examples of components and arrangements are described below to simplify the utility model. Of course, these are merely examples and are not intended to be limiting. For example, the following description of a first feature formed on or on a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, thereby preventing direct contact between the first and second features. Furthermore, reference numerals and / or letters may be reused in various embodiments of this utility model. Such reuse is for the purpose of brevity and clarity, and is not intended to indicate a relationship between the various embodiments and / or configurations discussed.
[0019] Furthermore, for ease of explanation, this document may use spatially relative terms such as “beneath,” “below,” “lower,” “above,” and “upper” to describe the relationship between one component or feature shown in the figures and another component or feature. These spatially relative terms are intended to encompass different orientations of the device in use or operation, in addition to those shown in the figures. The device may have other orientations (rotated 90 degrees or in other orientations), and the spatially relative descriptions used herein will be interpreted accordingly.
[0020] Other features and processes may also be included. For example, test structures may be included to illustrate verification testing of three-dimensional (3D) packages or three-dimensional integrated circuit devices. Test structures may include, for example, test pads formed in redistribution layers or on a substrate, which enable testing of 3D packages or 3DICs using probes and / or probe cards. Verification tests can be performed on intermediate and final structures. Furthermore, the structures and methods disclosed herein can be used in conjunction with test methods including intermediate verification of known good dies to improve yield and reduce costs.
[0021] Figures 1 to 5 This is shown in the semiconductor package SD1 (such as...) Figure 5 A schematic cross-sectional view of the intermediate structure produced during the manufacturing process shown.
[0022] According to some embodiments of this utility model, refer to Figure 1 A dicing structure 100D is provided, and a substrate 200 is provided. In some embodiments, the dicing structure 100D is mounted on the top surface 200T of the substrate 200 and bonded to the substrate 200 via connectors 170. In some embodiments, the dicing structure 100D is a packaging unit including more than one die, chip, and / or electronic component. In some embodiments, the dicing structure 100D is a packaging unit obtained from a reconstructed wafer structure having multiple dies or chips stacked on a substrate and subjected to a dicing process. In some embodiments, the dicing structure 100D includes semiconductor dies 110, 120, and 130, which are bonded to an interposer 140 via die connectors 118, 128, and 138, respectively, and are laterally covered by an encapsulator 160. Here, the dicing structure can be interchangeably referred to as a die structure or a die.
[0023] In some embodiments, the semiconductor die 110 includes a semiconductor substrate 112, with a plurality of pads 114 embedded in a passivation layer 116 on the semiconductor substrate 112. In some embodiments, the active surface 110B of the semiconductor die 110 exposing the pads 114 faces the interposer layer 140. In some embodiments, the semiconductor substrate 112 may be made of a semiconductor material, such as a group III-V semiconductor material of the periodic table. In some embodiments, the semiconductor substrate 112 includes elemental semiconductor materials such as silicon or germanium, compound semiconductor materials such as silicon carbide, gallium arsenide, indium arsenide, or indium phosphide, or alloy semiconductor materials such as silicon germanium, silicon germanium carbide, gallium arsenide phosphide, or indium gallium phosphide. In some embodiments, the semiconductor substrate 112 may include silicon-on-insulator (SOI) or silicon-germanium-on-insulator (SGOI). In some embodiments, the semiconductor substrate 112 includes active elements (e.g., transistors, diodes, photodiodes, etc.) formed therein and optional passive elements (e.g., resistors, capacitors, inductors, fuses, etc.). In some embodiments, pad 114 includes aluminum pads, copper pads, or other suitable metal pads. In some embodiments, passivation layer 116 may be a single layer of suitable dielectric material or a multilayer structure. In some embodiments, die connectors 118, 128, 138 include copper (Cu), copper alloys, gold, silver, solder, or other conductive materials and may be formed by deposition, plating, or other suitable techniques. In some embodiments, die connectors 118, 128, 138 are prefabricated structures respectively attached to semiconductor dies 110, 120, 130. In some embodiments, die connector 118 is a metal pillar, a metal pillar with solder paste, a microbump, a bump formed by electroless nickel plating and electroless palladium immersion gold plating (ENEPIG) technology, or a combination thereof. In some embodiments, similar structural features of the semiconductor die 110 just discussed may be found in other semiconductor dies to which the diced structure 100D will be formed (e.g., in Figure 1 (In the semiconductor dies 120 and 130 shown).
[0024] In some embodiments, each of semiconductor dies 110, 120, and 130 may independently be or include a logic die, such as a central processing unit (CPU) die, a graphics processing unit (GPU) die, a microcontroller unit (MCU) die, an input-output (I / O) die, a baseband (BB) die, or an application processor (AP) die. In some embodiments, each of semiconductor dies 110, 120, and 130 may independently be or include a photonic die, including optical elements such as waveguides, modulators, and lasers integrated into a photonic integrated circuit. In some embodiments, one or more of semiconductor dies 110, 120, and 130 include at least one memory die, such as a high-bandwidth memory (HBM) die. In some embodiments, semiconductor dies 110, 120, and 130 may be different types of dies or perform different functions. In some embodiments, semiconductor dies 110, 120, and 130 may be the same type of die or perform the same function. In some embodiments, semiconductor die 110 includes a logic die, and at least one of semiconductor dies 120 and 130 includes a memory die.
[0025] In some embodiments, for the diced structure 100D, the interposer 140 includes a body 141 and a via 142 penetrating the body 141. Although not explicitly depicted in the figures, the interposer 140 may further include a redistribution layer (not shown) located on either surface for redistribution or redecoration. For example, the body 141 is made of a dummy wafer having a semiconductor material, similar to that previously discussed with reference to semiconductor substrate 112. In one embodiment, the interposer 140 is made of a bulk silicon wafer. In some embodiments, the material of the via 142 includes one or more metals. In some embodiments, the metal material of the via 142 may be copper (Cu), titanium (Ti), tungsten (W), aluminum (Al), an alloy, or a combination thereof. In some embodiments, semiconductor dies 110, 120, 130 are bonded to the vias 142 formed within the interposer 140 via die connectors 118, 128, 138. According to some embodiments, the semiconductor dies 110, 120, 130 are configured with their active surfaces facing the interposer 140. In some embodiments, underfillers 151, 152, and 153 are provided between semiconductor dies 110, 120, and 130 and interposer 140 to cover die connectors 118, 128, and 138 to ensure electrical connection between semiconductor dies 110, 120, and 130 and interposer 140 (which engages with via 142). In some embodiments, underfillers 151, 152, and 153 are formed by capillary underfill (CUF).
[0026] Reference Figure 1In some embodiments, for the diced structure 100D, semiconductor dies 110, 120, and 130 are laterally encapsulated on the interposer layer 140 by an encapsulant 160. In some embodiments, the diced structure 100D is obtained by forming an encapsulant 160 on the interposer layer 140 to cover the semiconductor dies 110, 120, and 130 to form a reconstructed wafer structure (not shown), followed by a wafer dicing process or a monomerization process such as a wafer dicing process. Optionally, a planarization process (e.g., a mechanical polishing process and / or a chemical mechanical polishing step) may be performed to remove excess encapsulant material until the back side of the semiconductor dies 110, 120, and 130 is exposed. In some embodiments, the material of the encapsulant 160 includes resin materials (such as epoxy resin), dielectric filler materials, etc.
[0027] exist Figure 1 For simplicity, only three semiconductor dies 110, 120, and 130 are shown on the interposer 140, but the present invention is not limited thereto. In some embodiments, the cut structure 100D may include more or fewer semiconductor dies than shown in the figures, as well as other electronic components or assemblies (e.g., integrated passive devices (IPDs), microelectromechanical systems (MEMS) components, photonic components, etc.). In some embodiments, the cut structure 100D (in Figure 6 (In the middle) it also includes a fourth die 150A and a fifth die 150B, and the fourth die 150A and the fifth die 150B can be or include photonic dies / photonic elements. Figure 1 For simplicity, only one dicing structure or packaging unit is shown in the figures; however, the present invention is not limited thereto. In some embodiments, multiple dicing structures 100D are bonded to the substrate 200, or the semiconductor package SD1 may include multiple dicing structures or packaging units, as well as other electronic components and photonic integrated circuit components. Furthermore, although the process of a chip-on-wafer (CoWoS) package is currently being shown, the present invention is not limited to the packaging structure shown in the figures; other types of packages, such as integrated fan-out (InFO) packages, stacked package (PoP) packages, etc., are also intended to be covered by the present invention and fall within the scope of the appended claims. In some embodiments, the semiconductor package is a large-size semiconductor package including photonic elements and / or photonic modules.
[0028] In some embodiments, such as Figure 1As shown, the cut structure 100D is joined to the top surface 200T of the substrate 200 via connector 170. In some embodiments, the substrate 200 includes connection structures 202 and 204 interconnected via internal wiring layers (represented by connection lines) to achieve bilateral electrical connections. In some embodiments, the substrate 200 may be formed of a flexible polymer material, and the substrate 200 is a flexible substrate. In some embodiments, the substrate 200 may be a package substrate or a ball grid array (BGA) substrate, which may include one or more active components and / or passive components, and appropriate connections between the various components to form functional circuitry.
[0029] In some embodiments, such as Figure 1 As shown, the cut structure 100D, together with the substrate 200, exhibits slight deformation or warping (i.e., a weeping-shaped bend in cross-section), and the top surface 100T of the cut structure 100D includes at least one curved surface (e.g., an arched surface). Here, the warping morphology of the cut structure 100D in the figures is intended to reflect a more realistic state or certain non-ideal state (i.e., non-flat or distorted state) as the size of the cut structure or substrate increases and due to mismatches in the coefficients of thermal expansion between various materials. It is understood that the deformation or warping states of the structures in the figures are merely illustrative and exemplary, and are not intended to limit the scope of this invention.
[0030] In some embodiments, refer to Figure 2 An underfill 180 is formed between the cut structure 100D and the substrate 200 to surround the connector 170 between the cut structure 100D and the substrate 200. For example, the underfill 180 may fill gaps between the connectors 170 and voids between the cut structure 100D and the substrate 200. In some embodiments, the underfill 180 overflows beyond the span of the cut structure 100D and extends to cover a portion of the sidewalls of the cut structure 100D. For example, the material of the underfill 180 may include epoxy resin, phenolic resin, silicone, or a combination thereof. In some embodiments, the underfill 180 is formed by capillary underfill (CUF). In some embodiments, the material of the underfill 180 may differ from the materials of the underfills 151, 152, and 153.
[0031] In some embodiments, refer to Figure 2A first bonding material 210 is disposed on a substrate 200, located adjacent to and surrounding the cut structure 100D. In some embodiments, the first bonding material 210 may be formed after the cut structure 100D is bonded to the substrate 200 and after the underfill 180 is formed. In some embodiments, the first bonding material 210 may be formed after the cut structure 100D is bonded to the substrate 200 but before the underfill 180 is formed. In some embodiments, the first bonding material 210 is formed at a location adjacent to the cut structure 100D and spaced at a distance from the cut structure 100D. In some embodiments, the first bonding material 210 is formed as an integral annular wall surrounding the cut structure 100D. In some embodiments, the first bonding material 210 is formed as separate blocks or clumps arranged in a ring around the cut structure 100D. Depending on the shape or structure of the object to be mounted (e.g., a heat dissipation system), the arrangement and distribution of the first bonding material 210 may be modified to facilitate better attachment and fixation of the subsequently mounted object. In some embodiments, the first bonding material 210 is disposed only on the substrate 200 of the intended heat dissipation system contact substrate 200.
[0032] In some embodiments, the material of the first bonding material 210 includes thermosetting adhesives, UV-curing adhesives, thermally conductive adhesives, thermosetting resins, waterproof adhesives, laminating adhesives, or combinations thereof. In some embodiments, the material of the first bonding material 210 includes a thermally conductive adhesive. Depending on the type of material used, the first bonding material 210 may be formed by deposition, lamination, printing, plating, or any other suitable technique.
[0033] Reference Figure 3 In some embodiments, the second bonding material 250 is disposed on the top surface 100T of the cut structure 100D. In some embodiments, in Figure 3In this configuration, the second bonding material 250 contacts the top surface 100T of the diced structure 100D (i.e., directly contacts the back surfaces of the semiconductor dies 110, 120, and 130 and the top surface of the encapsulation 160), while the top surface 250T of the second bonding material 250 is exposed. In some embodiments, the second bonding material 250 extends to cover the entire back surfaces of the semiconductor dies 110, 120, and 130 and the top surface of the encapsulation 160. In some embodiments, the span of the second bonding material 250 is approximately the same as or slightly larger than the span of the diced structure 100D. In some embodiments, the second bonding material 250 is formed to have the ability to adhere to the attachment surface (i.e., surface 100T) with satisfactory coverage. In other words, when the cutting structure 100D warps or deforms, the conformal second bonding material 250 formed on it will also warp or deform, and the surface 250T of the second bonding material also includes a curved surface (e.g., an arched surface), whose curvature (or warping degree) perfectly matches the curvature (or warping degree) of the curved top surface 100T of the cutting structure 100D.
[0034] In some embodiments, the second bonding material is or includes a thermal interface material (TIM). In some embodiments, the TIM is or includes a film-type (or sheet-like) TIM containing one or more polymer materials. In some embodiments, the film-type TIM can be die-coated or roller-coated to predetermined locations and then laminated onto the cut structure 100D. In some embodiments, the film-type TIM includes a polymeric adhesive material, such as silicone or epoxy resin, and a thermally conductive filler. For example, the thermally conductive filler includes metallic fillers of copper, silver (Ag), tin (Sn), indium (In), or combinations thereof. For example, the thermally conductive filler material includes boron nitride, aluminum (Al), alumina, aluminum nitride, copper, silver, indium, or combinations thereof. In some embodiments, the film-type TIM includes carbon nanotubes (CNTs), graphite, or graphene. In some embodiments, the film-type TIM includes a silicon-based polymer material and a metallic filler.
[0035] In some embodiments, the TIM is or includes a metallic thermal interface material (metallic TIM) that contains only metal or metal alloy (excluding polymer materials) and has high thermal conductivity. According to some embodiments of the present invention, different types of metallic thermal interface materials (metallic TIMs) are suitable as TIMs or second bonding materials 250, including solid-type metallic TIMs (SMTs) and liquid-type metallic TIMs (LMTs). In some embodiments, the TIM is applied as a thin film of suitable thickness in solid form to the top surface 100T of the cut structure 100D. In some embodiments, the metallic TIM includes one or more of tin, indium, silver, gallium (Ga), bismuth (Bi), zinc (Zn), or other suitable thermally conductive metals. In some embodiments, the metallic TIM includes gallium, gallium alloys, gallium-indium-tin alloys, gallium-indium-tin-zinc alloys, and indium-bismuth-tin alloys. Depending on the type of material used, the metallic TIM can be formed by deposition, lamination, printing, plating, or any other suitable technique. In some embodiments, the second bonding material 250 includes a phase change material (PCM). In some embodiments, the second bonding material 250 includes solder, including tin, indium, copper, silver, gallium, bismuth, rhodium (Rh), palladium (Pd), platinum (Pt), gold, or combinations thereof.
[0036] In some embodiments, the material of the second bonding material 250 is different from the material of the first bonding material 210. In some embodiments, the first bonding material 210 has a greater bonding strength (or adhesion strength) than the second bonding material 250, but the second bonding material 250 has a higher thermal conductivity than the first bonding material 210. There are no particular limitations on the materials of the first or second bonding materials, and they can be selected based on the materials used in the heat dissipation system to be installed. The first and second bonding materials must firmly bond these materials together.
[0037] Figure 4 This is a schematic cross-sectional view of a heat dissipation system according to some embodiments of the present invention. (Refer to...) Figure 4A heat dissipation system 300 is provided. In some embodiments, the heat dissipation system 300 includes a top cover 310, a middle plate 320, and a base plate 330. In some embodiments, the top cover 310 includes a top cover portion 312 and a frame portion 314, the frame portion 314 being located at or around the edge of the top cover portion 312 and connected to the top cover portion 312 to support the top cover portion 312. In some embodiments, the top cover portion 312 has a plurality of vent holes OS1 formed therein, which penetrate the top cover portion 312 and extend from the top surface 312T through the top cover portion 312 to the lower surface 312I. In some embodiments, the vent holes OS1 serve as inlets and outlets for cooling fluid or coolant. In some embodiments, the middle plate 320 includes a plurality of through holes OS2 formed therein, which penetrate the middle plate 320 and extend from the upper surface 320I through the middle plate 320 to the lower surface 320B. In some embodiments, the substrate 330 includes a base plate portion 332, a support portion 334 located at or around the edge of the base plate portion 332, and a foot portion 330R connected to the base plate portion 332. In some embodiments, the heat dissipation system 300 further includes elastic pillars 336 and fins 338 arranged on the upper surface 332I of the base plate portion 332.
[0038] like Figure 4As shown, after assembly, the top cover 310 is connected to the intermediate plate 320 to form a cavity or hollow space CS1 between the top cover 310 and the intermediate plate 320 (e.g., between surfaces 312I, 320I, and the inner sidewalls 314S of the frame portion 314). Similarly, the intermediate plate 320 is connected to the base plate 330 to form a cavity or hollow space CS2 between the base plate 330 and the intermediate plate 320 (e.g., between surfaces 332I, 320B, and the inner sidewalls 334S of the support portion 334). The top cover 310 connected to the intermediate plate 320 can be considered as the upper plate or upper part of the heat dissipation system 300, while the base plate 330 connected to the intermediate plate 320 can be considered as the lower part of the heat dissipation system 300. In some embodiments, the elastic pillar 336 located in the space CS2 is connected to the bottom plate portion 332, but its height is sufficient to contact surfaces 332I and 320B. In some embodiments, if the cut structure 100D warps or deforms, and surface 332I is or includes a curved surface, some resilient pillars 336 may be slightly compressed or extended to accommodate the reduced or expanded space caused by the curved surface, thus the resilient pillars 336 exhibit different heights. In some embodiments, spaces CS1 and CS2 are connected through a through-hole OS2 to interconnect and combine as a fluid circulation space. In some embodiments, a top cover 310 may constitute the ceiling and walls of the circulation space CS1, and a base plate 330 may constitute the floor and walls of the circulation space CS2. In some embodiments, fins 338, also located within space CS2 and arranged next to the resilient pillars 336, are connected to the base plate portion 332, but the fins 338 are shorter than the resilient pillars 336 and do not contact surface 320B. After assembly, the foot portion 330R is located below the base plate portion 332 and is connected to the lower surface 332B of the base plate portion 332 at or around the edge of the base plate portion 332 to form an open space CS3.
[0039] In some embodiments, the vent OS1 and through-hole OS2 are open holes, which may be shown in the drawings as having substantially vertical profiles in the thickness direction, and the sidewalls defining spaces CS1 and CS2 may be shown as vertical sidewalls. However, it is understood that either of these may have an inclined profile or be inclined sidewalls, and the invention is not limited thereto. Further details of the elastic pillars and fins will be discussed later.
[0040] In some embodiments, the heat dissipation system 300 is made of a material with high thermal conductivity, including one or more metals or metallic materials, such as Cu, aluminum (Al), aluminum nitride (AlN), aluminum silicon carbide (AlSiC), cobalt (Co), nickel-plated copper, nickel-iron alloys (e.g., Alloy 42), stainless steel (e.g., SUS430), tungsten (W), copper-tungsten alloys, and copper-molybdenum alloys. In some embodiments, the heat dissipation system 300 is made of an aluminum silicon copper alloy, or aluminum silicon nitride (AlSiN), aluminum silicon carbide (AlSiC), Cu-AlSiC, Cu-AlSiN, or combinations thereof. In some embodiments, the heat dissipation system 300 may be partially coated with another metal, such as gold, nickel, titanium-gold alloys, or lead, tin, nickel, vanadium, or combinations thereof. In some embodiments, the heat dissipation system 300 is made of a material with high thermal conductivity and includes metallic diamond composites (e.g., silver diamond or copper diamond), diamond-like carbon (DLC), single-crystal diamond, or combinations thereof. In some other embodiments, the heat dissipation system 300 is also made of superconducting materials, such as metallic diamond composites, including silver diamond (AgD), DLC, silver diamond composites, copper diamond composites, aluminum diamond composites, alloy 42 diamond composites, carbon metal composites, or combinations thereof. In some embodiments, the lower part of the heat dissipation system 300 is made of aluminum silicon nitride (AlSiN), aluminum silicon carbide (AlSiC), Cu-AlSiC, Cu-AlSiN, or combinations thereof.
[0041] The formation of the heat dissipation system 300, including a top cover 310, a middle plate 320, and a base plate 330, may involve various manufacturing methods selected based on the materials chosen for the top cover 310, the middle plate 320, and the base plate 330. In some embodiments, the top cover 310, the middle plate 320, and the base plate 330 may be manufactured by molding, forging, 3D printing, plating, stamping, or according to any other suitable technology. In some embodiments, the top cover 310, the middle plate 320, and the base plate 330 are manufactured separately and then assembled to produce the system 300. Furthermore, resilient pillars 336 and fins 338 may be pre-manufactured and mounted onto the base plate 330 or the middle plate 320 of the system 300. Alternatively, the resilient pillars 336 and fins 338 may be co-manufactured and integrally formed with the base plate 330 or the middle plate 320 of the system 300.
[0042] In some embodiments, the top cover 310, the intermediate plate 320, and the base plate 330 may be individually formed with a uniform thickness, or may have different thicknesses in different portions, provided that they are robust enough to support the structure, maintain the spaces CS1 and CS2 for fluid circulation, and maintain the space CS3 for accommodating the cutting structure. For example, the base plate portion 332 may have a thickness extending beyond the foot portion 330R and before being attached to the cutting structure 100D, with the base plate portion 332 having sufficient flexibility and conformability to accommodate the subsequently attached cutting structure 100D.
[0043] Reference Figure 5 A heat dissipation system 300 is disposed on a second bonding material 250 on a dicing structure 100D above a substrate 200 using a pick-and-place process, aligning and mounting the heat dissipation system 300 onto the dicing structure 100D and the substrate 200. Subsequently, a curing process is performed to attach the heat dissipation system 300 to the dicing structure 100D and the substrate 200. After curing, the heat dissipation system 300 is attached to the dicing structure 100D via the second bonding material 250 and fixed to the substrate 200 via the first bonding material 210, thereby obtaining a semiconductor package SD1. In some embodiments, the curing process is performed at a temperature range from approximately 100 degrees Celsius to approximately 300 degrees Celsius, preferably from approximately 130 degrees Celsius to approximately 190 degrees Celsius. This curing temperature can be adjusted depending on the type of thermal interface material used.
[0044] It should be noted that, from Figures 1 to 5 For simplicity, only the fabrication of a single semiconductor package SD1 is shown, but the present invention is not limited thereto. In some embodiments, multiple diced structures may be mounted on the substrate.
[0045] Here, refer to Figure 4 and Figure 5 When the heat dissipation system 300 is attached to the cutting structure 100D, the base plate portion 332 is disposed on and in direct contact with the second bonding material 250 on the cutting structure 100D, and a bonding interface BF1 exists between the lower surface 332B of the base plate portion 332 and the top surface 250T of the cured second bonding material 250. Figure 5 In this configuration, the base plate portion 332 extends substantially parallel to the cut structure 100D and the substrate 200 (i.e., the bottom surface 332B extends substantially parallel to the top surface 100T of the cut structure 100D). Due to the design of the elastic pillar 336 and the base plate portion 332, the base plate portion 332 is completely attached to the second bonding material 250 and substantially conforms to the surface profile of the second bonding material 250 and the underlying cut structure 100D. As described above, the cut structure 100D (along with the substrate 200) may be slightly deformed or warped. After attachment, the base plate portion 332 of the heat dissipation system 300 conforms to the warped or deformed profile of the cut structure 100D. That is, the bonding interface BF1 conforms to the degree of warping of the cut structure 100D. Figure 5 As shown in the upper part, the joint interface BF1 (and the bottom surface 332B of the base plate portion 332) includes a curved surface (arched surface) whose curvature (or warping) perfectly matches (or conforms to) the curvature (or warping) of the curved top surface 100T of the cut structure 100D. Here, a curve or surface conforming to other curves or surfaces means that the angle or angle magnitude between the corresponding curves or surfaces remains unchanged.
[0046] In some embodiments, when the warpage of the die structure 100D is significant, the substrate 330 may undergo a curvature adjustment process based on a predetermined curvature measured from a previous processing batch or a pre-measured die structure.
[0047] Because the base plate portion 332 conformally attaches to the cut structure 100D, there are substantially no gaps or voids between the base plate portion 332, the second bonding material 250, and the cut structure 100D. Therefore, a robust and reliable attachment and coverage of the heat dissipation system 300 is established, achieving higher heat dissipation efficiency. In some embodiments, because the cut structure 100D is non-planar or warped, the base plate portion 332 conforms to the contour change and becomes non-planar or warped, also causing the second bonding material 250 sandwiched therebetween to become non-planar or warped. The second bonding material 250 establishes an excellent bonding interface with very high coverage, showing substantially no voids or cracks in acoustic scanning microscopy testing.
[0048] Reference Figure 5 When the heat dissipation system 300 is attached to the cutting structure 100D via the second bonding material 250, the top cover portion 312 and the intermediate plate 320 are disposed on the bottom plate portion 332, extending across the cutting structure 100D, and the bottom foot portion 330R, the frame portion 314, and the support portion 334 are located on opposite sides and at the boundary of the intermediate plate 320 and protrude toward the substrate 200, respectively. In some embodiments, the frame portion 314 forms a right angle at the connection with the top cover portion 312, but the present invention is not limited thereto. In some embodiments, the bottom foot portion 330R and the support portion 334 extend in a direction that is almost perpendicular to the plane defined by the surfaces 332B and 332I, respectively, but since the bottom plate portion 332 may bend or warp with the cutting structure 100D, there may be angles other than 90 degrees. In some embodiments, the bottom foot portion 330R extends toward the substrate 200 and surrounds the cutting structure 100D. In some embodiments, when the heat dissipation system 300 is attached to the substrate 200, the foot portion 330R, the base portion 332, and the substrate 200 define a space CS3 surrounding the cut structure 100D on all sides, the cut structure 100D located within the space CS3 being spaced apart from the sidewalls of the foot portion 330R. In some embodiments, the span of the base portion 332 extends beyond the span of the second bonding material 250 or the cut structure 100D. In some embodiments, the foot portion 330R reaches the substrate 200 disposed on the first bonding material 210, the first bonding material 210 securing the heat dissipation system 300 within the semiconductor package SD1.
[0049] Figure 6This is a schematic plan view illustrating a semiconductor package according to some embodiments of the present invention, and the plan view may show a cross section along the interface between the second bonding material 250 and the substrate 330. In some embodiments, reference is made to... Figure 6 The span (or distribution area) RH of the base plate portion 332, where the elastic pillars 336 and fins 338 are configured, exceeds the span (solid line) of the second bonding material 250 or the span of the cut structure 100D. In some embodiments, the span of the second bonding material 250 or the span of the cut structure 100D may fall entirely within the span of the base plate portion 332. In some embodiments, such as Figure 6 As shown, based on the die type of the cut structure 110D and their respective heat dissipation requirements, the distribution area RH can be divided into a first area RH1 and a second area RH2. In some embodiments, if die 110 is or includes a central processing unit die, dies 120 and 130 are or include memory dies, and dies 150A and 150B are or include photonic dies, the second area RH2 has higher heat dissipation requirements and requires a higher TDP compared to the first area RH1 because the central processing unit die may generate more heat (having a higher thermal design power (TDP)). Based on this requirement, high thermal conductivity elements can be configured in the area with higher heat dissipation requirements, and the arrangement and layout of the fins can be changed accordingly.
[0050] Figure 7 This is a schematic bottom view showing a portion of a heat dissipation system according to some embodiments of the present invention. Figure 8 and Figure 9 The diagram shows the various parts of a heat dissipation system according to some embodiments of the present invention before assembly. Figure 10 Cut fins within a heat dissipation system according to some embodiments of the present invention are shown. Figures 11A to 11F This is a schematic cross-sectional view of an elastic column within a heat dissipation system according to some embodiments of the present invention.
[0051] Reference Figure 7 In some embodiments, after assembly, the entire substrate 330 overlaps with the intermediate plate 320, and may include an auxiliary portion 320E protruding from the intermediate plate 320 and extending beyond the substrate 330 to assist in the assembly or fixation of the intermediate plate 320. Figure 7 In the diagram, the distribution area RH (dashed line) indicates the middle or center portion of the bottom plate portion 332 of the substrate 330. (Refer to...) Figure 8 The intermediate plate 320 and the substrate 330 are shown as separate from each other before assembly. Figure 8 As can be seen, the intermediate plate 320 can provide multiple through holes OS2 as channels for fluid flow in spaces CS1 and CS2. Furthermore, in Figure 8In the middle, fins 338 are parallel strip-shaped thin protrusions that project upwards from surface 332I and extend along the X direction, and fins 338 are uniformly spaced at a distance P1 along the Y direction. Additionally, in Figure 9 In this embodiment, fins 338 are parallel, thin, strip-shaped protrusions projecting upward from surface 332I and extending along the Y direction, and the fins 338 are evenly spaced along the X direction. In some embodiments, the fins 338 extend parallel to each other and in a direction parallel to the flow direction of the circulating coolant during operation of the heat dissipation system. In some embodiments, reference is made to... Figure 8 The fins 338 may have substantially the same dimensions, with the same height H1 and thickness T1. For example, the thickness T1 of the fins 338 ranges from about 50 micrometers to about 200 micrometers, the spacing P1 ranges from about 100 micrometers to about 200 micrometers, and the height H1 ranges from 1 millimeter to about 5 millimeters. In some embodiments, the material of the fins 338 includes a material with high thermal conductivity. In some embodiments, the material of the fins 338 includes one or more metals or metal alloys, such as copper, aluminum, alloys thereof, or combinations thereof. In some embodiments, the material of the fins 338 includes AlSiN, AlSiC, Cu-AlSiC, Cu-AlSiN, or combinations thereof.
[0052] exist Figure 8 and Figure 9 In this configuration, thin fins 338 are fixed to the inner surface 332I of the bottom plate portion 332 of the substrate 330, and are distributed in two groups or segments within the distribution area RH. (Refer to...) Figure 10A boiling enhancement coating 339 may be included in the heat dissipation system 300 and coated between fins 338 and on the surface of fins 338 on the inner surface 332I of the base plate portion 332. In some embodiments, the boiling enhancement coating 339 may be distributed over the entire distribution area RH. In some embodiments, the boiling enhancement coating 339 may be distributed only over fin sections within the distribution area RH. Depending on the heat dissipation requirements, the boiling enhancement coating 339 may be distributed only in areas with higher heat dissipation requirements. In some embodiments, the boiling enhancement coating 339 comprises powders, meshes, weaves, foams, or grooved wicks of one or more metals, alloys, or metallic materials. In some embodiments, the materials of the boiling enhancement coating 339 include copper, aluminum, nickel, titanium, silver, stainless steel, their sintered metals, their alloys, or combinations thereof. In some embodiments, the boiling enhancement coating 339 comprises nickel powder, copper powder, aluminum powder, and stainless steel powder (containing silver, copper-phosphorus alloys). In some embodiments, the sintering-enhanced coating 339 comprises copper powder with a diameter ranging from about 10 micrometers to about 50 micrometers. In some embodiments, the copper powder is sintered at 800-1000 degrees Celsius and may selectively have pores smaller than 10 micrometers. In some embodiments, the sintering-enhanced coating 339 comprises a wicking structure, wire mesh, or twill made of copper, stainless steel, or Monel alloy, having a microporous sintered metal powder coating. In some embodiments, the sintering-enhanced coating 339 comprises one or more porous metals and / or glass fibers.
[0053] Reference Figure 9 The elastic pillars 336 are fixed to the inner surface 332I of the bottom plate portion 332 of the substrate 330 and arranged in a row along two sections of the fins 338 (within the distribution area RH). In some embodiments, the elastic pillars 336, with a height sufficient to contact surfaces 332I and 320B, are connected to the inner surface 332I of the bottom plate portion 332 and the lower surface 320B of the intermediate plate 320 to serve as height adjustment elements. Figure 11A , Figure 11B and Figure 11C As shown, the elastic post 336 can have different configurations and can be formed in the form of a coil or spring, such as a helical spring post with a contact gap. Figure 11A ), hourglass-shaped spiral spring column ( Figure 11B ) or barrel-shaped helical spring column ( Figure 11C ).like Figure 11C As shown, if surface 332I is or includes a curved surface, the elastic pillar 336 may be slightly compressed to accommodate the curved surface due to the characteristics of the spring structure. Additionally, as... Figure 11D , Figure 11E and Figure 11F As shown, the elastic column 336 can be formed into an S-shaped column ( Figure 11D ), Z-shaped column ( Figure 11E ) or C-shaped column ( Figure 11F In some embodiments, in Figure 11F If surface 332I is or includes a wavy (corrugated or undulating) surface, the resilient column 336 may be slightly compressed or extended to present different heights to accommodate the reduced or expanded space caused by the curved surface. In some embodiments, the material and configuration of the resilient column 336 are carefully selected to provide sufficient elasticity or flexibility so that the height of the resilient column 336 can be finely adjusted to accommodate non-planar surfaces that may exist when the heat dissipation system 300 is mounted to the underlying cut structure. For example, the resilient column 336 may have a spring load (force) of about 10 grams to about 500 grams. In some embodiments, the material of the resilient column 336 includes a material that is both elastic and thermally conductive. In some embodiments, the material of the resilient column 336 includes one or more metals or metal alloys, such as Cu, Al, AlSiN, AlSiC, Cu-AlSiC, Cu-AlSiN, alloys thereof, or combinations thereof.
[0054] Figure 12 This is a schematic cross-sectional view illustrating an electronic component according to some embodiments of the present invention. According to some embodiments of the present invention, in... Figure 12 Among electronic components, Figure 5 The semiconductor package SD1 is further connected to the circuit substrate 500 having a fluid circulation system.
[0055] In some embodiments, refer to Figure 5 and Figure 12 Electronic component SD2 is made by... Figure 5The semiconductor package SD1 described herein is obtained by mounting it onto the circuit substrate 500, and the semiconductor package SD1 is electrically connected to the circuit substrate 500 via a connector 400 located therebetween. In some embodiments, a fluid circulation system F1 including an inlet pipe IB and an outlet pipe OB is connected to a heat dissipation system 300, and the inlet pipe IB and the outlet pipe OB are respectively installed in the exhaust port OS1 of the top cover 310, such that the exhaust port OS1 serves as an inflow / outflow channel in fluid communication with the circulation space CS1 and the circulation space CS2 (communicated through the through-hole OS2). In some embodiments, coolant CL flows from the inlet pipe IB through the inflow / outflow channel OS1 into the circulation space CS1, flows into the circulation space CS2, where it flows over the fins 338 and the elastic pillars 336 and transfers heat, flows back into the space CS1 and then through the channel OS1, and finally flows out from the outlet pipe OB (flow direction is indicated by arrows). Under the action of the heat dissipation system 300, the heat generated by the cut structure 100D is transferred to the heat dissipation system 300 through the second bonding material 250, further transferred by the coolant circulating in the heat dissipation system 300, and then dissipated from the heat dissipation system 300 to the external environment. As explained in further detail below, the coolant CL flowing through the circulation spaces CS1 and CS2, particularly space CS2, flows over the fins 338 and surface 332I (flowing over the boiling enhancement coating 339) to transfer and carry away heat through the circulation path and flows out of the heat dissipation system 300 from the outlet pipe OB. In some embodiments, the coolant CL is or includes water. In some embodiments, the coolant CL is or includes a dielectric liquid. In some embodiments, additives are added to the water to generate a cooling fluid. Examples of additives include surfactants, preservatives, bactericides, antifreeze, etc.
[0056] Because the substrate 330 (i.e., the base portion 332) conformally covers the cut structure 100D and the second bonding material 250, there are no gaps or cracks at the bonding interface BF1. This conformality or compliance creates an excellent heat transfer interface and enables the heat dissipation system 300 to have high heat dissipation efficiency. In some embodiments, as described above, a boiling-enhancing coating 339 is applied to the surface 332I and distributed on the surface of the fins 338 in certain areas of the surface 332I or within the circulation space CS2, and is located above one or more semiconductor dies that generate the most heat during the operation of the semiconductor package SD1. During coolant CL circulation, two-phase cooling can occur as the coolant flows through the boiling-enhancing coating 339, and the heat transferred to the coolant CL boils from a liquid state to a gaseous state, which further improves the heat dissipation efficiency.
[0057] In some embodiments, the resilient pillars 336 and fins 338 dispersed in the circulation space CS2 define a fluid-connected network of gaps without interrupting fluid communication within the space CS2, between the circulation spaces CS1 and CS2, or for the inflow and outflow of coolant CL.
[0058] Figure 13 This is a schematic cross-sectional view illustrating another electronic component according to some embodiments of the present invention. According to some embodiments of the present invention, in... Figure 13 In the electronic components, the semiconductor package is further connected to the circuit substrate 500 having a fluid circulation system.
[0059] In some embodiments, refer to Figure 13 For electronic component SD3, semiconductor package SD1' and Figure 5 The semiconductor package SD1 described herein is similar, except that the dicing structure 100DD is different. The main difference between the dicing structure 100D and the dicing structure 100DD is that the dicing structure 100DD further includes a photonic die 155BD integrated with the dicing structure 100D, and the photonic die 155BD and the dicing structure 100D are partially covered by an underfill 180.
[0060] Figure 14 This is a schematic cross-sectional view of a semiconductor package according to some embodiments of the present invention. Figure 14 In the middle, the semiconductor package SD4 and Figure 5 Similar to the semiconductor package SD1 described herein, except that at least two cut structures 100D1 and 100D2 are connected to the substrate 200, and the foot portion 330R of the heat dissipation system 300' defines at least two cavities or spaces CS4 and CS5 to accommodate the cut structures 100D1 and 100D2, respectively. Figure 14 As shown, cut structures 100D1 and 100D2 exhibit different degrees of warping. Figure 14 In the upper left portion, the cut structure 100D1 is deformed or warped (i.e., a weeping-shaped curve when viewed in cross-section), and the bonding interface BF2 between the substrate 330 of the heat dissipation system 300' and the second bonding material 250 on the cut structure 100D1 includes at least one curved surface (e.g., an arched surface). Figure 14 In the upper right portion, the cut structure 100D2 exhibits a wavy deformation (i.e., a wavy curve as seen in the cross-sectional view), and the bonding interface BF3 between the substrate 330 of the heat dissipation system 300' and the second bonding material 250 on the cut structure 100D2 includes at least several curved surfaces (e.g., wavy and curved surfaces). It can be seen that the substrate of the heat dissipation system conforms to and matches the surface profile or topology of the cut structure below, establishing an excellent heat dissipation interface, thereby generating excellent thermal performance.
[0061] For those skilled in the art, this invention is not limited to the packaging types used in semiconductor packages. For all semiconductor packages of this invention, different types of packages (Chip on Wafer (CoWoS), Integrated Fan-Out (InFO), PoP, etc.) may also be applied, depending on production and design requirements.
[0062] The heat dissipation system of this invention is quite versatile and can be applied to different types of semiconductor packages with only minor adjustments. Furthermore, the features shown in the specific embodiments described above can be combined in various ways, and all such combinations are intended to fall within the scope of this invention and the appended claims. As a non-limiting example, in some embodiments of this invention, the heat dissipation system can be modified to adjust its shape and / or add additional components, including flanges, fixing devices, or fastening elements, to facilitate assembly.
[0063] Based on the foregoing, the semiconductor package according to this invention may include a die and a heat dissipation system disposed on the die via a thermal interface material disposed therein. In some embodiments, the heat dissipation system adapts to the warping or deformation of the underlying die through curvature adjustment and height adjustment members of the substrate, thereby establishing a satisfactory heat transfer interface.
[0064] In some embodiments of this invention, a semiconductor package is provided. The semiconductor package includes a substrate, a die, a first bonding material, a second bonding material, and a heat dissipation system. The die is disposed on and connected to the substrate. The die has a first surface and a second surface relative to the first surface. The first bonding material is disposed on the substrate and adjacent to the die. The second bonding material is disposed on and covers the second surface of the die. The heat dissipation system has a bottom surface in contact with the second bonding material, is disposed on the second bonding material above the die, and is disposed on the first bonding material on the substrate. The heat dissipation system is fixed to the substrate by the first bonding material, and the bottom surface of the heat dissipation system is fixed to the die by the second bonding material. A bonding interface exists between the second bonding material and the bottom surface of the heat dissipation system, and the bonding interface includes a first curved surface.
[0065] In some embodiments, the second surface of the die includes a second curved surface, and the first curved surface conforms to the second curved surface. In some embodiments, the heat dissipation system includes a substrate having a base plate portion extending over the second bonding material and covering the die, and a foot portion connected to the base plate portion and extending from the base plate portion to the first bonding material, wherein the die is located below the base plate portion and surrounded by the foot portion. In some embodiments, the heat dissipation system includes an intermediate plate disposed on the substrate, the substrate including a support portion disposed between the intermediate plate and the base plate portion to define a circulation space between the support portion, the intermediate plate, and the base plate portion. In some embodiments, the heat dissipation system includes parallel fins connected to the base plate portion and located within the circulation space, and resilient pillars connected to the base plate portion and the intermediate plate and located adjacent to the fins. In some embodiments, the bottom surface includes a third curved surface conforming to the second curved surface, and the resilient pillars located on the base plate portion have different heights. In some embodiments, the fins extend parallel to the flow direction of the coolant circulating in the circulation space. In some embodiments, the materials of the heat dissipation system include aluminum-silicon-copper alloy, aluminum silicon nitride (AlSiN), aluminum silicon carbide (AlSiC), Cu-AlSiC, Cu-AlSiN, or combinations thereof.
[0066] In some embodiments of this invention, a semiconductor package is provided. The semiconductor package includes a die, a first bonding material, a second bonding material, and a heat dissipation system. The die is disposed on and connected to a substrate, with a first surface of the die facing the substrate. The die includes a first semiconductor die and a second semiconductor die. The first bonding material is disposed on the substrate and located next to the die. The second bonding material is disposed on the die, covering a second surface of the die opposite to the first surface, and covering both the first and second semiconductor dies. The heat dissipation system is disposed on the second bonding material above the die and on the first bonding material on the substrate. The heat dissipation system includes an upper portion and a lower portion connected to the upper portion, the lower portion including a base plate portion. The bottom surface of the base plate portion contacts the second bonding material, and the bottom surface includes a first curved surface. The second surface of the die includes a second curved surface, and the first curved surface conforms to the second curved surface.
[0067] In some embodiments, the bottom surface of the base plate portion contacts the top surface of the second bonding material, and the top surface of the second bonding material includes a third curved surface conformal to the first and second curved surfaces. In some embodiments, the heat dissipation system includes parallel fins connected to the base plate portion and resilient pillars connected to the base plate portion and located beside the fins. In some embodiments, the resilient pillars located on the top surface of the base plate portion opposite to the bottom surface have different heights. In some embodiments, the top surface of the base plate portion includes a boiling-enhancing coating. In some embodiments, the boiling-enhancing coating is applied to the surface of the fins. In some embodiments, the first semiconductor die has a higher power consumption than the second semiconductor die, and the boiling-enhancing coating is distributed over a first region of the base plate portion, the first region being directly above the first semiconductor die. In some embodiments, the material of the lower part of the heat dissipation system includes aluminum silicon nitride (AlSiN), aluminum silicon carbide (AlSiC), Cu-AlSiC, Cu-AlSiN, or combinations thereof.
[0068] In some embodiments of this utility model, a method for manufacturing a semiconductor package is provided. The manufacturing method includes the following steps: Providing a die having a first surface and a second surface opposite to the first surface. The die includes a first semiconductor die and a second semiconductor die. Connecting the die to a substrate such that the first surface of the die faces the substrate. Disposing a first bonding material on the substrate. Disposing a second bonding material on the second surface of the die, covering the first semiconductor die and the second semiconductor die. Providing a heat dissipation system. Disposing the heat dissipation system on the second bonding material on the die and on the first bonding material on the substrate such that the bottom surface of the heat dissipation system contacts the second bonding material. Performing a curing process to bond the heat dissipation system to the die via the second bonding material, such that the heat dissipation system is fixed to the substrate by the first bonding material, and the bottom surface of the heat dissipation system is attached to the die by the second bonding material. A bonding interface exists between the second bonding material and the bottom surface of the heat dissipation system, and the bonding interface includes a first curved surface.
[0069] In some embodiments, the second surface of the die includes a second curved surface, and the first curved surface conforms to the second curved surface. In some embodiments, the heat dissipation system is provided with a resilient column connected to an inner surface of the heat dissipation system opposite to the bottom surface. In some embodiments, the bottom surface includes a third curved surface conforming to the second curved surface, and the resilient column has a different height.
[0070] The foregoing has outlined the features of several embodiments to enable those skilled in the art to better understand the nature of this invention. Those skilled in the art should understand that they can readily use this invention as the basis for designing or modifying other processes and structures to achieve the same purposes or attain the same advantages as the embodiments described herein. Those skilled in the art should also recognize that such equivalent constructions do not depart from the spirit and scope of this invention, and that various changes, substitutions, and modifications can be made herein without departing from the spirit and scope of this invention.
Claims
1. A semiconductor package, characterized in that, include: Substrate; A die disposed on and connected to the substrate, wherein the die has a first surface and a second surface relative to the first surface; A first bonding material is disposed on the substrate and beside the die; A second bonding material is disposed on the second surface of the die and covers the second surface of the die; as well as A heat dissipation system having a bottom surface in contact with the second bonding material, disposed on the second bonding material above the die, and disposed on the first bonding material on the substrate. The heat dissipation system is fixed to the substrate by the first bonding material, and the bottom surface of the heat dissipation system is fixed to the die by the second bonding material. There is a bonding interface between the second bonding material and the bottom surface of the heat dissipation system, and the bonding interface includes a first curved surface.
2. The semiconductor package according to claim 1, characterized in that, The second surface of the die includes a second curved surface, and the first curved surface is conformal to the second curved surface.
3. The semiconductor package according to claim 1, characterized in that, The heat dissipation system includes a substrate having a base plate portion extending over the second bonding material and covering the die, and a foot portion connected to the base plate portion and extending from the base plate portion to the first bonding material, wherein the die is located below the base plate portion and surrounded by the foot portion.
4. The semiconductor package according to claim 3, characterized in that, The heat dissipation system includes an intermediate plate disposed on the substrate, the substrate including a support portion disposed between the intermediate plate and the base plate portion to define a circulation space between the support portion, the intermediate plate and the base plate portion.
5. The semiconductor package according to claim 4, characterized in that, The heat dissipation system includes parallel fins connected to the base plate portion and located within the circulation space, and elastic pillars connected to the base plate portion and the intermediate plate and located beside the fins.
6. A semiconductor package, characterized in that, include: A die disposed on and connected to a substrate, wherein the die has a first surface and a second surface relative to the first surface, and the die includes a first semiconductor die and a second semiconductor die; A first bonding material is disposed on the substrate and beside the die; A second bonding material is disposed on the second surface of the die, covering the second surface of the die, and covering the first semiconductor die and the second semiconductor die; as well as A heat dissipation system is disposed on a second bonding material above the die and on a first bonding material on the substrate, wherein the heat dissipation system includes an upper portion and a lower portion connected to the upper portion, and includes a base plate portion, the bottom surface of which contacts the second bonding material, and the bottom surface includes a first curved surface. The second surface of the die includes a second curved surface, and the first curved surface is conformal to the second curved surface.
7. The semiconductor package according to claim 6, characterized in that, The bottom surface of the base plate portion contacts the top surface of the second bonding material, and the top surface of the second bonding material includes a third curved surface conforming to the first curved surface and the second curved surface.
8. The semiconductor package according to claim 6, characterized in that, The heat dissipation system includes parallel fins connected to the base plate portion, and elastic pillars connected to the base plate portion and located next to the fins.
9. The semiconductor package according to claim 8, characterized in that, The elastic columns located on the top surface of the base plate portion opposite to the bottom surface have different heights.
10. The semiconductor package according to claim 8, characterized in that, The top surface of the base plate includes a boiling-enhanced coating.